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28#include "qemu/osdep.h"
29#include "qemu/event_notifier.h"
30#include "qemu/module.h"
31#include "qemu/thread.h"
32#include "qemu/sockets.h"
33#include "qapi/error.h"
34#include "chardev/char.h"
35#include "hw/hw.h"
36#include "hw/pci/pci.h"
37#include "net/can_emu.h"
38
39#include "can_sja1000.h"
40
41#define TYPE_CAN_PCI_DEV "pcm3680_pci"
42
43#define PCM3680i_PCI_DEV(obj) \
44 OBJECT_CHECK(Pcm3680iPCIState, (obj), TYPE_CAN_PCI_DEV)
45
46
47#ifndef PCM3680i_PCI_VENDOR_ID1
48#define PCM3680i_PCI_VENDOR_ID1 0x13fe
49#endif
50
51#ifndef PCM3680i_PCI_DEVICE_ID1
52#define PCM3680i_PCI_DEVICE_ID1 0xc002
53#endif
54
55#define PCM3680i_PCI_SJA_COUNT 2
56#define PCM3680i_PCI_SJA_RANGE 0x100
57
58#define PCM3680i_PCI_BYTES_PER_SJA 0x20
59
60typedef struct Pcm3680iPCIState {
61
62 PCIDevice dev;
63
64 MemoryRegion sja_io[PCM3680i_PCI_SJA_COUNT];
65
66 CanSJA1000State sja_state[PCM3680i_PCI_SJA_COUNT];
67 qemu_irq irq;
68
69 char *model;
70 CanBusState *canbus[PCM3680i_PCI_SJA_COUNT];
71} Pcm3680iPCIState;
72
73static void pcm3680i_pci_reset(DeviceState *dev)
74{
75 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(dev);
76 int i;
77
78 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
79 can_sja_hardware_reset(&d->sja_state[i]);
80 }
81}
82
83static uint64_t pcm3680i_pci_sja1_io_read(void *opaque, hwaddr addr,
84 unsigned size)
85{
86 Pcm3680iPCIState *d = opaque;
87 CanSJA1000State *s = &d->sja_state[0];
88
89 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
90 return 0;
91 }
92
93 return can_sja_mem_read(s, addr, size);
94}
95
96static void pcm3680i_pci_sja1_io_write(void *opaque, hwaddr addr,
97 uint64_t data, unsigned size)
98{
99 Pcm3680iPCIState *d = opaque;
100 CanSJA1000State *s = &d->sja_state[0];
101
102 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
103 return;
104 }
105
106 can_sja_mem_write(s, addr, data, size);
107}
108
109static uint64_t pcm3680i_pci_sja2_io_read(void *opaque, hwaddr addr,
110 unsigned size)
111{
112 Pcm3680iPCIState *d = opaque;
113 CanSJA1000State *s = &d->sja_state[1];
114
115 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
116 return 0;
117 }
118
119 return can_sja_mem_read(s, addr, size);
120}
121
122static void pcm3680i_pci_sja2_io_write(void *opaque, hwaddr addr, uint64_t data,
123 unsigned size)
124{
125 Pcm3680iPCIState *d = opaque;
126 CanSJA1000State *s = &d->sja_state[1];
127
128 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
129 return;
130 }
131
132 can_sja_mem_write(s, addr, data, size);
133}
134
135static const MemoryRegionOps pcm3680i_pci_sja1_io_ops = {
136 .read = pcm3680i_pci_sja1_io_read,
137 .write = pcm3680i_pci_sja1_io_write,
138 .endianness = DEVICE_LITTLE_ENDIAN,
139 .impl = {
140 .max_access_size = 1,
141 },
142};
143
144static const MemoryRegionOps pcm3680i_pci_sja2_io_ops = {
145 .read = pcm3680i_pci_sja2_io_read,
146 .write = pcm3680i_pci_sja2_io_write,
147 .endianness = DEVICE_LITTLE_ENDIAN,
148 .impl = {
149 .max_access_size = 1,
150 },
151};
152
153static void pcm3680i_pci_realize(PCIDevice *pci_dev, Error **errp)
154{
155 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(pci_dev);
156 uint8_t *pci_conf;
157 int i;
158
159 pci_conf = pci_dev->config;
160 pci_conf[PCI_INTERRUPT_PIN] = 0x01;
161
162 d->irq = pci_allocate_irq(&d->dev);
163
164 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
165 can_sja_init(&d->sja_state[i], d->irq);
166 }
167
168 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
169 if (can_sja_connect_to_bus(&d->sja_state[i], d->canbus[i]) < 0) {
170 error_setg(errp, "can_sja_connect_to_bus failed");
171 return;
172 }
173 }
174
175 memory_region_init_io(&d->sja_io[0], OBJECT(d), &pcm3680i_pci_sja1_io_ops,
176 d, "pcm3680i_pci-sja1", PCM3680i_PCI_SJA_RANGE);
177
178 memory_region_init_io(&d->sja_io[1], OBJECT(d), &pcm3680i_pci_sja2_io_ops,
179 d, "pcm3680i_pci-sja2", PCM3680i_PCI_SJA_RANGE);
180
181 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
182 pci_register_bar(&d->dev, i, PCI_BASE_ADDRESS_SPACE_IO,
183 &d->sja_io[i]);
184 }
185}
186
187static void pcm3680i_pci_exit(PCIDevice *pci_dev)
188{
189 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(pci_dev);
190 int i;
191
192 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
193 can_sja_disconnect(&d->sja_state[i]);
194 }
195
196 qemu_free_irq(d->irq);
197}
198
199static const VMStateDescription vmstate_pcm3680i_pci = {
200 .name = "pcm3680i_pci",
201 .version_id = 1,
202 .minimum_version_id = 1,
203 .minimum_version_id_old = 1,
204 .fields = (VMStateField[]) {
205 VMSTATE_PCI_DEVICE(dev, Pcm3680iPCIState),
206 VMSTATE_STRUCT(sja_state[0], Pcm3680iPCIState, 0,
207 vmstate_can_sja, CanSJA1000State),
208 VMSTATE_STRUCT(sja_state[1], Pcm3680iPCIState, 0,
209 vmstate_can_sja, CanSJA1000State),
210 VMSTATE_END_OF_LIST()
211 }
212};
213
214static void pcm3680i_pci_instance_init(Object *obj)
215{
216 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(obj);
217
218 object_property_add_link(obj, "canbus0", TYPE_CAN_BUS,
219 (Object **)&d->canbus[0],
220 qdev_prop_allow_set_link_before_realize,
221 0, &error_abort);
222 object_property_add_link(obj, "canbus1", TYPE_CAN_BUS,
223 (Object **)&d->canbus[1],
224 qdev_prop_allow_set_link_before_realize,
225 0, &error_abort);
226}
227
228static void pcm3680i_pci_class_init(ObjectClass *klass, void *data)
229{
230 DeviceClass *dc = DEVICE_CLASS(klass);
231 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
232
233 k->realize = pcm3680i_pci_realize;
234 k->exit = pcm3680i_pci_exit;
235 k->vendor_id = PCM3680i_PCI_VENDOR_ID1;
236 k->device_id = PCM3680i_PCI_DEVICE_ID1;
237 k->revision = 0x00;
238 k->class_id = 0x000c09;
239 k->subsystem_vendor_id = PCM3680i_PCI_VENDOR_ID1;
240 k->subsystem_id = PCM3680i_PCI_DEVICE_ID1;
241 dc->desc = "Pcm3680i PCICANx";
242 dc->vmsd = &vmstate_pcm3680i_pci;
243 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
244 dc->reset = pcm3680i_pci_reset;
245}
246
247static const TypeInfo pcm3680i_pci_info = {
248 .name = TYPE_CAN_PCI_DEV,
249 .parent = TYPE_PCI_DEVICE,
250 .instance_size = sizeof(Pcm3680iPCIState),
251 .class_init = pcm3680i_pci_class_init,
252 .instance_init = pcm3680i_pci_instance_init,
253 .interfaces = (InterfaceInfo[]) {
254 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
255 { },
256 },
257};
258
259static void pcm3680i_pci_register_types(void)
260{
261 type_register_static(&pcm3680i_pci_info);
262}
263
264type_init(pcm3680i_pci_register_types)
265
