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27#include "qemu/osdep.h"
28#include "qemu-common.h"
29#include "qemu/units.h"
30#include "qapi/error.h"
31#include "hw/hw.h"
32#include "hw/ppc/ppc.h"
33#include "mac.h"
34#include "hw/input/adb.h"
35#include "sysemu/sysemu.h"
36#include "net/net.h"
37#include "hw/isa/isa.h"
38#include "hw/pci/pci.h"
39#include "hw/pci/pci_host.h"
40#include "hw/boards.h"
41#include "hw/nvram/fw_cfg.h"
42#include "hw/char/escc.h"
43#include "hw/misc/macio/macio.h"
44#include "hw/ide.h"
45#include "hw/loader.h"
46#include "hw/fw-path-provider.h"
47#include "elf.h"
48#include "qemu/error-report.h"
49#include "sysemu/kvm.h"
50#include "kvm_ppc.h"
51#include "exec/address-spaces.h"
52
53#define MAX_IDE_BUS 2
54#define CFG_ADDR 0xf0000510
55#define TBFREQ 16600000UL
56#define CLOCKFREQ 266000000UL
57#define BUSFREQ 66000000UL
58
59#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
60
61#define GRACKLE_BASE 0xfec00000
62
63static void fw_cfg_boot_set(void *opaque, const char *boot_device,
64 Error **errp)
65{
66 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
67}
68
69static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
70{
71 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
72}
73
74static void ppc_heathrow_reset(void *opaque)
75{
76 PowerPCCPU *cpu = opaque;
77
78 cpu_reset(CPU(cpu));
79}
80
81static void ppc_heathrow_init(MachineState *machine)
82{
83 ram_addr_t ram_size = machine->ram_size;
84 const char *kernel_filename = machine->kernel_filename;
85 const char *kernel_cmdline = machine->kernel_cmdline;
86 const char *initrd_filename = machine->initrd_filename;
87 const char *boot_device = machine->boot_order;
88 MemoryRegion *sysmem = get_system_memory();
89 PowerPCCPU *cpu = NULL;
90 CPUPPCState *env = NULL;
91 char *filename;
92 int linux_boot, i;
93 MemoryRegion *ram = g_new(MemoryRegion, 1);
94 MemoryRegion *bios = g_new(MemoryRegion, 1);
95 uint32_t kernel_base, initrd_base, cmdline_base = 0;
96 int32_t kernel_size, initrd_size;
97 PCIBus *pci_bus;
98 OldWorldMacIOState *macio;
99 MACIOIDEState *macio_ide;
100 SysBusDevice *s;
101 DeviceState *dev, *pic_dev;
102 BusState *adb_bus;
103 int bios_size;
104 unsigned int smp_cpus = machine->smp.cpus;
105 uint16_t ppc_boot_device;
106 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
107 void *fw_cfg;
108 uint64_t tbfreq;
109
110 linux_boot = (kernel_filename != NULL);
111
112
113 for (i = 0; i < smp_cpus; i++) {
114 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
115 env = &cpu->env;
116
117
118 cpu_ppc_tb_init(env, TBFREQ);
119 qemu_register_reset(ppc_heathrow_reset, cpu);
120 }
121
122
123 if (ram_size > 2047 * MiB) {
124 error_report("Too much memory for this machine: %" PRId64 " MB, "
125 "maximum 2047 MB", ram_size / MiB);
126 exit(1);
127 }
128
129 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
130 ram_size);
131 memory_region_add_subregion(sysmem, 0, ram);
132
133
134 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
135 &error_fatal);
136
137 if (bios_name == NULL)
138 bios_name = PROM_FILENAME;
139 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
140 memory_region_set_readonly(bios, true);
141 memory_region_add_subregion(sysmem, PROM_ADDR, bios);
142
143
144 if (filename) {
145 bios_size = load_elf(filename, NULL, 0, NULL, NULL, NULL, NULL,
146 1, PPC_ELF_MACHINE, 0, 0);
147 g_free(filename);
148 } else {
149 bios_size = -1;
150 }
151 if (bios_size < 0 || bios_size > BIOS_SIZE) {
152 error_report("could not load PowerPC bios '%s'", bios_name);
153 exit(1);
154 }
155
156 if (linux_boot) {
157 uint64_t lowaddr = 0;
158 int bswap_needed;
159
160#ifdef BSWAP_NEEDED
161 bswap_needed = 1;
162#else
163 bswap_needed = 0;
164#endif
165 kernel_base = KERNEL_LOAD_ADDR;
166 kernel_size = load_elf(kernel_filename, NULL,
167 translate_kernel_address, NULL,
168 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
169 0, 0);
170 if (kernel_size < 0)
171 kernel_size = load_aout(kernel_filename, kernel_base,
172 ram_size - kernel_base, bswap_needed,
173 TARGET_PAGE_SIZE);
174 if (kernel_size < 0)
175 kernel_size = load_image_targphys(kernel_filename,
176 kernel_base,
177 ram_size - kernel_base);
178 if (kernel_size < 0) {
179 error_report("could not load kernel '%s'", kernel_filename);
180 exit(1);
181 }
182
183 if (initrd_filename) {
184 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
185 initrd_size = load_image_targphys(initrd_filename, initrd_base,
186 ram_size - initrd_base);
187 if (initrd_size < 0) {
188 error_report("could not load initial ram disk '%s'",
189 initrd_filename);
190 exit(1);
191 }
192 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
193 } else {
194 initrd_base = 0;
195 initrd_size = 0;
196 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
197 }
198 ppc_boot_device = 'm';
199 } else {
200 kernel_base = 0;
201 kernel_size = 0;
202 initrd_base = 0;
203 initrd_size = 0;
204 ppc_boot_device = '\0';
205 for (i = 0; boot_device[i] != '\0'; i++) {
206
207
208
209
210#if 0
211 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
212 ppc_boot_device = boot_device[i];
213 break;
214 }
215#else
216 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
217 ppc_boot_device = boot_device[i];
218 break;
219 }
220#endif
221 }
222 if (ppc_boot_device == '\0') {
223 error_report("No valid boot device for G3 Beige machine");
224 exit(1);
225 }
226 }
227
228
229 pic_dev = qdev_create(NULL, TYPE_HEATHROW);
230 qdev_init_nofail(pic_dev);
231
232
233 for (i = 0; i < smp_cpus; i++) {
234 switch (PPC_INPUT(env)) {
235 case PPC_FLAGS_INPUT_6xx:
236 qdev_connect_gpio_out(pic_dev, 0,
237 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
238 break;
239 default:
240 error_report("Bus model not supported on OldWorld Mac machine");
241 exit(1);
242 }
243 }
244
245
246 if (kvm_enabled()) {
247 tbfreq = kvmppc_get_tbfreq();
248 } else {
249 tbfreq = TBFREQ;
250 }
251
252
253 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
254 error_report("Only 6xx bus is supported on heathrow machine");
255 exit(1);
256 }
257
258
259 dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
260 qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000);
261 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
262 &error_abort);
263 qdev_init_nofail(dev);
264 s = SYS_BUS_DEVICE(dev);
265 sysbus_mmio_map(s, 0, GRACKLE_BASE);
266 sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
267
268 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
269 sysbus_mmio_get_region(s, 2));
270
271 memory_region_add_subregion(get_system_memory(), 0xfe000000,
272 sysbus_mmio_get_region(s, 3));
273
274 pci_bus = PCI_HOST_BRIDGE(dev)->bus;
275
276 pci_vga_init(pci_bus);
277
278 for (i = 0; i < nb_nics; i++) {
279 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
280 }
281
282 ide_drive_get(hd, ARRAY_SIZE(hd));
283
284
285 macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO));
286 dev = DEVICE(macio);
287 qdev_prop_set_uint64(dev, "frequency", tbfreq);
288 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
289 &error_abort);
290 qdev_init_nofail(dev);
291
292 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
293 "ide[0]"));
294 macio_ide_init_drives(macio_ide, hd);
295
296 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
297 "ide[1]"));
298 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
299
300 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
301 adb_bus = qdev_get_child_bus(dev, "adb.0");
302 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
303 qdev_init_nofail(dev);
304 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
305 qdev_init_nofail(dev);
306
307 if (machine_usb(machine)) {
308 pci_create_simple(pci_bus, -1, "pci-ohci");
309 }
310
311 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
312 graphic_depth = 15;
313
314
315
316 dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
317 fw_cfg = FW_CFG(dev);
318 qdev_prop_set_uint32(dev, "data_width", 1);
319 qdev_prop_set_bit(dev, "dma_enabled", false);
320 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
321 OBJECT(fw_cfg), NULL);
322 qdev_init_nofail(dev);
323 s = SYS_BUS_DEVICE(dev);
324 sysbus_mmio_map(s, 0, CFG_ADDR);
325 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
326
327 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
328 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
329 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
330 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
331 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
332 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
333 if (kernel_cmdline) {
334 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
335 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
336 } else {
337 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
338 }
339 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
340 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
341 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
342
343 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
344 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
345 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
346
347 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
348 if (kvm_enabled()) {
349 uint8_t *hypercall;
350
351 hypercall = g_malloc(16);
352 kvmppc_get_hypercall(env, hypercall, 16);
353 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
354 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
355 }
356 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
357
358 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
359 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
360
361
362 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
363 if (filename) {
364 gchar *ndrv_file;
365 gsize ndrv_size;
366
367 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
368 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
369 }
370 g_free(filename);
371 }
372
373 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
374}
375
376
377
378
379
380static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
381 DeviceState *dev)
382{
383 PCIDevice *pci;
384 IDEBus *ide_bus;
385 IDEState *ide_s;
386 MACIOIDEState *macio_ide;
387
388 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
389 pci = PCI_DEVICE(dev);
390 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
391 }
392
393 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
394 macio_ide = MACIO_IDE(dev);
395 return g_strdup_printf("ata-3@%x", macio_ide->addr);
396 }
397
398 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
399 ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
400 ide_s = idebus_active_if(ide_bus);
401
402 if (ide_s->drive_kind == IDE_CD) {
403 return g_strdup("cdrom");
404 }
405
406 return g_strdup("disk");
407 }
408
409 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
410 return g_strdup("disk");
411 }
412
413 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
414 return g_strdup("cdrom");
415 }
416
417 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
418 return g_strdup("disk");
419 }
420
421 return NULL;
422}
423
424static int heathrow_kvm_type(MachineState *machine, const char *arg)
425{
426
427 return 2;
428}
429
430static void heathrow_class_init(ObjectClass *oc, void *data)
431{
432 MachineClass *mc = MACHINE_CLASS(oc);
433 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
434
435 mc->desc = "Heathrow based PowerMAC";
436 mc->init = ppc_heathrow_init;
437 mc->block_default_type = IF_IDE;
438 mc->max_cpus = MAX_CPUS;
439#ifndef TARGET_PPC64
440 mc->is_default = 1;
441#endif
442
443 mc->default_boot_order = "cd";
444 mc->kvm_type = heathrow_kvm_type;
445 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
446 mc->default_display = "std";
447 mc->ignore_boot_device_suffixes = true;
448 fwc->get_dev_path = heathrow_fw_dev_path;
449}
450
451static const TypeInfo ppc_heathrow_machine_info = {
452 .name = MACHINE_TYPE_NAME("g3beige"),
453 .parent = TYPE_MACHINE,
454 .class_init = heathrow_class_init,
455 .interfaces = (InterfaceInfo[]) {
456 { TYPE_FW_PATH_PROVIDER },
457 { }
458 },
459};
460
461static void ppc_heathrow_register_types(void)
462{
463 type_register_static(&ppc_heathrow_machine_info);
464}
465
466type_init(ppc_heathrow_register_types);
467
