1
2
3
4
5
6
7
8
9
10
11
12#include "qemu/osdep.h"
13#include "e500.h"
14#include "hw/boards.h"
15#include "sysemu/device_tree.h"
16#include "hw/ppc/openpic.h"
17#include "qemu/error-report.h"
18#include "cpu.h"
19
20static void mpc8544ds_fixup_devtree(void *fdt)
21{
22 const char model[] = "MPC8544DS";
23 const char compatible[] = "MPC8544DS\0MPC85xxDS";
24
25 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
26 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
27 sizeof(compatible));
28}
29
30static void mpc8544ds_init(MachineState *machine)
31{
32 if (machine->ram_size > 0xc0000000) {
33 error_report("The MPC8544DS board only supports up to 3GB of RAM");
34 exit(1);
35 }
36
37 ppce500_init(machine);
38}
39
40static void e500plat_machine_class_init(ObjectClass *oc, void *data)
41{
42 MachineClass *mc = MACHINE_CLASS(oc);
43 PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
44
45 pmc->pci_first_slot = 0x11;
46 pmc->pci_nr_slots = 2;
47 pmc->fixup_devtree = mpc8544ds_fixup_devtree;
48 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
49 pmc->ccsrbar_base = 0xE0000000ULL;
50 pmc->pci_mmio_base = 0xC0000000ULL;
51 pmc->pci_mmio_bus_base = 0xC0000000ULL;
52 pmc->pci_pio_base = 0xE1000000ULL;
53 pmc->spin_base = 0xEF000000ULL;
54
55 mc->desc = "mpc8544ds";
56 mc->init = mpc8544ds_init;
57 mc->max_cpus = 15;
58 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
59}
60
61#define TYPE_MPC8544DS_MACHINE MACHINE_TYPE_NAME("mpc8544ds")
62
63static const TypeInfo mpc8544ds_info = {
64 .name = TYPE_MPC8544DS_MACHINE,
65 .parent = TYPE_PPCE500_MACHINE,
66 .class_init = e500plat_machine_class_init,
67};
68
69static void mpc8544ds_register_types(void)
70{
71 type_register_static(&mpc8544ds_info);
72}
73
74type_init(mpc8544ds_register_types)
75