LXR qemu/include/hw/acpi/acpi-defs.h

   1/*
   2 * This program is free software; you can redistribute it and/or modify
   3 * it under the terms of the GNU General Public License as published by
   4 * the Free Software Foundation; either version 2 of the License, or
   5 * (at your option) any later version.
   6
   7 * This program is distributed in the hope that it will be useful,
   8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10 * GNU General Public License for more details.
  11
  12 * You should have received a copy of the GNU General Public License along
  13 * with this program; if not, see <http://www.gnu.org/licenses/>.
  14 */
  15#ifndef QEMU_ACPI_DEFS_H
  16#define QEMU_ACPI_DEFS_H
  17
  18enum {
  19    ACPI_FADT_F_WBINVD,
  20    ACPI_FADT_F_WBINVD_FLUSH,
  21    ACPI_FADT_F_PROC_C1,
  22    ACPI_FADT_F_P_LVL2_UP,
  23    ACPI_FADT_F_PWR_BUTTON,
  24    ACPI_FADT_F_SLP_BUTTON,
  25    ACPI_FADT_F_FIX_RTC,
  26    ACPI_FADT_F_RTC_S4,
  27    ACPI_FADT_F_TMR_VAL_EXT,
  28    ACPI_FADT_F_DCK_CAP,
  29    ACPI_FADT_F_RESET_REG_SUP,
  30    ACPI_FADT_F_SEALED_CASE,
  31    ACPI_FADT_F_HEADLESS,
  32    ACPI_FADT_F_CPU_SW_SLP,
  33    ACPI_FADT_F_PCI_EXP_WAK,
  34    ACPI_FADT_F_USE_PLATFORM_CLOCK,
  35    ACPI_FADT_F_S4_RTC_STS_VALID,
  36    ACPI_FADT_F_REMOTE_POWER_ON_CAPABLE,
  37    ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL,
  38    ACPI_FADT_F_FORCE_APIC_PHYSICAL_DESTINATION_MODE,
  39    ACPI_FADT_F_HW_REDUCED_ACPI,
  40    ACPI_FADT_F_LOW_POWER_S0_IDLE_CAPABLE,
  41};
  42
  43typedef struct AcpiRsdpData {
  44    uint8_t oem_id[6] QEMU_NONSTRING; /* OEM identification */
  45    uint8_t revision;                 /* Must be 0 for 1.0, 2 for 2.0 */
  46
  47    unsigned *rsdt_tbl_offset;
  48    unsigned *xsdt_tbl_offset;
  49} AcpiRsdpData;
  50
  51/* Table structure from Linux kernel (the ACPI tables are under the
  52   BSD license) */
  53
  54
  55#define ACPI_TABLE_HEADER_DEF   /* ACPI common table header */ \
  56    uint32_t signature;          /* ACPI signature (4 ASCII characters) */ \
  57    uint32_t length;                 /* Length of table, in bytes, including header */ \
  58    uint8_t  revision;               /* ACPI Specification minor version # */ \
  59    uint8_t  checksum;               /* To make sum of entire table == 0 */ \
  60    uint8_t  oem_id[6] \
  61                 QEMU_NONSTRING;     /* OEM identification */ \
  62    uint8_t  oem_table_id[8] \
  63                 QEMU_NONSTRING;     /* OEM table identification */ \
  64    uint32_t oem_revision;           /* OEM revision number */ \
  65    uint8_t  asl_compiler_id[4] \
  66                 QEMU_NONSTRING;     /* ASL compiler vendor ID */ \
  67    uint32_t asl_compiler_revision;  /* ASL compiler revision number */
  68
  69
  70/* ACPI common table header */
  71struct AcpiTableHeader {
  72    ACPI_TABLE_HEADER_DEF
  73} QEMU_PACKED;
  74typedef struct AcpiTableHeader AcpiTableHeader;
  75
  76struct AcpiGenericAddress {
  77    uint8_t space_id;        /* Address space where struct or register exists */
  78    uint8_t bit_width;       /* Size in bits of given register */
  79    uint8_t bit_offset;      /* Bit offset within the register */
  80    uint8_t access_width;    /* ACPI 3.0: Minimum Access size (ACPI 3.0),
  81                                ACPI 2.0: Reserved, Table 5-1 */
  82    uint64_t address;        /* 64-bit address of struct or register */
  83} QEMU_PACKED;
  84
  85typedef struct AcpiFadtData {
  86    struct AcpiGenericAddress pm1a_cnt;   /* PM1a_CNT_BLK */
  87    struct AcpiGenericAddress pm1a_evt;   /* PM1a_EVT_BLK */
  88    struct AcpiGenericAddress pm_tmr;    /* PM_TMR_BLK */
  89    struct AcpiGenericAddress gpe0_blk;  /* GPE0_BLK */
  90    struct AcpiGenericAddress reset_reg; /* RESET_REG */
  91    uint8_t reset_val;         /* RESET_VALUE */
  92    uint8_t  rev;              /* Revision */
  93    uint32_t flags;            /* Flags */
  94    uint32_t smi_cmd;          /* SMI_CMD */
  95    uint16_t sci_int;          /* SCI_INT */
  96    uint8_t  int_model;        /* INT_MODEL */
  97    uint8_t  acpi_enable_cmd;  /* ACPI_ENABLE */
  98    uint8_t  acpi_disable_cmd; /* ACPI_DISABLE */
  99    uint8_t  rtc_century;      /* CENTURY */
 100    uint16_t plvl2_lat;        /* P_LVL2_LAT */
 101    uint16_t plvl3_lat;        /* P_LVL3_LAT */
 102    uint16_t arm_boot_arch;    /* ARM_BOOT_ARCH */
 103    uint8_t minor_ver;         /* FADT Minor Version */
 104
 105    /*
 106     * respective tables offsets within ACPI_BUILD_TABLE_FILE,
 107     * NULL if table doesn't exist (in that case field's value
 108     * won't be patched by linker and will be kept set to 0)
 109     */
 110    unsigned *facs_tbl_offset; /* FACS offset in */
 111    unsigned *dsdt_tbl_offset;
 112    unsigned *xdsdt_tbl_offset;
 113} AcpiFadtData;
 114
 115#define ACPI_FADT_ARM_PSCI_COMPLIANT  (1 << 0)
 116#define ACPI_FADT_ARM_PSCI_USE_HVC    (1 << 1)
 117
 118/*
 119 * Serial Port Console Redirection Table (SPCR), Rev. 1.02
 120 *
 121 * For .interface_type see Debug Port Table 2 (DBG2) serial port
 122 * subtypes in Table 3, Rev. May 22, 2012
 123 */
 124struct AcpiSerialPortConsoleRedirection {
 125    ACPI_TABLE_HEADER_DEF
 126    uint8_t  interface_type;
 127    uint8_t  reserved1[3];
 128    struct AcpiGenericAddress base_address;
 129    uint8_t  interrupt_types;
 130    uint8_t  irq;
 131    uint32_t gsi;
 132    uint8_t  baud;
 133    uint8_t  parity;
 134    uint8_t  stopbits;
 135    uint8_t  flowctrl;
 136    uint8_t  term_type;
 137    uint8_t  reserved2;
 138    uint16_t pci_device_id;
 139    uint16_t pci_vendor_id;
 140    uint8_t  pci_bus;
 141    uint8_t  pci_slot;
 142    uint8_t  pci_func;
 143    uint32_t pci_flags;
 144    uint8_t  pci_seg;
 145    uint32_t reserved3;
 146} QEMU_PACKED;
 147typedef struct AcpiSerialPortConsoleRedirection
 148               AcpiSerialPortConsoleRedirection;
 149
 150/*
 151 * ACPI 1.0 Root System Description Table (RSDT)
 152 */
 153struct AcpiRsdtDescriptorRev1 {
 154    ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
 155    uint32_t table_offset_entry[0];  /* Array of pointers to other */
 156    /* ACPI tables */
 157} QEMU_PACKED;
 158typedef struct AcpiRsdtDescriptorRev1 AcpiRsdtDescriptorRev1;
 159
 160/*
 161 * ACPI 2.0 eXtended System Description Table (XSDT)
 162 */
 163struct AcpiXsdtDescriptorRev2 {
 164    ACPI_TABLE_HEADER_DEF       /* ACPI common table header */
 165    uint64_t table_offset_entry[0];  /* Array of pointers to other */
 166    /* ACPI tables */
 167} QEMU_PACKED;
 168typedef struct AcpiXsdtDescriptorRev2 AcpiXsdtDescriptorRev2;
 169
 170/*
 171 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
 172 */
 173struct AcpiFacsDescriptorRev1 {
 174    uint32_t signature;           /* ACPI Signature */
 175    uint32_t length;                 /* Length of structure, in bytes */
 176    uint32_t hardware_signature;     /* Hardware configuration signature */
 177    uint32_t firmware_waking_vector; /* ACPI OS waking vector */
 178    uint32_t global_lock;            /* Global Lock */
 179    uint32_t flags;
 180    uint8_t  resverved3 [40];        /* Reserved - must be zero */
 181} QEMU_PACKED;
 182typedef struct AcpiFacsDescriptorRev1 AcpiFacsDescriptorRev1;
 183
 184/*
 185 * Differentiated System Description Table (DSDT)
 186 */
 187
 188/*
 189 * MADT values and structures
 190 */
 191
 192/* Values for MADT PCATCompat */
 193
 194#define ACPI_DUAL_PIC                0
 195#define ACPI_MULTIPLE_APIC           1
 196
 197/* Master MADT */
 198
 199struct AcpiMultipleApicTable {
 200    ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
 201    uint32_t local_apic_address;     /* Physical address of local APIC */
 202    uint32_t flags;
 203} QEMU_PACKED;
 204typedef struct AcpiMultipleApicTable AcpiMultipleApicTable;
 205
 206/* Values for Type in APIC sub-headers */
 207
 208#define ACPI_APIC_PROCESSOR          0
 209#define ACPI_APIC_IO                 1
 210#define ACPI_APIC_XRUPT_OVERRIDE     2
 211#define ACPI_APIC_NMI                3
 212#define ACPI_APIC_LOCAL_NMI          4
 213#define ACPI_APIC_ADDRESS_OVERRIDE   5
 214#define ACPI_APIC_IO_SAPIC           6
 215#define ACPI_APIC_LOCAL_SAPIC        7
 216#define ACPI_APIC_XRUPT_SOURCE       8
 217#define ACPI_APIC_LOCAL_X2APIC       9
 218#define ACPI_APIC_LOCAL_X2APIC_NMI      10
 219#define ACPI_APIC_GENERIC_CPU_INTERFACE 11
 220#define ACPI_APIC_GENERIC_DISTRIBUTOR   12
 221#define ACPI_APIC_GENERIC_MSI_FRAME     13
 222#define ACPI_APIC_GENERIC_REDISTRIBUTOR 14
 223#define ACPI_APIC_GENERIC_TRANSLATOR    15
 224#define ACPI_APIC_RESERVED              16   /* 16 and greater are reserved */
 225
 226/*
 227 * MADT sub-structures (Follow MULTIPLE_APIC_DESCRIPTION_TABLE)
 228 */
 229#define ACPI_SUB_HEADER_DEF   /* Common ACPI sub-structure header */\
 230    uint8_t  type;                               \
 231    uint8_t  length;
 232
 233/* Sub-structures for MADT */
 234
 235struct AcpiMadtProcessorApic {
 236    ACPI_SUB_HEADER_DEF
 237    uint8_t  processor_id;           /* ACPI processor id */
 238    uint8_t  local_apic_id;          /* Processor's local APIC id */
 239    uint32_t flags;
 240} QEMU_PACKED;
 241typedef struct AcpiMadtProcessorApic AcpiMadtProcessorApic;
 242
 243struct AcpiMadtIoApic {
 244    ACPI_SUB_HEADER_DEF
 245    uint8_t  io_apic_id;             /* I/O APIC ID */
 246    uint8_t  reserved;               /* Reserved - must be zero */
 247    uint32_t address;                /* APIC physical address */
 248    uint32_t interrupt;              /* Global system interrupt where INTI
 249                                 * lines start */
 250} QEMU_PACKED;
 251typedef struct AcpiMadtIoApic AcpiMadtIoApic;
 252
 253struct AcpiMadtIntsrcovr {
 254    ACPI_SUB_HEADER_DEF
 255    uint8_t  bus;
 256    uint8_t  source;
 257    uint32_t gsi;
 258    uint16_t flags;
 259} QEMU_PACKED;
 260typedef struct AcpiMadtIntsrcovr AcpiMadtIntsrcovr;
 261
 262struct AcpiMadtLocalNmi {
 263    ACPI_SUB_HEADER_DEF
 264    uint8_t  processor_id;           /* ACPI processor id */
 265    uint16_t flags;                  /* MPS INTI flags */
 266    uint8_t  lint;                   /* Local APIC LINT# */
 267} QEMU_PACKED;
 268typedef struct AcpiMadtLocalNmi AcpiMadtLocalNmi;
 269
 270struct AcpiMadtProcessorX2Apic {
 271    ACPI_SUB_HEADER_DEF
 272    uint16_t reserved;
 273    uint32_t x2apic_id;              /* Processor's local x2APIC ID */
 274    uint32_t flags;
 275    uint32_t uid;                    /* Processor object _UID */
 276} QEMU_PACKED;
 277typedef struct AcpiMadtProcessorX2Apic AcpiMadtProcessorX2Apic;
 278
 279struct AcpiMadtLocalX2ApicNmi {
 280    ACPI_SUB_HEADER_DEF
 281    uint16_t flags;                  /* MPS INTI flags */
 282    uint32_t uid;                    /* Processor object _UID */
 283    uint8_t  lint;                   /* Local APIC LINT# */
 284    uint8_t  reserved[3];            /* Local APIC LINT# */
 285} QEMU_PACKED;
 286typedef struct AcpiMadtLocalX2ApicNmi AcpiMadtLocalX2ApicNmi;
 287
 288struct AcpiMadtGenericCpuInterface {
 289    ACPI_SUB_HEADER_DEF
 290    uint16_t reserved;
 291    uint32_t cpu_interface_number;
 292    uint32_t uid;
 293    uint32_t flags;
 294    uint32_t parking_version;
 295    uint32_t performance_interrupt;
 296    uint64_t parked_address;
 297    uint64_t base_address;
 298    uint64_t gicv_base_address;
 299    uint64_t gich_base_address;
 300    uint32_t vgic_interrupt;
 301    uint64_t gicr_base_address;
 302    uint64_t arm_mpidr;
 303} QEMU_PACKED;
 304
 305typedef struct AcpiMadtGenericCpuInterface AcpiMadtGenericCpuInterface;
 306
 307/* GICC CPU Interface Flags */
 308#define ACPI_MADT_GICC_ENABLED 1
 309
 310struct AcpiMadtGenericDistributor {
 311    ACPI_SUB_HEADER_DEF
 312    uint16_t reserved;
 313    uint32_t gic_id;
 314    uint64_t base_address;
 315    uint32_t global_irq_base;
 316    /* ACPI 5.1 Errata 1228 Present GIC version in MADT table */
 317    uint8_t version;
 318    uint8_t reserved2[3];
 319} QEMU_PACKED;
 320
 321typedef struct AcpiMadtGenericDistributor AcpiMadtGenericDistributor;
 322
 323struct AcpiMadtGenericMsiFrame {
 324    ACPI_SUB_HEADER_DEF
 325    uint16_t reserved;
 326    uint32_t gic_msi_frame_id;
 327    uint64_t base_address;
 328    uint32_t flags;
 329    uint16_t spi_count;
 330    uint16_t spi_base;
 331} QEMU_PACKED;
 332
 333typedef struct AcpiMadtGenericMsiFrame AcpiMadtGenericMsiFrame;
 334
 335struct AcpiMadtGenericRedistributor {
 336    ACPI_SUB_HEADER_DEF
 337    uint16_t reserved;
 338    uint64_t base_address;
 339    uint32_t range_length;
 340} QEMU_PACKED;
 341
 342typedef struct AcpiMadtGenericRedistributor AcpiMadtGenericRedistributor;
 343
 344struct AcpiMadtGenericTranslator {
 345    ACPI_SUB_HEADER_DEF
 346    uint16_t reserved;
 347    uint32_t translation_id;
 348    uint64_t base_address;
 349    uint32_t reserved2;
 350} QEMU_PACKED;
 351
 352typedef struct AcpiMadtGenericTranslator AcpiMadtGenericTranslator;
 353
 354/*
 355 * Generic Timer Description Table (GTDT)
 356 */
 357#define ACPI_GTDT_INTERRUPT_MODE_LEVEL    (0 << 0)
 358#define ACPI_GTDT_INTERRUPT_MODE_EDGE     (1 << 0)
 359#define ACPI_GTDT_CAP_ALWAYS_ON           (1 << 2)
 360
 361struct AcpiGenericTimerTable {
 362    ACPI_TABLE_HEADER_DEF
 363    uint64_t counter_block_addresss;
 364    uint32_t reserved;
 365    uint32_t secure_el1_interrupt;
 366    uint32_t secure_el1_flags;
 367    uint32_t non_secure_el1_interrupt;
 368    uint32_t non_secure_el1_flags;
 369    uint32_t virtual_timer_interrupt;
 370    uint32_t virtual_timer_flags;
 371    uint32_t non_secure_el2_interrupt;
 372    uint32_t non_secure_el2_flags;
 373    uint64_t counter_read_block_address;
 374    uint32_t platform_timer_count;
 375    uint32_t platform_timer_offset;
 376} QEMU_PACKED;
 377typedef struct AcpiGenericTimerTable AcpiGenericTimerTable;
 378
 379/*
 380 * HPET Description Table
 381 */
 382struct Acpi20Hpet {
 383    ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
 384    uint32_t           timer_block_id;
 385    struct AcpiGenericAddress addr;
 386    uint8_t            hpet_number;
 387    uint16_t           min_tick;
 388    uint8_t            page_protect;
 389} QEMU_PACKED;
 390typedef struct Acpi20Hpet Acpi20Hpet;
 391
 392/*
 393 * SRAT (NUMA topology description) table
 394 */
 395
 396struct AcpiSystemResourceAffinityTable {
 397    ACPI_TABLE_HEADER_DEF
 398    uint32_t    reserved1;
 399    uint32_t    reserved2[2];
 400} QEMU_PACKED;
 401typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
 402
 403#define ACPI_SRAT_PROCESSOR_APIC     0
 404#define ACPI_SRAT_MEMORY             1
 405#define ACPI_SRAT_PROCESSOR_x2APIC   2
 406#define ACPI_SRAT_PROCESSOR_GICC     3
 407
 408struct AcpiSratProcessorAffinity {
 409    ACPI_SUB_HEADER_DEF
 410    uint8_t     proximity_lo;
 411    uint8_t     local_apic_id;
 412    uint32_t    flags;
 413    uint8_t     local_sapic_eid;
 414    uint8_t     proximity_hi[3];
 415    uint32_t    reserved;
 416} QEMU_PACKED;
 417typedef struct AcpiSratProcessorAffinity AcpiSratProcessorAffinity;
 418
 419struct AcpiSratProcessorX2ApicAffinity {
 420    ACPI_SUB_HEADER_DEF
 421    uint16_t    reserved;
 422    uint32_t    proximity_domain;
 423    uint32_t    x2apic_id;
 424    uint32_t    flags;
 425    uint32_t    clk_domain;
 426    uint32_t    reserved2;
 427} QEMU_PACKED;
 428typedef struct AcpiSratProcessorX2ApicAffinity AcpiSratProcessorX2ApicAffinity;
 429
 430struct AcpiSratMemoryAffinity {
 431    ACPI_SUB_HEADER_DEF
 432    uint32_t    proximity;
 433    uint16_t    reserved1;
 434    uint64_t    base_addr;
 435    uint64_t    range_length;
 436    uint32_t    reserved2;
 437    uint32_t    flags;
 438    uint32_t    reserved3[2];
 439} QEMU_PACKED;
 440typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
 441
 442struct AcpiSratProcessorGiccAffinity {
 443    ACPI_SUB_HEADER_DEF
 444    uint32_t    proximity;
 445    uint32_t    acpi_processor_uid;
 446    uint32_t    flags;
 447    uint32_t    clock_domain;
 448} QEMU_PACKED;
 449
 450typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
 451
 452/*
 453 * TCPA Description Table
 454 *
 455 * Following Level 00, Rev 00.37 of specs:
 456 * http://www.trustedcomputinggroup.org/resources/tcg_acpi_specification
 457 */
 458struct Acpi20Tcpa {
 459    ACPI_TABLE_HEADER_DEF                    /* ACPI common table header */
 460    uint16_t platform_class;
 461    uint32_t log_area_minimum_length;
 462    uint64_t log_area_start_address;
 463} QEMU_PACKED;
 464typedef struct Acpi20Tcpa Acpi20Tcpa;
 465
 466/*
 467 * TPM2
 468 *
 469 * Following Version 1.2, Revision 8 of specs:
 470 * https://trustedcomputinggroup.org/tcg-acpi-specification/
 471 */
 472struct Acpi20TPM2 {
 473    ACPI_TABLE_HEADER_DEF
 474    uint16_t platform_class;
 475    uint16_t reserved;
 476    uint64_t control_area_address;
 477    uint32_t start_method;
 478    uint8_t start_method_params[12];
 479    uint32_t log_area_minimum_length;
 480    uint64_t log_area_start_address;
 481} QEMU_PACKED;
 482typedef struct Acpi20TPM2 Acpi20TPM2;
 483
 484/* DMAR - DMA Remapping table r2.2 */
 485struct AcpiTableDmar {
 486    ACPI_TABLE_HEADER_DEF
 487    uint8_t host_address_width; /* Maximum DMA physical addressability */
 488    uint8_t flags;
 489    uint8_t reserved[10];
 490} QEMU_PACKED;
 491typedef struct AcpiTableDmar AcpiTableDmar;
 492
 493/* Masks for Flags field above */
 494#define ACPI_DMAR_INTR_REMAP        1
 495#define ACPI_DMAR_X2APIC_OPT_OUT    (1 << 1)
 496
 497/* Values for sub-structure type for DMAR */
 498enum {
 499    ACPI_DMAR_TYPE_HARDWARE_UNIT = 0,       /* DRHD */
 500    ACPI_DMAR_TYPE_RESERVED_MEMORY = 1,     /* RMRR */
 501    ACPI_DMAR_TYPE_ATSR = 2,                /* ATSR */
 502    ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3,   /* RHSR */
 503    ACPI_DMAR_TYPE_ANDD = 4,                /* ANDD */
 504    ACPI_DMAR_TYPE_RESERVED = 5             /* Reserved for furture use */
 505};
 506
 507/*
 508 * Sub-structures for DMAR
 509 */
 510
 511/* Device scope structure for DRHD. */
 512struct AcpiDmarDeviceScope {
 513    uint8_t entry_type;
 514    uint8_t length;
 515    uint16_t reserved;
 516    uint8_t enumeration_id;
 517    uint8_t bus;
 518    struct {
 519        uint8_t device;
 520        uint8_t function;
 521    } path[0];
 522} QEMU_PACKED;
 523typedef struct AcpiDmarDeviceScope AcpiDmarDeviceScope;
 524
 525/* Type 0: Hardware Unit Definition */
 526struct AcpiDmarHardwareUnit {
 527    uint16_t type;
 528    uint16_t length;
 529    uint8_t flags;
 530    uint8_t reserved;
 531    uint16_t pci_segment;   /* The PCI Segment associated with this unit */
 532    uint64_t address;   /* Base address of remapping hardware register-set */
 533    AcpiDmarDeviceScope scope[0];
 534} QEMU_PACKED;
 535typedef struct AcpiDmarHardwareUnit AcpiDmarHardwareUnit;
 536
 537/* Type 2: Root Port ATS Capability Reporting Structure */
 538struct AcpiDmarRootPortATS {
 539    uint16_t type;
 540    uint16_t length;
 541    uint8_t flags;
 542    uint8_t reserved;
 543    uint16_t pci_segment;
 544    AcpiDmarDeviceScope scope[0];
 545} QEMU_PACKED;
 546typedef struct AcpiDmarRootPortATS AcpiDmarRootPortATS;
 547
 548/* Masks for Flags field above */
 549#define ACPI_DMAR_INCLUDE_PCI_ALL   1
 550#define ACPI_DMAR_ATSR_ALL_PORTS    1
 551
 552/*
 553 * Input Output Remapping Table (IORT)
 554 * Conforms to "IO Remapping Table System Software on ARM Platforms",
 555 * Document number: ARM DEN 0049B, October 2015
 556 */
 557
 558struct AcpiIortTable {
 559    ACPI_TABLE_HEADER_DEF     /* ACPI common table header */
 560    uint32_t node_count;
 561    uint32_t node_offset;
 562    uint32_t reserved;
 563} QEMU_PACKED;
 564typedef struct AcpiIortTable AcpiIortTable;
 565
 566/*
 567 * IORT node types
 568 */
 569
 570#define ACPI_IORT_NODE_HEADER_DEF   /* Node format common fields */ \
 571    uint8_t  type;          \
 572    uint16_t length;        \
 573    uint8_t  revision;      \
 574    uint32_t reserved;      \
 575    uint32_t mapping_count; \
 576    uint32_t mapping_offset;
 577
 578/* Values for node Type above */
 579enum {
 580        ACPI_IORT_NODE_ITS_GROUP = 0x00,
 581        ACPI_IORT_NODE_NAMED_COMPONENT = 0x01,
 582        ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02,
 583        ACPI_IORT_NODE_SMMU = 0x03,
 584        ACPI_IORT_NODE_SMMU_V3 = 0x04
 585};
 586
 587struct AcpiIortIdMapping {
 588    uint32_t input_base;
 589    uint32_t id_count;
 590    uint32_t output_base;
 591    uint32_t output_reference;
 592    uint32_t flags;
 593} QEMU_PACKED;
 594typedef struct AcpiIortIdMapping AcpiIortIdMapping;
 595
 596struct AcpiIortMemoryAccess {
 597    uint32_t cache_coherency;
 598    uint8_t  hints;
 599    uint16_t reserved;
 600    uint8_t  memory_flags;
 601} QEMU_PACKED;
 602typedef struct AcpiIortMemoryAccess AcpiIortMemoryAccess;
 603
 604struct AcpiIortItsGroup {
 605    ACPI_IORT_NODE_HEADER_DEF
 606    uint32_t its_count;
 607    uint32_t identifiers[0];
 608} QEMU_PACKED;
 609typedef struct AcpiIortItsGroup AcpiIortItsGroup;
 610
 611#define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE 1
 612
 613struct AcpiIortSmmu3 {
 614    ACPI_IORT_NODE_HEADER_DEF
 615    uint64_t base_address;
 616    uint32_t flags;
 617    uint32_t reserved2;
 618    uint64_t vatos_address;
 619    uint32_t model;
 620    uint32_t event_gsiv;
 621    uint32_t pri_gsiv;
 622    uint32_t gerr_gsiv;
 623    uint32_t sync_gsiv;
 624    AcpiIortIdMapping id_mapping_array[0];
 625} QEMU_PACKED;
 626typedef struct AcpiIortSmmu3 AcpiIortSmmu3;
 627
 628struct AcpiIortRC {
 629    ACPI_IORT_NODE_HEADER_DEF
 630    AcpiIortMemoryAccess memory_properties;
 631    uint32_t ats_attribute;
 632    uint32_t pci_segment_number;
 633    AcpiIortIdMapping id_mapping_array[0];
 634} QEMU_PACKED;
 635typedef struct AcpiIortRC AcpiIortRC;
 636
 637#endif
 638