LXR qemu/include/hw/i2c/aspeed

   1/*
   2 *  ASPEED AST2400 I2C Controller
   3 *
   4 *  Copyright (C) 2016 IBM Corp.
   5 *
   6 *  This program is free software; you can redistribute it and/or modify
   7 *  it under the terms of the GNU General Public License as published by
   8 *  the Free Software Foundation; either version 2 of the License, or
   9 *  (at your option) any later version.
  10 *
  11 *  This program is distributed in the hope that it will be useful,
  12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 *  GNU General Public License for more details.
  15 *
  16 *  You should have received a copy of the GNU General Public License along
  17 *  with this program; if not, write to the Free Software Foundation, Inc.,
  18 *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19 */
  20#ifndef ASPEED_I2C_H
  21#define ASPEED_I2C_H
  22
  23#include "hw/i2c/i2c.h"
  24
  25#define TYPE_ASPEED_I2C "aspeed.i2c"
  26#define ASPEED_I2C(obj) \
  27    OBJECT_CHECK(AspeedI2CState, (obj), TYPE_ASPEED_I2C)
  28
  29#define ASPEED_I2C_NR_BUSSES 14
  30
  31struct AspeedI2CState;
  32
  33typedef struct AspeedI2CBus {
  34    struct AspeedI2CState *controller;
  35
  36    MemoryRegion mr;
  37
  38    I2CBus *bus;
  39    uint8_t id;
  40
  41    uint32_t ctrl;
  42    uint32_t timing[2];
  43    uint32_t intr_ctrl;
  44    uint32_t intr_status;
  45    uint32_t cmd;
  46    uint32_t buf;
  47} AspeedI2CBus;
  48
  49typedef struct AspeedI2CState {
  50    SysBusDevice parent_obj;
  51
  52    MemoryRegion iomem;
  53    qemu_irq irq;
  54
  55    uint32_t intr_status;
  56
  57    AspeedI2CBus busses[ASPEED_I2C_NR_BUSSES];
  58} AspeedI2CState;
  59
  60I2CBus *aspeed_i2c_get_bus(DeviceState *dev, int busnr);
  61
  62#endif /* ASPEED_I2C_H */
  63