LXR qemu/include/hw/isa/i8259

   1/*
   2 * QEMU 8259 - internal interfaces
   3 *
   4 * Copyright (c) 2011 Jan Kiszka, Siemens AG
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24
  25#ifndef QEMU_I8259_INTERNAL_H
  26#define QEMU_I8259_INTERNAL_H
  27
  28#include "hw/hw.h"
  29#include "hw/i386/pc.h"
  30#include "hw/isa/isa.h"
  31#include "hw/intc/intc.h"
  32
  33typedef struct PICCommonState PICCommonState;
  34
  35#define TYPE_PIC_COMMON "pic-common"
  36#define PIC_COMMON(obj) \
  37     OBJECT_CHECK(PICCommonState, (obj), TYPE_PIC_COMMON)
  38#define PIC_COMMON_CLASS(klass) \
  39     OBJECT_CLASS_CHECK(PICCommonClass, (klass), TYPE_PIC_COMMON)
  40#define PIC_COMMON_GET_CLASS(obj) \
  41     OBJECT_GET_CLASS(PICCommonClass, (obj), TYPE_PIC_COMMON)
  42
  43typedef struct PICCommonClass
  44{
  45    ISADeviceClass parent_class;
  46
  47    void (*pre_save)(PICCommonState *s);
  48    void (*post_load)(PICCommonState *s);
  49} PICCommonClass;
  50
  51struct PICCommonState {
  52    ISADevice parent_obj;
  53
  54    uint8_t last_irr; /* edge detection */
  55    uint8_t irr; /* interrupt request register */
  56    uint8_t imr; /* interrupt mask register */
  57    uint8_t isr; /* interrupt service register */
  58    uint8_t priority_add; /* highest irq priority */
  59    uint8_t irq_base;
  60    uint8_t read_reg_select;
  61    uint8_t poll;
  62    uint8_t special_mask;
  63    uint8_t init_state;
  64    uint8_t auto_eoi;
  65    uint8_t rotate_on_auto_eoi;
  66    uint8_t special_fully_nested_mode;
  67    uint8_t init4; /* true if 4 byte init */
  68    uint8_t single_mode; /* true if slave pic is not initialized */
  69    uint8_t elcr; /* PIIX edge/trigger selection*/
  70    uint8_t elcr_mask;
  71    qemu_irq int_out[1];
  72    uint32_t master; /* reflects /SP input pin */
  73    uint32_t iobase;
  74    uint32_t elcr_addr;
  75    MemoryRegion base_io;
  76    MemoryRegion elcr_io;
  77};
  78
  79void pic_reset_common(PICCommonState *s);
  80ISADevice *i8259_init_chip(const char *name, ISABus *bus, bool master);
  81void pic_stat_update_irq(int irq, int level);
  82bool pic_get_statistics(InterruptStatsProvider *obj,
  83                        uint64_t **irq_counts, unsigned int *nb_irqs);
  84void pic_print_info(InterruptStatsProvider *obj, Monitor *mon);
  85
  86#endif /* QEMU_I8259_INTERNAL_H */
  87