LXR qemu/include/hw/misc/auxbus.h

   1/*
   2 * auxbus.h
   3 *
   4 *  Copyright (C)2014 : GreenSocs Ltd
   5 *      http://www.greensocs.com/ , email: info@greensocs.com
   6 *
   7 *  Developed by :
   8 *  Frederic Konrad   <fred.konrad@greensocs.com>
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License as published by
  12 * the Free Software Foundation, either version 2 of the License, or
  13 * (at your option)any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License along
  21 * with this program; if not, see <http://www.gnu.org/licenses/>.
  22 *
  23 */
  24
  25#ifndef HW_MISC_AUXBUS_H
  26#define HW_MISC_AUXBUS_H
  27
  28#include "hw/qdev.h"
  29
  30typedef struct AUXBus AUXBus;
  31typedef struct AUXSlave AUXSlave;
  32typedef enum AUXCommand AUXCommand;
  33typedef enum AUXReply AUXReply;
  34typedef struct AUXTOI2CState AUXTOI2CState;
  35
  36enum AUXCommand {
  37    WRITE_I2C = 0,
  38    READ_I2C = 1,
  39    WRITE_I2C_STATUS = 2,
  40    WRITE_I2C_MOT = 4,
  41    READ_I2C_MOT = 5,
  42    WRITE_AUX = 8,
  43    READ_AUX = 9
  44};
  45
  46enum AUXReply {
  47    AUX_I2C_ACK = 0,
  48    AUX_NACK = 1,
  49    AUX_DEFER = 2,
  50    AUX_I2C_NACK = 4,
  51    AUX_I2C_DEFER = 8
  52};
  53
  54#define TYPE_AUX_BUS "aux-bus"
  55#define AUX_BUS(obj) OBJECT_CHECK(AUXBus, (obj), TYPE_AUX_BUS)
  56
  57struct AUXBus {
  58    /* < private > */
  59    BusState qbus;
  60
  61    /* < public > */
  62    AUXSlave *current_dev;
  63    AUXSlave *dev;
  64    uint32_t last_i2c_address;
  65    AUXCommand last_transaction;
  66
  67    AUXTOI2CState *bridge;
  68
  69    MemoryRegion *aux_io;
  70    AddressSpace aux_addr_space;
  71};
  72
  73#define TYPE_AUX_SLAVE "aux-slave"
  74#define AUX_SLAVE(obj) \
  75     OBJECT_CHECK(AUXSlave, (obj), TYPE_AUX_SLAVE)
  76
  77struct AUXSlave {
  78    /* < private > */
  79    DeviceState parent_obj;
  80
  81    /* < public > */
  82    MemoryRegion *mmio;
  83};
  84
  85/**
  86 * aux_init_bus: Initialize an AUX bus.
  87 *
  88 * Returns the new AUX bus created.
  89 *
  90 * @parent The device where this bus is located.
  91 * @name The name of the bus.
  92 */
  93AUXBus *aux_init_bus(DeviceState *parent, const char *name);
  94
  95/*
  96 * aux_request: Make a request on the bus.
  97 *
  98 * Returns the reply of the request.
  99 *
 100 * @bus Ths bus where the request happen.
 101 * @cmd The command requested.
 102 * @address The 20bits address of the slave.
 103 * @len The length of the read or write.
 104 * @data The data array which will be filled or read during transfer.
 105 */
 106AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
 107                              uint8_t len, uint8_t *data);
 108
 109/*
 110 * aux_get_i2c_bus: Get the i2c bus for I2C over AUX command.
 111 *
 112 * Returns the i2c bus associated to this AUX bus.
 113 *
 114 * @bus The AUX bus.
 115 */
 116I2CBus *aux_get_i2c_bus(AUXBus *bus);
 117
 118/*
 119 * aux_init_mmio: Init an mmio for an AUX slave.
 120 *
 121 * @aux_slave The AUX slave.
 122 * @mmio The mmio to be registered.
 123 */
 124void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio);
 125
 126/* aux_create_slave: Create a new device on an AUX bus
 127 *
 128 * @bus The AUX bus for the new device.
 129 * @name The type of the device to be created.
 130 */
 131DeviceState *aux_create_slave(AUXBus *bus, const char *name);
 132
 133/* aux_map_slave: Map the mmio for an AUX slave on the bus.
 134 *
 135 * @dev The AUX slave.
 136 * @addr The address for the slave's mmio.
 137 */
 138void aux_map_slave(AUXSlave *dev, hwaddr addr);
 139
 140#endif /* HW_MISC_AUXBUS_H */
 141