LXR qemu/include/hw/net/ftgmac100.h

   1/*
   2 * Faraday FTGMAC100 Gigabit Ethernet
   3 *
   4 * Copyright (C) 2016-2017, IBM Corporation.
   5 *
   6 * This code is licensed under the GPL version 2 or later. See the
   7 * COPYING file in the top-level directory.
   8 */
   9
  10#ifndef FTGMAC100_H
  11#define FTGMAC100_H
  12
  13#define TYPE_FTGMAC100 "ftgmac100"
  14#define FTGMAC100(obj) OBJECT_CHECK(FTGMAC100State, (obj), TYPE_FTGMAC100)
  15
  16#include "hw/sysbus.h"
  17#include "net/net.h"
  18
  19/*
  20 * Max frame size for the receiving buffer
  21 */
  22#define FTGMAC100_MAX_FRAME_SIZE    9220
  23
  24typedef struct FTGMAC100State {
  25    /*< private >*/
  26    SysBusDevice parent_obj;
  27
  28    /*< public >*/
  29    NICState *nic;
  30    NICConf conf;
  31    qemu_irq irq;
  32    MemoryRegion iomem;
  33
  34    uint8_t frame[FTGMAC100_MAX_FRAME_SIZE];
  35
  36    uint32_t irq_state;
  37    uint32_t isr;
  38    uint32_t ier;
  39    uint32_t rx_enabled;
  40    uint32_t rx_ring;
  41    uint32_t rx_descriptor;
  42    uint32_t tx_ring;
  43    uint32_t tx_descriptor;
  44    uint32_t math[2];
  45    uint32_t rbsr;
  46    uint32_t itc;
  47    uint32_t aptcr;
  48    uint32_t dblac;
  49    uint32_t revr;
  50    uint32_t fear1;
  51    uint32_t tpafcr;
  52    uint32_t maccr;
  53    uint32_t phycr;
  54    uint32_t phydata;
  55    uint32_t fcr;
  56
  57
  58    uint32_t phy_status;
  59    uint32_t phy_control;
  60    uint32_t phy_advertise;
  61    uint32_t phy_int;
  62    uint32_t phy_int_mask;
  63
  64    bool aspeed;
  65    uint32_t txdes0_edotr;
  66    uint32_t rxdes0_edorr;
  67} FTGMAC100State;
  68
  69#endif
  70