LXR qemu/include/hw/pci-host/xilinx-pcie.h

   1/*
   2 * Xilinx PCIe host controller emulation.
   3 *
   4 * Copyright (c) 2016 Imagination Technologies
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#ifndef HW_XILINX_PCIE_H
  21#define HW_XILINX_PCIE_H
  22
  23#include "hw/hw.h"
  24#include "hw/sysbus.h"
  25#include "hw/pci/pci.h"
  26#include "hw/pci/pci_bridge.h"
  27#include "hw/pci/pcie_host.h"
  28
  29#define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host"
  30#define XILINX_PCIE_HOST(obj) \
  31     OBJECT_CHECK(XilinxPCIEHost, (obj), TYPE_XILINX_PCIE_HOST)
  32
  33#define TYPE_XILINX_PCIE_ROOT "xilinx-pcie-root"
  34#define XILINX_PCIE_ROOT(obj) \
  35     OBJECT_CHECK(XilinxPCIERoot, (obj), TYPE_XILINX_PCIE_ROOT)
  36
  37typedef struct XilinxPCIERoot {
  38    PCIBridge parent_obj;
  39} XilinxPCIERoot;
  40
  41typedef struct XilinxPCIEInt {
  42    uint32_t fifo_reg1;
  43    uint32_t fifo_reg2;
  44} XilinxPCIEInt;
  45
  46typedef struct XilinxPCIEHost {
  47    PCIExpressHost parent_obj;
  48
  49    char name[16];
  50
  51    uint32_t bus_nr;
  52    uint64_t cfg_base, cfg_size;
  53    uint64_t mmio_base, mmio_size;
  54    bool link_up;
  55    qemu_irq irq;
  56
  57    MemoryRegion mmio, io;
  58
  59    XilinxPCIERoot root;
  60
  61    uint32_t intr;
  62    uint32_t intr_mask;
  63    XilinxPCIEInt intr_fifo[16];
  64    unsigned int intr_fifo_r, intr_fifo_w;
  65    uint32_t rpscr;
  66} XilinxPCIEHost;
  67
  68#endif /* HW_XILINX_PCIE_H */
  69