LXR qemu/include/hw/ppc/pnv

   1/*
   2 * QEMU PowerPC PowerNV LPC controller
   3 *
   4 * Copyright (c) 2016, IBM Corporation.
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#ifndef PPC_PNV_LPC_H
  21#define PPC_PNV_LPC_H
  22
  23#include "hw/ppc/pnv_psi.h"
  24
  25#define TYPE_PNV_LPC "pnv-lpc"
  26#define PNV_LPC(obj) \
  27     OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC)
  28#define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8"
  29#define PNV8_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV8_LPC)
  30
  31#define TYPE_PNV9_LPC TYPE_PNV_LPC "-POWER9"
  32#define PNV9_LPC(obj) OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV9_LPC)
  33
  34typedef struct PnvLpcController {
  35    DeviceState parent;
  36
  37    uint64_t eccb_stat_reg;
  38    uint32_t eccb_data_reg;
  39
  40    /* OPB bus */
  41    MemoryRegion opb_mr;
  42    AddressSpace opb_as;
  43
  44    /* ISA IO and Memory space */
  45    MemoryRegion isa_io;
  46    MemoryRegion isa_mem;
  47    MemoryRegion isa_fw;
  48
  49    /* Windows from OPB to ISA (aliases) */
  50    MemoryRegion opb_isa_io;
  51    MemoryRegion opb_isa_mem;
  52    MemoryRegion opb_isa_fw;
  53
  54    /* Registers */
  55    MemoryRegion lpc_hc_regs;
  56    MemoryRegion opb_master_regs;
  57
  58    /* OPB Master LS registers */
  59    uint32_t opb_irq_route0;
  60    uint32_t opb_irq_route1;
  61    uint32_t opb_irq_stat;
  62    uint32_t opb_irq_mask;
  63    uint32_t opb_irq_pol;
  64    uint32_t opb_irq_input;
  65
  66    /* LPC HC registers */
  67    uint32_t lpc_hc_fw_seg_idsel;
  68    uint32_t lpc_hc_fw_rd_acc_size;
  69    uint32_t lpc_hc_irqser_ctrl;
  70    uint32_t lpc_hc_irqmask;
  71    uint32_t lpc_hc_irqstat;
  72    uint32_t lpc_hc_error_addr;
  73
  74    /* XSCOM registers */
  75    MemoryRegion xscom_regs;
  76
  77    /* PSI to generate interrupts */
  78    PnvPsi *psi;
  79} PnvLpcController;
  80
  81#define PNV_LPC_CLASS(klass) \
  82     OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC)
  83#define PNV_LPC_GET_CLASS(obj) \
  84     OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC)
  85
  86typedef struct PnvLpcClass {
  87    DeviceClass parent_class;
  88
  89    int psi_irq;
  90
  91    DeviceRealize parent_realize;
  92} PnvLpcClass;
  93
  94/*
  95 * Old compilers error on typdef forward declarations. Keep them happy.
  96 */
  97struct PnvChip;
  98
  99ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp);
 100int pnv_dt_lpc(struct PnvChip *chip, void *fdt, int root_offset);
 101
 102#endif /* PPC_PNV_LPC_H */
 103