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19#ifndef HW_SIFIVE_PRCI_H
20#define HW_SIFIVE_PRCI_H
21
22enum {
23 SIFIVE_PRCI_HFROSCCFG = 0x0,
24 SIFIVE_PRCI_HFXOSCCFG = 0x4,
25 SIFIVE_PRCI_PLLCFG = 0x8,
26 SIFIVE_PRCI_PLLOUTDIV = 0xC
27};
28
29enum {
30 SIFIVE_PRCI_HFROSCCFG_RDY = (1 << 31),
31 SIFIVE_PRCI_HFROSCCFG_EN = (1 << 30)
32};
33
34enum {
35 SIFIVE_PRCI_HFXOSCCFG_RDY = (1 << 31),
36 SIFIVE_PRCI_HFXOSCCFG_EN = (1 << 30)
37};
38
39enum {
40 SIFIVE_PRCI_PLLCFG_PLLSEL = (1 << 16),
41 SIFIVE_PRCI_PLLCFG_REFSEL = (1 << 17),
42 SIFIVE_PRCI_PLLCFG_BYPASS = (1 << 18),
43 SIFIVE_PRCI_PLLCFG_LOCK = (1 << 31)
44};
45
46enum {
47 SIFIVE_PRCI_PLLOUTDIV_DIV1 = (1 << 8)
48};
49
50#define TYPE_SIFIVE_PRCI "riscv.sifive.prci"
51
52#define SIFIVE_PRCI(obj) \
53 OBJECT_CHECK(SiFivePRCIState, (obj), TYPE_SIFIVE_PRCI)
54
55typedef struct SiFivePRCIState {
56
57 SysBusDevice parent_obj;
58
59
60 MemoryRegion mmio;
61 uint32_t hfrosccfg;
62 uint32_t hfxosccfg;
63 uint32_t pllcfg;
64 uint32_t plloutdiv;
65} SiFivePRCIState;
66
67DeviceState *sifive_prci_create(hwaddr addr);
68
69#endif
70