1#ifndef ARM_TARGET_SYSCALL_H 2#define ARM_TARGET_SYSCALL_H 3 4/* this struct defines the way the registers are stored on the 5 stack during a system call. */ 6 7/* uregs[0..15] are r0 to r15; uregs[16] is CPSR; uregs[17] is ORIG_r0 */ 8struct target_pt_regs { 9 abi_long uregs[18]; 10}; 11 12#define ARM_SYSCALL_BASE 0x900000 13#define ARM_THUMB_SYSCALL 0 14 15#define ARM_NR_BASE 0xf0000 16#define ARM_NR_breakpoint (ARM_NR_BASE + 1) 17#define ARM_NR_cacheflush (ARM_NR_BASE + 2) 18#define ARM_NR_set_tls (ARM_NR_BASE + 5) 19#define ARM_NR_get_tls (ARM_NR_BASE + 6) 20 21#define ARM_NR_semihosting 0x123456 22#define ARM_NR_thumb_semihosting 0xAB 23 24#if defined(TARGET_WORDS_BIGENDIAN) 25#define UNAME_MACHINE "armv5teb" 26#else 27#define UNAME_MACHINE "armv5tel" 28#endif 29#define UNAME_MINIMUM_RELEASE "2.6.32" 30 31#define TARGET_CLONE_BACKWARDS 32 33#define TARGET_MINSIGSTKSZ 2048 34#define TARGET_MLOCKALL_MCL_CURRENT 1 35#define TARGET_MLOCKALL_MCL_FUTURE 2 36#define TARGET_WANT_OLD_SYS_SELECT 37 38#define TARGET_FORCE_SHMLBA 39 40static inline abi_ulong target_shmlba(CPUARMState *env) 41{ 42 return 4 * 4096; 43} 44 45#endif /* ARM_TARGET_SYSCALL_H */ 46