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20#include "qemu/osdep.h"
21#include "cpu.h"
22#include "exec/exec-all.h"
23#include "qemu/host-utils.h"
24#include "sysemu/sysemu.h"
25#include "hw/semihosting/semihost.h"
26#include "exec/log.h"
27
28bool lm32_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
29 MMUAccessType access_type, int mmu_idx,
30 bool probe, uintptr_t retaddr)
31{
32 LM32CPU *cpu = LM32_CPU(cs);
33 CPULM32State *env = &cpu->env;
34 int prot;
35
36 address &= TARGET_PAGE_MASK;
37 prot = PAGE_BITS;
38 if (env->flags & LM32_FLAG_IGNORE_MSB) {
39 tlb_set_page(cs, address, address & 0x7fffffff, prot, mmu_idx,
40 TARGET_PAGE_SIZE);
41 } else {
42 tlb_set_page(cs, address, address, prot, mmu_idx, TARGET_PAGE_SIZE);
43 }
44 return true;
45}
46
47hwaddr lm32_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
48{
49 LM32CPU *cpu = LM32_CPU(cs);
50
51 addr &= TARGET_PAGE_MASK;
52 if (cpu->env.flags & LM32_FLAG_IGNORE_MSB) {
53 return addr & 0x7fffffff;
54 } else {
55 return addr;
56 }
57}
58
59void lm32_breakpoint_insert(CPULM32State *env, int idx, target_ulong address)
60{
61 cpu_breakpoint_insert(env_cpu(env), address, BP_CPU,
62 &env->cpu_breakpoint[idx]);
63}
64
65void lm32_breakpoint_remove(CPULM32State *env, int idx)
66{
67 if (!env->cpu_breakpoint[idx]) {
68 return;
69 }
70
71 cpu_breakpoint_remove_by_ref(env_cpu(env), env->cpu_breakpoint[idx]);
72 env->cpu_breakpoint[idx] = NULL;
73}
74
75void lm32_watchpoint_insert(CPULM32State *env, int idx, target_ulong address,
76 lm32_wp_t wp_type)
77{
78 int flags = 0;
79
80 switch (wp_type) {
81 case LM32_WP_DISABLED:
82
83 break;
84 case LM32_WP_READ:
85 flags = BP_CPU | BP_STOP_BEFORE_ACCESS | BP_MEM_READ;
86 break;
87 case LM32_WP_WRITE:
88 flags = BP_CPU | BP_STOP_BEFORE_ACCESS | BP_MEM_WRITE;
89 break;
90 case LM32_WP_READ_WRITE:
91 flags = BP_CPU | BP_STOP_BEFORE_ACCESS | BP_MEM_ACCESS;
92 break;
93 }
94
95 if (flags != 0) {
96 cpu_watchpoint_insert(env_cpu(env), address, 1, flags,
97 &env->cpu_watchpoint[idx]);
98 }
99}
100
101void lm32_watchpoint_remove(CPULM32State *env, int idx)
102{
103 if (!env->cpu_watchpoint[idx]) {
104 return;
105 }
106
107 cpu_watchpoint_remove_by_ref(env_cpu(env), env->cpu_watchpoint[idx]);
108 env->cpu_watchpoint[idx] = NULL;
109}
110
111static bool check_watchpoints(CPULM32State *env)
112{
113 LM32CPU *cpu = env_archcpu(env);
114 int i;
115
116 for (i = 0; i < cpu->num_watchpoints; i++) {
117 if (env->cpu_watchpoint[i] &&
118 env->cpu_watchpoint[i]->flags & BP_WATCHPOINT_HIT) {
119 return true;
120 }
121 }
122 return false;
123}
124
125void lm32_debug_excp_handler(CPUState *cs)
126{
127 LM32CPU *cpu = LM32_CPU(cs);
128 CPULM32State *env = &cpu->env;
129 CPUBreakpoint *bp;
130
131 if (cs->watchpoint_hit) {
132 if (cs->watchpoint_hit->flags & BP_CPU) {
133 cs->watchpoint_hit = NULL;
134 if (check_watchpoints(env)) {
135 raise_exception(env, EXCP_WATCHPOINT);
136 } else {
137 cpu_loop_exit_noexc(cs);
138 }
139 }
140 } else {
141 QTAILQ_FOREACH(bp, &cs->breakpoints, entry) {
142 if (bp->pc == env->pc) {
143 if (bp->flags & BP_CPU) {
144 raise_exception(env, EXCP_BREAKPOINT);
145 }
146 break;
147 }
148 }
149 }
150}
151
152void lm32_cpu_do_interrupt(CPUState *cs)
153{
154 LM32CPU *cpu = LM32_CPU(cs);
155 CPULM32State *env = &cpu->env;
156
157 qemu_log_mask(CPU_LOG_INT,
158 "exception at pc=%x type=%x\n", env->pc, cs->exception_index);
159
160 switch (cs->exception_index) {
161 case EXCP_SYSTEMCALL:
162 if (unlikely(semihosting_enabled())) {
163
164
165 if (lm32_cpu_do_semihosting(cs)) {
166 env->pc += 4;
167 break;
168 }
169 }
170
171 case EXCP_INSN_BUS_ERROR:
172 case EXCP_DATA_BUS_ERROR:
173 case EXCP_DIVIDE_BY_ZERO:
174 case EXCP_IRQ:
175
176 env->regs[R_EA] = env->pc;
177 env->ie |= (env->ie & IE_IE) ? IE_EIE : 0;
178 env->ie &= ~IE_IE;
179 if (env->dc & DC_RE) {
180 env->pc = env->deba + (cs->exception_index * 32);
181 } else {
182 env->pc = env->eba + (cs->exception_index * 32);
183 }
184 log_cpu_state_mask(CPU_LOG_INT, cs, 0);
185 break;
186 case EXCP_BREAKPOINT:
187 case EXCP_WATCHPOINT:
188
189 env->regs[R_BA] = env->pc;
190 env->ie |= (env->ie & IE_IE) ? IE_BIE : 0;
191 env->ie &= ~IE_IE;
192 env->pc = env->deba + (cs->exception_index * 32);
193 log_cpu_state_mask(CPU_LOG_INT, cs, 0);
194 break;
195 default:
196 cpu_abort(cs, "unhandled exception type=%d\n",
197 cs->exception_index);
198 break;
199 }
200}
201
202bool lm32_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
203{
204 LM32CPU *cpu = LM32_CPU(cs);
205 CPULM32State *env = &cpu->env;
206
207 if ((interrupt_request & CPU_INTERRUPT_HARD) && (env->ie & IE_IE)) {
208 cs->exception_index = EXCP_IRQ;
209 lm32_cpu_do_interrupt(cs);
210 return true;
211 }
212 return false;
213}
214
215
216
217
218void cpu_lm32_set_phys_msb_ignore(CPULM32State *env, int value)
219{
220 if (value) {
221 env->flags |= LM32_FLAG_IGNORE_MSB;
222 } else {
223 env->flags &= ~LM32_FLAG_IGNORE_MSB;
224 }
225}
226