LXR qemu/target/openrisc/machine.c

   1/*
   2 * OpenRISC Machine
   3 *
   4 * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2.1 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "cpu.h"
  22#include "hw/hw.h"
  23#include "hw/boards.h"
  24#include "migration/cpu.h"
  25
  26static const VMStateDescription vmstate_tlb_entry = {
  27    .name = "tlb_entry",
  28    .version_id = 1,
  29    .minimum_version_id = 1,
  30    .minimum_version_id_old = 1,
  31    .fields = (VMStateField[]) {
  32        VMSTATE_UINTTL(mr, OpenRISCTLBEntry),
  33        VMSTATE_UINTTL(tr, OpenRISCTLBEntry),
  34        VMSTATE_END_OF_LIST()
  35    }
  36};
  37
  38static const VMStateDescription vmstate_cpu_tlb = {
  39    .name = "cpu_tlb",
  40    .version_id = 2,
  41    .minimum_version_id = 2,
  42    .fields = (VMStateField[]) {
  43        VMSTATE_STRUCT_ARRAY(itlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
  44                             vmstate_tlb_entry, OpenRISCTLBEntry),
  45        VMSTATE_STRUCT_ARRAY(dtlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
  46                             vmstate_tlb_entry, OpenRISCTLBEntry),
  47        VMSTATE_END_OF_LIST()
  48    }
  49};
  50
  51static int get_sr(QEMUFile *f, void *opaque, size_t size,
  52                  const VMStateField *field)
  53{
  54    CPUOpenRISCState *env = opaque;
  55    cpu_set_sr(env, qemu_get_be32(f));
  56    return 0;
  57}
  58
  59static int put_sr(QEMUFile *f, void *opaque, size_t size,
  60                  const VMStateField *field, QJSON *vmdesc)
  61{
  62    CPUOpenRISCState *env = opaque;
  63    qemu_put_be32(f, cpu_get_sr(env));
  64    return 0;
  65}
  66
  67static const VMStateInfo vmstate_sr = {
  68    .name = "sr",
  69    .get = get_sr,
  70    .put = put_sr,
  71};
  72
  73static const VMStateDescription vmstate_env = {
  74    .name = "env",
  75    .version_id = 6,
  76    .minimum_version_id = 6,
  77    .fields = (VMStateField[]) {
  78        VMSTATE_UINTTL_2DARRAY(shadow_gpr, CPUOpenRISCState, 16, 32),
  79        VMSTATE_UINTTL(pc, CPUOpenRISCState),
  80        VMSTATE_UINTTL(ppc, CPUOpenRISCState),
  81        VMSTATE_UINTTL(jmp_pc, CPUOpenRISCState),
  82        VMSTATE_UINTTL(lock_addr, CPUOpenRISCState),
  83        VMSTATE_UINTTL(lock_value, CPUOpenRISCState),
  84        VMSTATE_UINTTL(epcr, CPUOpenRISCState),
  85        VMSTATE_UINTTL(eear, CPUOpenRISCState),
  86
  87        /* Save the architecture value of the SR, not the internally
  88           expanded version.  Since this architecture value does not
  89           exist in memory to be stored, this requires a but of hoop
  90           jumping.  We want OFFSET=0 so that we effectively pass ENV
  91           to the helper functions, and we need to fill in the name by
  92           hand since there's no field of that name.  */
  93        {
  94            .name = "sr",
  95            .version_id = 0,
  96            .size = sizeof(uint32_t),
  97            .info = &vmstate_sr,
  98            .flags = VMS_SINGLE,
  99            .offset = 0
 100        },
 101
 102        VMSTATE_UINT32(vr, CPUOpenRISCState),
 103        VMSTATE_UINT32(upr, CPUOpenRISCState),
 104        VMSTATE_UINT32(cpucfgr, CPUOpenRISCState),
 105        VMSTATE_UINT32(dmmucfgr, CPUOpenRISCState),
 106        VMSTATE_UINT32(immucfgr, CPUOpenRISCState),
 107        VMSTATE_UINT32(evbar, CPUOpenRISCState),
 108        VMSTATE_UINT32(pmr, CPUOpenRISCState),
 109        VMSTATE_UINT32(esr, CPUOpenRISCState),
 110        VMSTATE_UINT32(fpcsr, CPUOpenRISCState),
 111        VMSTATE_UINT64(mac, CPUOpenRISCState),
 112
 113        VMSTATE_STRUCT(tlb, CPUOpenRISCState, 1,
 114                       vmstate_cpu_tlb, CPUOpenRISCTLBContext),
 115
 116        VMSTATE_TIMER_PTR(timer, CPUOpenRISCState),
 117        VMSTATE_UINT32(ttmr, CPUOpenRISCState),
 118
 119        VMSTATE_UINT32(picmr, CPUOpenRISCState),
 120        VMSTATE_UINT32(picsr, CPUOpenRISCState),
 121
 122        VMSTATE_END_OF_LIST()
 123    }
 124};
 125
 126const VMStateDescription vmstate_openrisc_cpu = {
 127    .name = "cpu",
 128    .version_id = 1,
 129    .minimum_version_id = 1,
 130    .fields = (VMStateField[]) {
 131        VMSTATE_CPU(),
 132        VMSTATE_STRUCT(env, OpenRISCCPU, 1, vmstate_env, CPUOpenRISCState),
 133        VMSTATE_END_OF_LIST()
 134    }
 135};
 136