LXR qemu/tests/pnv-xscom-test.c

   1/*
   2 * QTest testcase for PowerNV XSCOM bus
   3 *
   4 * Copyright (c) 2016, IBM Corporation.
   5 *
   6 * This work is licensed under the terms of the GNU GPL, version 2 or
   7 * later. See the COPYING file in the top-level directory.
   8 */
   9#include "qemu/osdep.h"
  10
  11#include "libqtest.h"
  12
  13typedef enum PnvChipType {
  14    PNV_CHIP_POWER8E,     /* AKA Murano (default) */
  15    PNV_CHIP_POWER8,      /* AKA Venice */
  16    PNV_CHIP_POWER8NVL,   /* AKA Naples */
  17    PNV_CHIP_POWER9,      /* AKA Nimbus */
  18} PnvChipType;
  19
  20typedef struct PnvChip {
  21    PnvChipType chip_type;
  22    const char *cpu_model;
  23    uint64_t    xscom_base;
  24    uint64_t    cfam_id;
  25    uint32_t    first_core;
  26} PnvChip;
  27
  28static const PnvChip pnv_chips[] = {
  29    {
  30        .chip_type  = PNV_CHIP_POWER8,
  31        .cpu_model  = "POWER8",
  32        .xscom_base = 0x0003fc0000000000ull,
  33        .cfam_id    = 0x220ea04980000000ull,
  34        .first_core = 0x1,
  35    }, {
  36        .chip_type  = PNV_CHIP_POWER8NVL,
  37        .cpu_model  = "POWER8NVL",
  38        .xscom_base = 0x0003fc0000000000ull,
  39        .cfam_id    = 0x120d304980000000ull,
  40        .first_core = 0x1,
  41    },
  42    {
  43        .chip_type  = PNV_CHIP_POWER9,
  44        .cpu_model  = "POWER9",
  45        .xscom_base = 0x000603fc00000000ull,
  46        .cfam_id    = 0x220d104900008000ull,
  47        .first_core = 0x0,
  48    },
  49};
  50
  51static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
  52{
  53    uint64_t addr = chip->xscom_base;
  54
  55    if (chip->chip_type == PNV_CHIP_POWER9) {
  56        addr |= ((uint64_t) pcba << 3);
  57    } else {
  58        addr |= (((uint64_t) pcba << 4) & ~0xffull) |
  59            (((uint64_t) pcba << 3) & 0x78);
  60    }
  61    return addr;
  62}
  63
  64static uint64_t pnv_xscom_read(QTestState *qts, const PnvChip *chip,
  65                               uint32_t pcba)
  66{
  67    return qtest_readq(qts, pnv_xscom_addr(chip, pcba));
  68}
  69
  70static void test_xscom_cfam_id(QTestState *qts, const PnvChip *chip)
  71{
  72    uint64_t f000f = pnv_xscom_read(qts, chip, 0xf000f);
  73
  74    g_assert_cmphex(f000f, ==, chip->cfam_id);
  75}
  76
  77static void test_cfam_id(const void *data)
  78{
  79    const PnvChip *chip = data;
  80    QTestState *qts;
  81
  82    qts = qtest_initf("-M powernv,accel=tcg -cpu %s", chip->cpu_model);
  83    test_xscom_cfam_id(qts, chip);
  84    qtest_quit(qts);
  85}
  86
  87
  88#define PNV_XSCOM_EX_CORE_BASE    0x10000000ull
  89#define PNV_XSCOM_EX_BASE(core) \
  90    (PNV_XSCOM_EX_CORE_BASE | ((uint64_t)(core) << 24))
  91#define PNV_XSCOM_P9_EC_BASE(core) \
  92    ((uint64_t)(((core) & 0x1F) + 0x20) << 24)
  93
  94#define PNV_XSCOM_EX_DTS_RESULT0     0x50000
  95
  96static void test_xscom_core(QTestState *qts, const PnvChip *chip)
  97{
  98    uint32_t first_core_dts0 = PNV_XSCOM_EX_DTS_RESULT0;
  99    uint64_t dts0;
 100
 101    if (chip->chip_type != PNV_CHIP_POWER9) {
 102        first_core_dts0 |= PNV_XSCOM_EX_BASE(chip->first_core);
 103    } else {
 104        first_core_dts0 |= PNV_XSCOM_P9_EC_BASE(chip->first_core);
 105    }
 106
 107    dts0 = pnv_xscom_read(qts, chip, first_core_dts0);
 108
 109    g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
 110}
 111
 112static void test_core(const void *data)
 113{
 114    const PnvChip *chip = data;
 115    QTestState *qts;
 116
 117    qts = qtest_initf("-M powernv,accel=tcg -cpu %s", chip->cpu_model);
 118    test_xscom_core(qts, chip);
 119    qtest_quit(qts);
 120}
 121
 122static void add_test(const char *name, void (*test)(const void *data))
 123{
 124    int i;
 125
 126    for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
 127        char *tname = g_strdup_printf("pnv-xscom/%s/%s", name,
 128                                      pnv_chips[i].cpu_model);
 129        qtest_add_data_func(tname, &pnv_chips[i], test);
 130        g_free(tname);
 131    }
 132}
 133
 134int main(int argc, char **argv)
 135{
 136    g_test_init(&argc, &argv, NULL);
 137
 138    add_test("cfam_id", test_cfam_id);
 139    add_test("core", test_core);
 140    return g_test_run();
 141}
 142