1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18#include "qemu/osdep.h"
19#include "qemu/error-report.h"
20#include "qemu/cutils.h"
21#include "qemu/units.h"
22#include "qapi/error.h"
23#include "qapi/visitor.h"
24#include "qapi/qapi-visit-common.h"
25#include "sysemu/sysemu.h"
26#include "sysemu/cpus.h"
27#include "sysemu/numa.h"
28#include "sysemu/reset.h"
29
30#include "hw/loader.h"
31#include "hw/irq.h"
32#include "hw/kvm/clock.h"
33#include "hw/i386/microvm.h"
34#include "hw/i386/x86.h"
35#include "hw/i386/pc.h"
36#include "target/i386/cpu.h"
37#include "hw/timer/i8254.h"
38#include "hw/rtc/mc146818rtc.h"
39#include "hw/char/serial.h"
40#include "hw/i386/topology.h"
41#include "hw/i386/e820_memory_layout.h"
42#include "hw/i386/fw_cfg.h"
43#include "hw/virtio/virtio-mmio.h"
44
45#include "cpu.h"
46#include "elf.h"
47#include "kvm_i386.h"
48#include "hw/xen/start_info.h"
49
50#define MICROVM_BIOS_FILENAME "bios-microvm.bin"
51
52static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s)
53{
54 X86MachineState *x86ms = X86_MACHINE(mms);
55 int val;
56
57 val = MIN(x86ms->below_4g_mem_size / KiB, 640);
58 rtc_set_memory(s, 0x15, val);
59 rtc_set_memory(s, 0x16, val >> 8);
60
61 if (x86ms->below_4g_mem_size > 1 * MiB) {
62 val = (x86ms->below_4g_mem_size - 1 * MiB) / KiB;
63 } else {
64 val = 0;
65 }
66 if (val > 65535) {
67 val = 65535;
68 }
69 rtc_set_memory(s, 0x17, val);
70 rtc_set_memory(s, 0x18, val >> 8);
71 rtc_set_memory(s, 0x30, val);
72 rtc_set_memory(s, 0x31, val >> 8);
73
74 if (x86ms->below_4g_mem_size > 16 * MiB) {
75 val = (x86ms->below_4g_mem_size - 16 * MiB) / (64 * KiB);
76 } else {
77 val = 0;
78 }
79 if (val > 65535) {
80 val = 65535;
81 }
82 rtc_set_memory(s, 0x34, val);
83 rtc_set_memory(s, 0x35, val >> 8);
84
85 val = x86ms->above_4g_mem_size / 65536;
86 rtc_set_memory(s, 0x5b, val);
87 rtc_set_memory(s, 0x5c, val >> 8);
88 rtc_set_memory(s, 0x5d, val >> 16);
89}
90
91static void microvm_gsi_handler(void *opaque, int n, int level)
92{
93 GSIState *s = opaque;
94
95 qemu_set_irq(s->ioapic_irq[n], level);
96}
97
98static void microvm_devices_init(MicrovmMachineState *mms)
99{
100 X86MachineState *x86ms = X86_MACHINE(mms);
101 ISABus *isa_bus;
102 ISADevice *rtc_state;
103 GSIState *gsi_state;
104 int i;
105
106
107
108 gsi_state = g_malloc0(sizeof(*gsi_state));
109 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) {
110 x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
111 } else {
112 x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler,
113 gsi_state, GSI_NUM_PINS);
114 }
115
116 isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(),
117 &error_abort);
118 isa_bus_irqs(isa_bus, x86ms->gsi);
119
120 ioapic_init_gsi(gsi_state, "machine");
121
122 kvmclock_create();
123
124 for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) {
125 sysbus_create_simple("virtio-mmio",
126 VIRTIO_MMIO_BASE + i * 512,
127 x86ms->gsi[VIRTIO_IRQ_BASE + i]);
128 }
129
130
131
132 if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) {
133 qemu_irq *i8259;
134
135 i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq());
136 for (i = 0; i < ISA_NUM_IRQS; i++) {
137 gsi_state->i8259_irq[i] = i8259[i];
138 }
139 g_free(i8259);
140 }
141
142 if (mms->pit == ON_OFF_AUTO_ON || mms->pit == ON_OFF_AUTO_AUTO) {
143 if (kvm_pit_in_kernel()) {
144 kvm_pit_init(isa_bus, 0x40);
145 } else {
146 i8254_pit_init(isa_bus, 0x40, 0, NULL);
147 }
148 }
149
150 if (mms->rtc == ON_OFF_AUTO_ON ||
151 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) {
152 rtc_state = mc146818_rtc_init(isa_bus, 2000, NULL);
153 microvm_set_rtc(mms, rtc_state);
154 }
155
156 if (mms->isa_serial) {
157 serial_hds_isa_init(isa_bus, 0, 1);
158 }
159
160 if (bios_name == NULL) {
161 bios_name = MICROVM_BIOS_FILENAME;
162 }
163 x86_bios_rom_init(get_system_memory(), true);
164}
165
166static void microvm_memory_init(MicrovmMachineState *mms)
167{
168 MachineState *machine = MACHINE(mms);
169 X86MachineState *x86ms = X86_MACHINE(mms);
170 MemoryRegion *ram, *ram_below_4g, *ram_above_4g;
171 MemoryRegion *system_memory = get_system_memory();
172 FWCfgState *fw_cfg;
173 ram_addr_t lowmem;
174 int i;
175
176
177
178
179
180
181
182
183
184 if (machine->ram_size >= 0xb0000000) {
185 lowmem = 0x80000000;
186 } else {
187 lowmem = 0xb0000000;
188 }
189
190
191
192
193
194 if (!x86ms->max_ram_below_4g) {
195 x86ms->max_ram_below_4g = 4 * GiB;
196 }
197 if (lowmem > x86ms->max_ram_below_4g) {
198 lowmem = x86ms->max_ram_below_4g;
199 if (machine->ram_size - lowmem > lowmem &&
200 lowmem & (1 * GiB - 1)) {
201 warn_report("There is possibly poor performance as the ram size "
202 " (0x%" PRIx64 ") is more then twice the size of"
203 " max-ram-below-4g (%"PRIu64") and"
204 " max-ram-below-4g is not a multiple of 1G.",
205 (uint64_t)machine->ram_size, x86ms->max_ram_below_4g);
206 }
207 }
208
209 if (machine->ram_size > lowmem) {
210 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
211 x86ms->below_4g_mem_size = lowmem;
212 } else {
213 x86ms->above_4g_mem_size = 0;
214 x86ms->below_4g_mem_size = machine->ram_size;
215 }
216
217 ram = g_malloc(sizeof(*ram));
218 memory_region_allocate_system_memory(ram, NULL, "microvm.ram",
219 machine->ram_size);
220
221 ram_below_4g = g_malloc(sizeof(*ram_below_4g));
222 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram,
223 0, x86ms->below_4g_mem_size);
224 memory_region_add_subregion(system_memory, 0, ram_below_4g);
225
226 e820_add_entry(0, x86ms->below_4g_mem_size, E820_RAM);
227
228 if (x86ms->above_4g_mem_size > 0) {
229 ram_above_4g = g_malloc(sizeof(*ram_above_4g));
230 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram,
231 x86ms->below_4g_mem_size,
232 x86ms->above_4g_mem_size);
233 memory_region_add_subregion(system_memory, 0x100000000ULL,
234 ram_above_4g);
235 e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
236 }
237
238 fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
239 &address_space_memory);
240
241 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, machine->smp.cpus);
242 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, machine->smp.max_cpus);
243 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
244 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
245 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
246 &e820_reserve, sizeof(e820_reserve));
247 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
248 sizeof(struct e820_entry) * e820_get_num_entries());
249
250 rom_set_fw(fw_cfg);
251
252 if (machine->kernel_filename != NULL) {
253 x86_load_linux(x86ms, fw_cfg, 0, true, true);
254 }
255
256 if (mms->option_roms) {
257 for (i = 0; i < nb_option_roms; i++) {
258 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
259 }
260 }
261
262 x86ms->fw_cfg = fw_cfg;
263 x86ms->ioapic_as = &address_space_memory;
264}
265
266static gchar *microvm_get_mmio_cmdline(gchar *name)
267{
268 gchar *cmdline;
269 gchar *separator;
270 long int index;
271 int ret;
272
273 separator = g_strrstr(name, ".");
274 if (!separator) {
275 return NULL;
276 }
277
278 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) {
279 return NULL;
280 }
281
282 cmdline = g_malloc0(VIRTIO_CMDLINE_MAXLEN);
283 ret = g_snprintf(cmdline, VIRTIO_CMDLINE_MAXLEN,
284 " virtio_mmio.device=512@0x%lx:%ld",
285 VIRTIO_MMIO_BASE + index * 512,
286 VIRTIO_IRQ_BASE + index);
287 if (ret < 0 || ret >= VIRTIO_CMDLINE_MAXLEN) {
288 g_free(cmdline);
289 return NULL;
290 }
291
292 return cmdline;
293}
294
295static void microvm_fix_kernel_cmdline(MachineState *machine)
296{
297 X86MachineState *x86ms = X86_MACHINE(machine);
298 BusState *bus;
299 BusChild *kid;
300 char *cmdline;
301
302
303
304
305
306
307
308
309 cmdline = g_strdup(machine->kernel_cmdline);
310 bus = sysbus_get_default();
311 QTAILQ_FOREACH(kid, &bus->children, sibling) {
312 DeviceState *dev = kid->child;
313 ObjectClass *class = object_get_class(OBJECT(dev));
314
315 if (class == object_class_by_name(TYPE_VIRTIO_MMIO)) {
316 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(OBJECT(dev));
317 VirtioBusState *mmio_virtio_bus = &mmio->bus;
318 BusState *mmio_bus = &mmio_virtio_bus->parent_obj;
319
320 if (!QTAILQ_EMPTY(&mmio_bus->children)) {
321 gchar *mmio_cmdline = microvm_get_mmio_cmdline(mmio_bus->name);
322 if (mmio_cmdline) {
323 char *newcmd = g_strjoin(NULL, cmdline, mmio_cmdline, NULL);
324 g_free(mmio_cmdline);
325 g_free(cmdline);
326 cmdline = newcmd;
327 }
328 }
329 }
330 }
331
332 fw_cfg_modify_i32(x86ms->fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(cmdline) + 1);
333 fw_cfg_modify_string(x86ms->fw_cfg, FW_CFG_CMDLINE_DATA, cmdline);
334
335 g_free(cmdline);
336}
337
338static void microvm_machine_state_init(MachineState *machine)
339{
340 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
341 X86MachineState *x86ms = X86_MACHINE(machine);
342 Error *local_err = NULL;
343
344 microvm_memory_init(mms);
345
346 x86_cpus_init(x86ms, CPU_VERSION_LATEST);
347 if (local_err) {
348 error_report_err(local_err);
349 exit(1);
350 }
351
352 microvm_devices_init(mms);
353}
354
355static void microvm_machine_reset(MachineState *machine)
356{
357 MicrovmMachineState *mms = MICROVM_MACHINE(machine);
358 CPUState *cs;
359 X86CPU *cpu;
360
361 if (machine->kernel_filename != NULL &&
362 mms->auto_kernel_cmdline && !mms->kernel_cmdline_fixed) {
363 microvm_fix_kernel_cmdline(machine);
364 mms->kernel_cmdline_fixed = true;
365 }
366
367 qemu_devices_reset();
368
369 CPU_FOREACH(cs) {
370 cpu = X86_CPU(cs);
371
372 if (cpu->apic_state) {
373 device_reset(cpu->apic_state);
374 }
375 }
376}
377
378static void microvm_machine_get_pic(Object *obj, Visitor *v, const char *name,
379 void *opaque, Error **errp)
380{
381 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
382 OnOffAuto pic = mms->pic;
383
384 visit_type_OnOffAuto(v, name, &pic, errp);
385}
386
387static void microvm_machine_set_pic(Object *obj, Visitor *v, const char *name,
388 void *opaque, Error **errp)
389{
390 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
391
392 visit_type_OnOffAuto(v, name, &mms->pic, errp);
393}
394
395static void microvm_machine_get_pit(Object *obj, Visitor *v, const char *name,
396 void *opaque, Error **errp)
397{
398 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
399 OnOffAuto pit = mms->pit;
400
401 visit_type_OnOffAuto(v, name, &pit, errp);
402}
403
404static void microvm_machine_set_pit(Object *obj, Visitor *v, const char *name,
405 void *opaque, Error **errp)
406{
407 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
408
409 visit_type_OnOffAuto(v, name, &mms->pit, errp);
410}
411
412static void microvm_machine_get_rtc(Object *obj, Visitor *v, const char *name,
413 void *opaque, Error **errp)
414{
415 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
416 OnOffAuto rtc = mms->rtc;
417
418 visit_type_OnOffAuto(v, name, &rtc, errp);
419}
420
421static void microvm_machine_set_rtc(Object *obj, Visitor *v, const char *name,
422 void *opaque, Error **errp)
423{
424 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
425
426 visit_type_OnOffAuto(v, name, &mms->rtc, errp);
427}
428
429static bool microvm_machine_get_isa_serial(Object *obj, Error **errp)
430{
431 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
432
433 return mms->isa_serial;
434}
435
436static void microvm_machine_set_isa_serial(Object *obj, bool value,
437 Error **errp)
438{
439 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
440
441 mms->isa_serial = value;
442}
443
444static bool microvm_machine_get_option_roms(Object *obj, Error **errp)
445{
446 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
447
448 return mms->option_roms;
449}
450
451static void microvm_machine_set_option_roms(Object *obj, bool value,
452 Error **errp)
453{
454 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
455
456 mms->option_roms = value;
457}
458
459static bool microvm_machine_get_auto_kernel_cmdline(Object *obj, Error **errp)
460{
461 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
462
463 return mms->auto_kernel_cmdline;
464}
465
466static void microvm_machine_set_auto_kernel_cmdline(Object *obj, bool value,
467 Error **errp)
468{
469 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
470
471 mms->auto_kernel_cmdline = value;
472}
473
474static void microvm_machine_initfn(Object *obj)
475{
476 MicrovmMachineState *mms = MICROVM_MACHINE(obj);
477
478
479 mms->pic = ON_OFF_AUTO_AUTO;
480 mms->pit = ON_OFF_AUTO_AUTO;
481 mms->rtc = ON_OFF_AUTO_AUTO;
482 mms->isa_serial = true;
483 mms->option_roms = true;
484 mms->auto_kernel_cmdline = true;
485
486
487 mms->kernel_cmdline_fixed = false;
488}
489
490static void microvm_class_init(ObjectClass *oc, void *data)
491{
492 MachineClass *mc = MACHINE_CLASS(oc);
493
494 mc->init = microvm_machine_state_init;
495
496 mc->family = "microvm_i386";
497 mc->desc = "microvm (i386)";
498 mc->units_per_default_bus = 1;
499 mc->no_floppy = 1;
500 mc->max_cpus = 288;
501 mc->has_hotpluggable_cpus = false;
502 mc->auto_enable_numa_with_memhp = false;
503 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
504 mc->nvdimm_supported = false;
505
506
507 mc->default_kernel_irqchip_split = true;
508
509
510 mc->reset = microvm_machine_reset;
511
512 object_class_property_add(oc, MICROVM_MACHINE_PIC, "OnOffAuto",
513 microvm_machine_get_pic,
514 microvm_machine_set_pic,
515 NULL, NULL, &error_abort);
516 object_class_property_set_description(oc, MICROVM_MACHINE_PIC,
517 "Enable i8259 PIC", &error_abort);
518
519 object_class_property_add(oc, MICROVM_MACHINE_PIT, "OnOffAuto",
520 microvm_machine_get_pit,
521 microvm_machine_set_pit,
522 NULL, NULL, &error_abort);
523 object_class_property_set_description(oc, MICROVM_MACHINE_PIT,
524 "Enable i8254 PIT", &error_abort);
525
526 object_class_property_add(oc, MICROVM_MACHINE_RTC, "OnOffAuto",
527 microvm_machine_get_rtc,
528 microvm_machine_set_rtc,
529 NULL, NULL, &error_abort);
530 object_class_property_set_description(oc, MICROVM_MACHINE_RTC,
531 "Enable MC146818 RTC", &error_abort);
532
533 object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL,
534 microvm_machine_get_isa_serial,
535 microvm_machine_set_isa_serial,
536 &error_abort);
537 object_class_property_set_description(oc, MICROVM_MACHINE_ISA_SERIAL,
538 "Set off to disable the instantiation an ISA serial port",
539 &error_abort);
540
541 object_class_property_add_bool(oc, MICROVM_MACHINE_OPTION_ROMS,
542 microvm_machine_get_option_roms,
543 microvm_machine_set_option_roms,
544 &error_abort);
545 object_class_property_set_description(oc, MICROVM_MACHINE_OPTION_ROMS,
546 "Set off to disable loading option ROMs", &error_abort);
547
548 object_class_property_add_bool(oc, MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
549 microvm_machine_get_auto_kernel_cmdline,
550 microvm_machine_set_auto_kernel_cmdline,
551 &error_abort);
552 object_class_property_set_description(oc,
553 MICROVM_MACHINE_AUTO_KERNEL_CMDLINE,
554 "Set off to disable adding virtio-mmio devices to the kernel cmdline",
555 &error_abort);
556}
557
558static const TypeInfo microvm_machine_info = {
559 .name = TYPE_MICROVM_MACHINE,
560 .parent = TYPE_X86_MACHINE,
561 .instance_size = sizeof(MicrovmMachineState),
562 .instance_init = microvm_machine_initfn,
563 .class_size = sizeof(MicrovmMachineClass),
564 .class_init = microvm_class_init,
565 .interfaces = (InterfaceInfo[]) {
566 { }
567 },
568};
569
570static void microvm_machine_init(void)
571{
572 type_register_static(µvm_machine_info);
573}
574type_init(microvm_machine_init);
575
