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25#ifndef QEMU_HW_LM32_HWSETUP_H
26#define QEMU_HW_LM32_HWSETUP_H
27
28#include "qemu/cutils.h"
29#include "hw/loader.h"
30
31typedef struct {
32 void *data;
33 void *ptr;
34} HWSetup;
35
36enum hwsetup_tag {
37 HWSETUP_TAG_EOL = 0,
38 HWSETUP_TAG_CPU = 1,
39 HWSETUP_TAG_ASRAM = 2,
40 HWSETUP_TAG_FLASH = 3,
41 HWSETUP_TAG_SDRAM = 4,
42 HWSETUP_TAG_OCM = 5,
43 HWSETUP_TAG_DDR_SDRAM = 6,
44 HWSETUP_TAG_DDR2_SDRAM = 7,
45 HWSETUP_TAG_TIMER = 8,
46 HWSETUP_TAG_UART = 9,
47 HWSETUP_TAG_GPIO = 10,
48 HWSETUP_TAG_TRISPEEDMAC = 11,
49 HWSETUP_TAG_I2CM = 12,
50 HWSETUP_TAG_LEDS = 13,
51 HWSETUP_TAG_7SEG = 14,
52 HWSETUP_TAG_SPI_S = 15,
53 HWSETUP_TAG_SPI_M = 16,
54};
55
56static inline HWSetup *hwsetup_init(void)
57{
58 HWSetup *hw;
59
60 hw = g_malloc(sizeof(HWSetup));
61 hw->data = g_malloc0(TARGET_PAGE_SIZE);
62 hw->ptr = hw->data;
63
64 return hw;
65}
66
67static inline void hwsetup_free(HWSetup *hw)
68{
69 g_free(hw->data);
70 g_free(hw);
71}
72
73static inline void hwsetup_create_rom(HWSetup *hw,
74 hwaddr base)
75{
76 rom_add_blob("hwsetup", hw->data, TARGET_PAGE_SIZE,
77 TARGET_PAGE_SIZE, base, NULL, NULL, NULL, NULL, true);
78}
79
80static inline void hwsetup_add_u8(HWSetup *hw, uint8_t u)
81{
82 stb_p(hw->ptr, u);
83 hw->ptr += 1;
84}
85
86static inline void hwsetup_add_u32(HWSetup *hw, uint32_t u)
87{
88 stl_p(hw->ptr, u);
89 hw->ptr += 4;
90}
91
92static inline void hwsetup_add_tag(HWSetup *hw, enum hwsetup_tag t)
93{
94 stl_p(hw->ptr, t);
95 hw->ptr += 4;
96}
97
98static inline void hwsetup_add_str(HWSetup *hw, const char *str)
99{
100 pstrcpy(hw->ptr, 32, str);
101 hw->ptr += 32;
102}
103
104static inline void hwsetup_add_trailer(HWSetup *hw)
105{
106 hwsetup_add_u32(hw, 8);
107 hwsetup_add_tag(hw, HWSETUP_TAG_EOL);
108}
109
110static inline void hwsetup_add_cpu(HWSetup *hw,
111 const char *name, uint32_t frequency)
112{
113 hwsetup_add_u32(hw, 44);
114 hwsetup_add_tag(hw, HWSETUP_TAG_CPU);
115 hwsetup_add_str(hw, name);
116 hwsetup_add_u32(hw, frequency);
117}
118
119static inline void hwsetup_add_flash(HWSetup *hw,
120 const char *name, uint32_t base, uint32_t size)
121{
122 hwsetup_add_u32(hw, 52);
123 hwsetup_add_tag(hw, HWSETUP_TAG_FLASH);
124 hwsetup_add_str(hw, name);
125 hwsetup_add_u32(hw, base);
126 hwsetup_add_u32(hw, size);
127 hwsetup_add_u8(hw, 8);
128 hwsetup_add_u8(hw, 8);
129 hwsetup_add_u8(hw, 25);
130 hwsetup_add_u8(hw, 32);
131}
132
133static inline void hwsetup_add_ddr_sdram(HWSetup *hw,
134 const char *name, uint32_t base, uint32_t size)
135{
136 hwsetup_add_u32(hw, 48);
137 hwsetup_add_tag(hw, HWSETUP_TAG_DDR_SDRAM);
138 hwsetup_add_str(hw, name);
139 hwsetup_add_u32(hw, base);
140 hwsetup_add_u32(hw, size);
141}
142
143static inline void hwsetup_add_timer(HWSetup *hw,
144 const char *name, uint32_t base, uint32_t irq)
145{
146 hwsetup_add_u32(hw, 56);
147 hwsetup_add_tag(hw, HWSETUP_TAG_TIMER);
148 hwsetup_add_str(hw, name);
149 hwsetup_add_u32(hw, base);
150 hwsetup_add_u8(hw, 1);
151 hwsetup_add_u8(hw, 1);
152 hwsetup_add_u8(hw, 1);
153 hwsetup_add_u8(hw, 32);
154 hwsetup_add_u32(hw, 20);
155 hwsetup_add_u8(hw, irq);
156 hwsetup_add_u8(hw, 0);
157 hwsetup_add_u8(hw, 0);
158 hwsetup_add_u8(hw, 0);
159}
160
161static inline void hwsetup_add_uart(HWSetup *hw,
162 const char *name, uint32_t base, uint32_t irq)
163{
164 hwsetup_add_u32(hw, 56);
165 hwsetup_add_tag(hw, HWSETUP_TAG_UART);
166 hwsetup_add_str(hw, name);
167 hwsetup_add_u32(hw, base);
168 hwsetup_add_u32(hw, 115200);
169 hwsetup_add_u8(hw, 8);
170 hwsetup_add_u8(hw, 1);
171 hwsetup_add_u8(hw, 1);
172 hwsetup_add_u8(hw, 1);
173 hwsetup_add_u8(hw, 1);
174 hwsetup_add_u8(hw, 4);
175 hwsetup_add_u8(hw, 4);
176 hwsetup_add_u8(hw, irq);
177}
178
179#endif
180