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28#include "qemu/osdep.h"
29#include "qemu/event_notifier.h"
30#include "qemu/module.h"
31#include "qemu/thread.h"
32#include "qemu/sockets.h"
33#include "qapi/error.h"
34#include "chardev/char.h"
35#include "hw/irq.h"
36#include "hw/pci/pci.h"
37#include "hw/qdev-properties.h"
38#include "migration/vmstate.h"
39#include "net/can_emu.h"
40
41#include "can_sja1000.h"
42
43#define TYPE_CAN_PCI_DEV "pcm3680_pci"
44
45#define PCM3680i_PCI_DEV(obj) \
46 OBJECT_CHECK(Pcm3680iPCIState, (obj), TYPE_CAN_PCI_DEV)
47
48
49#ifndef PCM3680i_PCI_VENDOR_ID1
50#define PCM3680i_PCI_VENDOR_ID1 0x13fe
51#endif
52
53#ifndef PCM3680i_PCI_DEVICE_ID1
54#define PCM3680i_PCI_DEVICE_ID1 0xc002
55#endif
56
57#define PCM3680i_PCI_SJA_COUNT 2
58#define PCM3680i_PCI_SJA_RANGE 0x100
59
60#define PCM3680i_PCI_BYTES_PER_SJA 0x20
61
62typedef struct Pcm3680iPCIState {
63
64 PCIDevice dev;
65
66 MemoryRegion sja_io[PCM3680i_PCI_SJA_COUNT];
67
68 CanSJA1000State sja_state[PCM3680i_PCI_SJA_COUNT];
69 qemu_irq irq;
70
71 char *model;
72 CanBusState *canbus[PCM3680i_PCI_SJA_COUNT];
73} Pcm3680iPCIState;
74
75static void pcm3680i_pci_reset(DeviceState *dev)
76{
77 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(dev);
78 int i;
79
80 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
81 can_sja_hardware_reset(&d->sja_state[i]);
82 }
83}
84
85static uint64_t pcm3680i_pci_sja1_io_read(void *opaque, hwaddr addr,
86 unsigned size)
87{
88 Pcm3680iPCIState *d = opaque;
89 CanSJA1000State *s = &d->sja_state[0];
90
91 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
92 return 0;
93 }
94
95 return can_sja_mem_read(s, addr, size);
96}
97
98static void pcm3680i_pci_sja1_io_write(void *opaque, hwaddr addr,
99 uint64_t data, unsigned size)
100{
101 Pcm3680iPCIState *d = opaque;
102 CanSJA1000State *s = &d->sja_state[0];
103
104 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
105 return;
106 }
107
108 can_sja_mem_write(s, addr, data, size);
109}
110
111static uint64_t pcm3680i_pci_sja2_io_read(void *opaque, hwaddr addr,
112 unsigned size)
113{
114 Pcm3680iPCIState *d = opaque;
115 CanSJA1000State *s = &d->sja_state[1];
116
117 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
118 return 0;
119 }
120
121 return can_sja_mem_read(s, addr, size);
122}
123
124static void pcm3680i_pci_sja2_io_write(void *opaque, hwaddr addr, uint64_t data,
125 unsigned size)
126{
127 Pcm3680iPCIState *d = opaque;
128 CanSJA1000State *s = &d->sja_state[1];
129
130 if (addr >= PCM3680i_PCI_BYTES_PER_SJA) {
131 return;
132 }
133
134 can_sja_mem_write(s, addr, data, size);
135}
136
137static const MemoryRegionOps pcm3680i_pci_sja1_io_ops = {
138 .read = pcm3680i_pci_sja1_io_read,
139 .write = pcm3680i_pci_sja1_io_write,
140 .endianness = DEVICE_LITTLE_ENDIAN,
141 .impl = {
142 .max_access_size = 1,
143 },
144};
145
146static const MemoryRegionOps pcm3680i_pci_sja2_io_ops = {
147 .read = pcm3680i_pci_sja2_io_read,
148 .write = pcm3680i_pci_sja2_io_write,
149 .endianness = DEVICE_LITTLE_ENDIAN,
150 .impl = {
151 .max_access_size = 1,
152 },
153};
154
155static void pcm3680i_pci_realize(PCIDevice *pci_dev, Error **errp)
156{
157 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(pci_dev);
158 uint8_t *pci_conf;
159 int i;
160
161 pci_conf = pci_dev->config;
162 pci_conf[PCI_INTERRUPT_PIN] = 0x01;
163
164 d->irq = pci_allocate_irq(&d->dev);
165
166 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
167 can_sja_init(&d->sja_state[i], d->irq);
168 }
169
170 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
171 if (can_sja_connect_to_bus(&d->sja_state[i], d->canbus[i]) < 0) {
172 error_setg(errp, "can_sja_connect_to_bus failed");
173 return;
174 }
175 }
176
177 memory_region_init_io(&d->sja_io[0], OBJECT(d), &pcm3680i_pci_sja1_io_ops,
178 d, "pcm3680i_pci-sja1", PCM3680i_PCI_SJA_RANGE);
179
180 memory_region_init_io(&d->sja_io[1], OBJECT(d), &pcm3680i_pci_sja2_io_ops,
181 d, "pcm3680i_pci-sja2", PCM3680i_PCI_SJA_RANGE);
182
183 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
184 pci_register_bar(&d->dev, i, PCI_BASE_ADDRESS_SPACE_IO,
185 &d->sja_io[i]);
186 }
187}
188
189static void pcm3680i_pci_exit(PCIDevice *pci_dev)
190{
191 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(pci_dev);
192 int i;
193
194 for (i = 0; i < PCM3680i_PCI_SJA_COUNT; i++) {
195 can_sja_disconnect(&d->sja_state[i]);
196 }
197
198 qemu_free_irq(d->irq);
199}
200
201static const VMStateDescription vmstate_pcm3680i_pci = {
202 .name = "pcm3680i_pci",
203 .version_id = 1,
204 .minimum_version_id = 1,
205 .minimum_version_id_old = 1,
206 .fields = (VMStateField[]) {
207 VMSTATE_PCI_DEVICE(dev, Pcm3680iPCIState),
208 VMSTATE_STRUCT(sja_state[0], Pcm3680iPCIState, 0,
209 vmstate_can_sja, CanSJA1000State),
210 VMSTATE_STRUCT(sja_state[1], Pcm3680iPCIState, 0,
211 vmstate_can_sja, CanSJA1000State),
212 VMSTATE_END_OF_LIST()
213 }
214};
215
216static void pcm3680i_pci_instance_init(Object *obj)
217{
218 Pcm3680iPCIState *d = PCM3680i_PCI_DEV(obj);
219
220 object_property_add_link(obj, "canbus0", TYPE_CAN_BUS,
221 (Object **)&d->canbus[0],
222 qdev_prop_allow_set_link_before_realize,
223 0, &error_abort);
224 object_property_add_link(obj, "canbus1", TYPE_CAN_BUS,
225 (Object **)&d->canbus[1],
226 qdev_prop_allow_set_link_before_realize,
227 0, &error_abort);
228}
229
230static void pcm3680i_pci_class_init(ObjectClass *klass, void *data)
231{
232 DeviceClass *dc = DEVICE_CLASS(klass);
233 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
234
235 k->realize = pcm3680i_pci_realize;
236 k->exit = pcm3680i_pci_exit;
237 k->vendor_id = PCM3680i_PCI_VENDOR_ID1;
238 k->device_id = PCM3680i_PCI_DEVICE_ID1;
239 k->revision = 0x00;
240 k->class_id = 0x000c09;
241 k->subsystem_vendor_id = PCM3680i_PCI_VENDOR_ID1;
242 k->subsystem_id = PCM3680i_PCI_DEVICE_ID1;
243 dc->desc = "Pcm3680i PCICANx";
244 dc->vmsd = &vmstate_pcm3680i_pci;
245 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
246 dc->reset = pcm3680i_pci_reset;
247}
248
249static const TypeInfo pcm3680i_pci_info = {
250 .name = TYPE_CAN_PCI_DEV,
251 .parent = TYPE_PCI_DEVICE,
252 .instance_size = sizeof(Pcm3680iPCIState),
253 .class_init = pcm3680i_pci_class_init,
254 .instance_init = pcm3680i_pci_instance_init,
255 .interfaces = (InterfaceInfo[]) {
256 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
257 { },
258 },
259};
260
261static void pcm3680i_pci_register_types(void)
262{
263 type_register_static(&pcm3680i_pci_info);
264}
265
266type_init(pcm3680i_pci_register_types)
267
