qemu/hw/ppc/mac_newworld.c
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   1/*
   2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3 *
   4 * Copyright (c) 2004-2007 Fabrice Bellard
   5 * Copyright (c) 2007 Jocelyn Mayer
   6 *
   7 * Permission is hereby granted, free of charge, to any person obtaining a copy
   8 * of this software and associated documentation files (the "Software"), to deal
   9 * in the Software without restriction, including without limitation the rights
  10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11 * copies of the Software, and to permit persons to whom the Software is
  12 * furnished to do so, subject to the following conditions:
  13 *
  14 * The above copyright notice and this permission notice shall be included in
  15 * all copies or substantial portions of the Software.
  16 *
  17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23 * THE SOFTWARE.
  24 *
  25 * PCI bus layout on a real G5 (U3 based):
  26 *
  27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
  28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
  29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
  30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
  32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
  33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
  34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
  35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
  36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
  37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
  38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
  40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
  42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
  43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
  44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
  45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
  46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
  47 */
  48
  49#include "qemu/osdep.h"
  50#include "qemu-common.h"
  51#include "qapi/error.h"
  52#include "hw/ppc/ppc.h"
  53#include "hw/qdev-properties.h"
  54#include "hw/ppc/mac.h"
  55#include "hw/input/adb.h"
  56#include "hw/ppc/mac_dbdma.h"
  57#include "hw/pci/pci.h"
  58#include "net/net.h"
  59#include "sysemu/sysemu.h"
  60#include "hw/boards.h"
  61#include "hw/nvram/fw_cfg.h"
  62#include "hw/char/escc.h"
  63#include "hw/misc/macio/macio.h"
  64#include "hw/ppc/openpic.h"
  65#include "hw/ide.h"
  66#include "hw/loader.h"
  67#include "hw/fw-path-provider.h"
  68#include "elf.h"
  69#include "qemu/error-report.h"
  70#include "sysemu/kvm.h"
  71#include "sysemu/reset.h"
  72#include "kvm_ppc.h"
  73#include "hw/usb.h"
  74#include "exec/address-spaces.h"
  75#include "hw/sysbus.h"
  76#include "trace.h"
  77
  78#define MAX_IDE_BUS 2
  79#define CFG_ADDR 0xf0000510
  80#define TBFREQ (100UL * 1000UL * 1000UL)
  81#define CLOCKFREQ (900UL * 1000UL * 1000UL)
  82#define BUSFREQ (100UL * 1000UL * 1000UL)
  83
  84#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
  85
  86
  87static void fw_cfg_boot_set(void *opaque, const char *boot_device,
  88                            Error **errp)
  89{
  90    fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  91}
  92
  93static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  94{
  95    return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  96}
  97
  98static void ppc_core99_reset(void *opaque)
  99{
 100    PowerPCCPU *cpu = opaque;
 101
 102    cpu_reset(CPU(cpu));
 103    /* 970 CPUs want to get their initial IP as part of their boot protocol */
 104    cpu->env.nip = PROM_ADDR + 0x100;
 105}
 106
 107/* PowerPC Mac99 hardware initialisation */
 108static void ppc_core99_init(MachineState *machine)
 109{
 110    ram_addr_t ram_size = machine->ram_size;
 111    const char *kernel_filename = machine->kernel_filename;
 112    const char *kernel_cmdline = machine->kernel_cmdline;
 113    const char *initrd_filename = machine->initrd_filename;
 114    const char *boot_device = machine->boot_order;
 115    Core99MachineState *core99_machine = CORE99_MACHINE(machine);
 116    PowerPCCPU *cpu = NULL;
 117    CPUPPCState *env = NULL;
 118    char *filename;
 119    IrqLines *openpic_irqs;
 120    int linux_boot, i, j, k;
 121    MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
 122    hwaddr kernel_base, initrd_base, cmdline_base = 0;
 123    long kernel_size, initrd_size;
 124    UNINHostState *uninorth_pci;
 125    PCIBus *pci_bus;
 126    NewWorldMacIOState *macio;
 127    bool has_pmu, has_adb;
 128    MACIOIDEState *macio_ide;
 129    BusState *adb_bus;
 130    MacIONVRAMState *nvr;
 131    int bios_size;
 132    int ppc_boot_device;
 133    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 134    void *fw_cfg;
 135    int machine_arch;
 136    SysBusDevice *s;
 137    DeviceState *dev, *pic_dev;
 138    hwaddr nvram_addr = 0xFFF04000;
 139    uint64_t tbfreq;
 140    unsigned int smp_cpus = machine->smp.cpus;
 141
 142    linux_boot = (kernel_filename != NULL);
 143
 144    /* init CPUs */
 145    for (i = 0; i < smp_cpus; i++) {
 146        cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
 147        env = &cpu->env;
 148
 149        /* Set time-base frequency to 100 Mhz */
 150        cpu_ppc_tb_init(env, TBFREQ);
 151        qemu_register_reset(ppc_core99_reset, cpu);
 152    }
 153
 154    /* allocate RAM */
 155    memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size);
 156    memory_region_add_subregion(get_system_memory(), 0, ram);
 157
 158    /* allocate and load BIOS */
 159    memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE,
 160                           &error_fatal);
 161
 162    if (bios_name == NULL)
 163        bios_name = PROM_FILENAME;
 164    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 165    memory_region_set_readonly(bios, true);
 166    memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios);
 167
 168    /* Load OpenBIOS (ELF) */
 169    if (filename) {
 170        bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
 171                             NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
 172
 173        g_free(filename);
 174    } else {
 175        bios_size = -1;
 176    }
 177    if (bios_size < 0 || bios_size > BIOS_SIZE) {
 178        error_report("could not load PowerPC bios '%s'", bios_name);
 179        exit(1);
 180    }
 181
 182    if (linux_boot) {
 183        uint64_t lowaddr = 0;
 184        int bswap_needed;
 185
 186#ifdef BSWAP_NEEDED
 187        bswap_needed = 1;
 188#else
 189        bswap_needed = 0;
 190#endif
 191        kernel_base = KERNEL_LOAD_ADDR;
 192
 193        kernel_size = load_elf(kernel_filename, NULL,
 194                               translate_kernel_address, NULL,
 195                               NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
 196                               0, 0);
 197        if (kernel_size < 0)
 198            kernel_size = load_aout(kernel_filename, kernel_base,
 199                                    ram_size - kernel_base, bswap_needed,
 200                                    TARGET_PAGE_SIZE);
 201        if (kernel_size < 0)
 202            kernel_size = load_image_targphys(kernel_filename,
 203                                              kernel_base,
 204                                              ram_size - kernel_base);
 205        if (kernel_size < 0) {
 206            error_report("could not load kernel '%s'", kernel_filename);
 207            exit(1);
 208        }
 209        /* load initrd */
 210        if (initrd_filename) {
 211            initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 212            initrd_size = load_image_targphys(initrd_filename, initrd_base,
 213                                              ram_size - initrd_base);
 214            if (initrd_size < 0) {
 215                error_report("could not load initial ram disk '%s'",
 216                             initrd_filename);
 217                exit(1);
 218            }
 219            cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
 220        } else {
 221            initrd_base = 0;
 222            initrd_size = 0;
 223            cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
 224        }
 225        ppc_boot_device = 'm';
 226    } else {
 227        kernel_base = 0;
 228        kernel_size = 0;
 229        initrd_base = 0;
 230        initrd_size = 0;
 231        ppc_boot_device = '\0';
 232        /* We consider that NewWorld PowerMac never have any floppy drive
 233         * For now, OHW cannot boot from the network.
 234         */
 235        for (i = 0; boot_device[i] != '\0'; i++) {
 236            if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 237                ppc_boot_device = boot_device[i];
 238                break;
 239            }
 240        }
 241        if (ppc_boot_device == '\0') {
 242            error_report("No valid boot device for Mac99 machine");
 243            exit(1);
 244        }
 245    }
 246
 247    /* UniN init */
 248    dev = qdev_create(NULL, TYPE_UNI_NORTH);
 249    qdev_init_nofail(dev);
 250    s = SYS_BUS_DEVICE(dev);
 251    memory_region_add_subregion(get_system_memory(), 0xf8000000,
 252                                sysbus_mmio_get_region(s, 0));
 253
 254    openpic_irqs = g_new0(IrqLines, smp_cpus);
 255    for (i = 0; i < smp_cpus; i++) {
 256        /* Mac99 IRQ connection between OpenPIC outputs pins
 257         * and PowerPC input pins
 258         */
 259        switch (PPC_INPUT(env)) {
 260        case PPC_FLAGS_INPUT_6xx:
 261            openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
 262                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 263            openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
 264                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 265            openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
 266                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 267            /* Not connected ? */
 268            openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
 269            /* Check this */
 270            openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
 271                ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 272            break;
 273#if defined(TARGET_PPC64)
 274        case PPC_FLAGS_INPUT_970:
 275            openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
 276                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 277            openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
 278                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 279            openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
 280                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 281            /* Not connected ? */
 282            openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
 283            /* Check this */
 284            openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
 285                ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 286            break;
 287#endif /* defined(TARGET_PPC64) */
 288        default:
 289            error_report("Bus model not supported on mac99 machine");
 290            exit(1);
 291        }
 292    }
 293
 294    pic_dev = qdev_create(NULL, TYPE_OPENPIC);
 295    qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
 296    qdev_init_nofail(pic_dev);
 297    s = SYS_BUS_DEVICE(pic_dev);
 298    k = 0;
 299    for (i = 0; i < smp_cpus; i++) {
 300        for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
 301            sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
 302        }
 303    }
 304    g_free(openpic_irqs);
 305
 306    if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
 307        /* 970 gets a U3 bus */
 308        /* Uninorth AGP bus */
 309        dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE);
 310        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 311                                 &error_abort);
 312        qdev_init_nofail(dev);
 313        uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
 314        s = SYS_BUS_DEVICE(dev);
 315        /* PCI hole */
 316        memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 317                                    sysbus_mmio_get_region(s, 2));
 318        /* Register 8 MB of ISA IO space */
 319        memory_region_add_subregion(get_system_memory(), 0xf2000000,
 320                                    sysbus_mmio_get_region(s, 3));
 321        sysbus_mmio_map(s, 0, 0xf0800000);
 322        sysbus_mmio_map(s, 1, 0xf0c00000);
 323
 324        machine_arch = ARCH_MAC99_U3;
 325    } else {
 326        /* Use values found on a real PowerMac */
 327        /* Uninorth AGP bus */
 328        dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
 329        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 330                                 &error_abort);
 331        qdev_init_nofail(dev);
 332        s = SYS_BUS_DEVICE(dev);
 333        sysbus_mmio_map(s, 0, 0xf0800000);
 334        sysbus_mmio_map(s, 1, 0xf0c00000);
 335
 336        /* Uninorth internal bus */
 337        dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
 338        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 339                                 &error_abort);
 340        qdev_init_nofail(dev);
 341        s = SYS_BUS_DEVICE(dev);
 342        sysbus_mmio_map(s, 0, 0xf4800000);
 343        sysbus_mmio_map(s, 1, 0xf4c00000);
 344
 345        /* Uninorth main bus */
 346        dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
 347        qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
 348        object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
 349                                 &error_abort);
 350        qdev_init_nofail(dev);
 351        uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
 352        s = SYS_BUS_DEVICE(dev);
 353        /* PCI hole */
 354        memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
 355                                    sysbus_mmio_get_region(s, 2));
 356        /* Register 8 MB of ISA IO space */
 357        memory_region_add_subregion(get_system_memory(), 0xf2000000,
 358                                    sysbus_mmio_get_region(s, 3));
 359        sysbus_mmio_map(s, 0, 0xf2800000);
 360        sysbus_mmio_map(s, 1, 0xf2c00000);
 361
 362        machine_arch = ARCH_MAC99;
 363    }
 364
 365    machine->usb |= defaults_enabled() && !machine->usb_disabled;
 366    has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
 367    has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
 368               core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
 369
 370    /* Timebase Frequency */
 371    if (kvm_enabled()) {
 372        tbfreq = kvmppc_get_tbfreq();
 373    } else {
 374        tbfreq = TBFREQ;
 375    }
 376
 377    /* init basic PC hardware */
 378    pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
 379
 380    /* MacIO */
 381    macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO));
 382    dev = DEVICE(macio);
 383    qdev_prop_set_uint64(dev, "frequency", tbfreq);
 384    qdev_prop_set_bit(dev, "has-pmu", has_pmu);
 385    qdev_prop_set_bit(dev, "has-adb", has_adb);
 386    object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
 387                             &error_abort);
 388    qdev_init_nofail(dev);
 389
 390    /* We only emulate 2 out of 3 IDE controllers for now */
 391    ide_drive_get(hd, ARRAY_SIZE(hd));
 392
 393    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 394                                                        "ide[0]"));
 395    macio_ide_init_drives(macio_ide, hd);
 396
 397    macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
 398                                                        "ide[1]"));
 399    macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
 400
 401    if (has_adb) {
 402        if (has_pmu) {
 403            dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
 404        } else {
 405            dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
 406        }
 407
 408        adb_bus = qdev_get_child_bus(dev, "adb.0");
 409        dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
 410        qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
 411        qdev_init_nofail(dev);
 412
 413        dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
 414        qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true);
 415        qdev_init_nofail(dev);
 416    }
 417
 418    if (machine->usb) {
 419        pci_create_simple(pci_bus, -1, "pci-ohci");
 420
 421        /* U3 needs to use USB for input because Linux doesn't support via-cuda
 422        on PPC64 */
 423        if (!has_adb || machine_arch == ARCH_MAC99_U3) {
 424            USBBus *usb_bus = usb_bus_find(-1);
 425
 426            usb_create_simple(usb_bus, "usb-kbd");
 427            usb_create_simple(usb_bus, "usb-mouse");
 428        }
 429    }
 430
 431    pci_vga_init(pci_bus);
 432
 433    if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
 434        graphic_depth = 15;
 435    }
 436
 437    for (i = 0; i < nb_nics; i++) {
 438        pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
 439    }
 440
 441    /* The NewWorld NVRAM is not located in the MacIO device */
 442    if (kvm_enabled() && qemu_real_host_page_size > 4096) {
 443        /* We can't combine read-write and read-only in a single page, so
 444           move the NVRAM out of ROM again for KVM */
 445        nvram_addr = 0xFFE00000;
 446    }
 447    dev = qdev_create(NULL, TYPE_MACIO_NVRAM);
 448    qdev_prop_set_uint32(dev, "size", 0x2000);
 449    qdev_prop_set_uint32(dev, "it_shift", 1);
 450    qdev_init_nofail(dev);
 451    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
 452    nvr = MACIO_NVRAM(dev);
 453    pmac_format_nvram_partition(nvr, 0x2000);
 454    /* No PCI init: the BIOS will do it */
 455
 456    dev = qdev_create(NULL, TYPE_FW_CFG_MEM);
 457    fw_cfg = FW_CFG(dev);
 458    qdev_prop_set_uint32(dev, "data_width", 1);
 459    qdev_prop_set_bit(dev, "dma_enabled", false);
 460    object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
 461                              OBJECT(fw_cfg), NULL);
 462    qdev_init_nofail(dev);
 463    s = SYS_BUS_DEVICE(dev);
 464    sysbus_mmio_map(s, 0, CFG_ADDR);
 465    sysbus_mmio_map(s, 1, CFG_ADDR + 2);
 466
 467    fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
 468    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
 469    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 470    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
 471    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 472    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 473    if (kernel_cmdline) {
 474        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 475        pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 476    } else {
 477        fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 478    }
 479    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 480    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 481    fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 482
 483    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 484    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 485    fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 486
 487    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
 488
 489    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 490    if (kvm_enabled()) {
 491        uint8_t *hypercall;
 492
 493        hypercall = g_malloc(16);
 494        kvmppc_get_hypercall(env, hypercall, 16);
 495        fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 496        fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 497    }
 498    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
 499    /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
 500    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
 501    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
 502    fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
 503
 504    /* MacOS NDRV VGA driver */
 505    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
 506    if (filename) {
 507        gchar *ndrv_file;
 508        gsize ndrv_size;
 509
 510        if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
 511            fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
 512        }
 513        g_free(filename);
 514    }
 515
 516    qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 517}
 518
 519/*
 520 * Implementation of an interface to adjust firmware path
 521 * for the bootindex property handling.
 522 */
 523static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
 524                                DeviceState *dev)
 525{
 526    PCIDevice *pci;
 527    IDEBus *ide_bus;
 528    IDEState *ide_s;
 529    MACIOIDEState *macio_ide;
 530
 531    if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
 532        pci = PCI_DEVICE(dev);
 533        return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
 534    }
 535
 536    if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
 537        macio_ide = MACIO_IDE(dev);
 538        return g_strdup_printf("ata-3@%x", macio_ide->addr);
 539    }
 540
 541    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
 542        ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
 543        ide_s = idebus_active_if(ide_bus);
 544
 545        if (ide_s->drive_kind == IDE_CD) {
 546            return g_strdup("cdrom");
 547        }
 548
 549        return g_strdup("disk");
 550    }
 551
 552    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
 553        return g_strdup("disk");
 554    }
 555
 556    if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
 557        return g_strdup("cdrom");
 558    }
 559
 560    if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
 561        return g_strdup("disk");
 562    }
 563
 564    return NULL;
 565}
 566static int core99_kvm_type(MachineState *machine, const char *arg)
 567{
 568    /* Always force PR KVM */
 569    return 2;
 570}
 571
 572static void core99_machine_class_init(ObjectClass *oc, void *data)
 573{
 574    MachineClass *mc = MACHINE_CLASS(oc);
 575    FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
 576
 577    mc->desc = "Mac99 based PowerMAC";
 578    mc->init = ppc_core99_init;
 579    mc->block_default_type = IF_IDE;
 580    mc->max_cpus = MAX_CPUS;
 581    mc->default_boot_order = "cd";
 582    mc->default_display = "std";
 583    mc->kvm_type = core99_kvm_type;
 584#ifdef TARGET_PPC64
 585    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
 586#else
 587    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
 588#endif
 589    mc->ignore_boot_device_suffixes = true;
 590    fwc->get_dev_path = core99_fw_dev_path;
 591}
 592
 593static char *core99_get_via_config(Object *obj, Error **errp)
 594{
 595    Core99MachineState *cms = CORE99_MACHINE(obj);
 596
 597    switch (cms->via_config) {
 598    default:
 599    case CORE99_VIA_CONFIG_CUDA:
 600        return g_strdup("cuda");
 601
 602    case CORE99_VIA_CONFIG_PMU:
 603        return g_strdup("pmu");
 604
 605    case CORE99_VIA_CONFIG_PMU_ADB:
 606        return g_strdup("pmu-adb");
 607    }
 608}
 609
 610static void core99_set_via_config(Object *obj, const char *value, Error **errp)
 611{
 612    Core99MachineState *cms = CORE99_MACHINE(obj);
 613
 614    if (!strcmp(value, "cuda")) {
 615        cms->via_config = CORE99_VIA_CONFIG_CUDA;
 616    } else if (!strcmp(value, "pmu")) {
 617        cms->via_config = CORE99_VIA_CONFIG_PMU;
 618    } else if (!strcmp(value, "pmu-adb")) {
 619        cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
 620    } else {
 621        error_setg(errp, "Invalid via value");
 622        error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
 623    }
 624}
 625
 626static void core99_instance_init(Object *obj)
 627{
 628    Core99MachineState *cms = CORE99_MACHINE(obj);
 629
 630    /* Default via_config is CORE99_VIA_CONFIG_CUDA */
 631    cms->via_config = CORE99_VIA_CONFIG_CUDA;
 632    object_property_add_str(obj, "via", core99_get_via_config,
 633                            core99_set_via_config, NULL);
 634    object_property_set_description(obj, "via",
 635                                    "Set VIA configuration. "
 636                                    "Valid values are cuda, pmu and pmu-adb",
 637                                    NULL);
 638
 639    return;
 640}
 641
 642static const TypeInfo core99_machine_info = {
 643    .name          = MACHINE_TYPE_NAME("mac99"),
 644    .parent        = TYPE_MACHINE,
 645    .class_init    = core99_machine_class_init,
 646    .instance_init = core99_instance_init,
 647    .instance_size = sizeof(Core99MachineState),
 648    .interfaces = (InterfaceInfo[]) {
 649        { TYPE_FW_PATH_PROVIDER },
 650        { }
 651    },
 652};
 653
 654static void mac_machine_register_types(void)
 655{
 656    type_register_static(&core99_machine_info);
 657}
 658
 659type_init(mac_machine_register_types)
 660