LXR qemu/include/hw/riscv/sifive_u

   1/*
   2 * QEMU SiFive U OTP (One-Time Programmable) Memory interface
   3 *
   4 * Copyright (c) 2019 Bin Meng <bmeng.cn@gmail.com>
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms and conditions of the GNU General Public License,
   8 * version 2 or later, as published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope it will be useful, but WITHOUT
  11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13 * more details.
  14 *
  15 * You should have received a copy of the GNU General Public License along with
  16 * this program.  If not, see <http://www.gnu.org/licenses/>.
  17 */
  18
  19#ifndef HW_SIFIVE_U_OTP_H
  20#define HW_SIFIVE_U_OTP_H
  21
  22#define SIFIVE_U_OTP_PA         0x00
  23#define SIFIVE_U_OTP_PAIO       0x04
  24#define SIFIVE_U_OTP_PAS        0x08
  25#define SIFIVE_U_OTP_PCE        0x0C
  26#define SIFIVE_U_OTP_PCLK       0x10
  27#define SIFIVE_U_OTP_PDIN       0x14
  28#define SIFIVE_U_OTP_PDOUT      0x18
  29#define SIFIVE_U_OTP_PDSTB      0x1C
  30#define SIFIVE_U_OTP_PPROG      0x20
  31#define SIFIVE_U_OTP_PTC        0x24
  32#define SIFIVE_U_OTP_PTM        0x28
  33#define SIFIVE_U_OTP_PTM_REP    0x2C
  34#define SIFIVE_U_OTP_PTR        0x30
  35#define SIFIVE_U_OTP_PTRIM      0x34
  36#define SIFIVE_U_OTP_PWE        0x38
  37
  38#define SIFIVE_U_OTP_PCE_EN     (1 << 0)
  39
  40#define SIFIVE_U_OTP_PDSTB_EN   (1 << 0)
  41
  42#define SIFIVE_U_OTP_PTRIM_EN   (1 << 0)
  43
  44#define SIFIVE_U_OTP_PA_MASK        0xfff
  45#define SIFIVE_U_OTP_NUM_FUSES      0x1000
  46#define SIFIVE_U_OTP_SERIAL_ADDR    0xfc
  47
  48#define SIFIVE_U_OTP_REG_SIZE       0x1000
  49
  50#define TYPE_SIFIVE_U_OTP           "riscv.sifive.u.otp"
  51
  52#define SIFIVE_U_OTP(obj) \
  53    OBJECT_CHECK(SiFiveUOTPState, (obj), TYPE_SIFIVE_U_OTP)
  54
  55typedef struct SiFiveUOTPState {
  56    /*< private >*/
  57    SysBusDevice parent_obj;
  58
  59    /*< public >*/
  60    MemoryRegion mmio;
  61    uint32_t pa;
  62    uint32_t paio;
  63    uint32_t pas;
  64    uint32_t pce;
  65    uint32_t pclk;
  66    uint32_t pdin;
  67    uint32_t pdstb;
  68    uint32_t pprog;
  69    uint32_t ptc;
  70    uint32_t ptm;
  71    uint32_t ptm_rep;
  72    uint32_t ptr;
  73    uint32_t ptrim;
  74    uint32_t pwe;
  75    uint32_t fuse[SIFIVE_U_OTP_NUM_FUSES];
  76    /* config */
  77    uint32_t serial;
  78} SiFiveUOTPState;
  79
  80#endif /* HW_SIFIVE_U_OTP_H */
  81