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20#include "qemu/osdep.h"
21#include "qemu-common.h"
22#include "qemu.h"
23#include "cpu_loop-common.h"
24
25void cpu_loop(CPUMBState *env)
26{
27 CPUState *cs = env_cpu(env);
28 int trapnr, ret;
29 target_siginfo_t info;
30
31 while (1) {
32 cpu_exec_start(cs);
33 trapnr = cpu_exec(cs);
34 cpu_exec_end(cs);
35 process_queued_cpu_work(cs);
36
37 switch (trapnr) {
38 case 0xaa:
39 {
40 info.si_signo = TARGET_SIGSEGV;
41 info.si_errno = 0;
42
43 info.si_code = TARGET_SEGV_MAPERR;
44 info._sifields._sigfault._addr = 0;
45 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
46 }
47 break;
48 case EXCP_INTERRUPT:
49
50 break;
51 case EXCP_BREAK:
52
53 env->regs[14] += 4;
54 env->sregs[SR_PC] = env->regs[14];
55 ret = do_syscall(env,
56 env->regs[12],
57 env->regs[5],
58 env->regs[6],
59 env->regs[7],
60 env->regs[8],
61 env->regs[9],
62 env->regs[10],
63 0, 0);
64 if (ret == -TARGET_ERESTARTSYS) {
65
66 env->sregs[SR_PC] -= 4;
67 } else if (ret != -TARGET_QEMU_ESIGRETURN) {
68 env->regs[3] = ret;
69 }
70
71
72
73
74
75
76 env->regs[14] = env->sregs[SR_PC];
77 break;
78 case EXCP_HW_EXCP:
79 env->regs[17] = env->sregs[SR_PC] + 4;
80 if (env->iflags & D_FLAG) {
81 env->sregs[SR_ESR] |= 1 << 12;
82 env->sregs[SR_PC] -= 4;
83
84 }
85
86 env->iflags &= ~(IMM_FLAG | D_FLAG);
87
88 switch (env->sregs[SR_ESR] & 31) {
89 case ESR_EC_DIVZERO:
90 info.si_signo = TARGET_SIGFPE;
91 info.si_errno = 0;
92 info.si_code = TARGET_FPE_FLTDIV;
93 info._sifields._sigfault._addr = 0;
94 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
95 break;
96 case ESR_EC_FPU:
97 info.si_signo = TARGET_SIGFPE;
98 info.si_errno = 0;
99 if (env->sregs[SR_FSR] & FSR_IO) {
100 info.si_code = TARGET_FPE_FLTINV;
101 }
102 if (env->sregs[SR_FSR] & FSR_DZ) {
103 info.si_code = TARGET_FPE_FLTDIV;
104 }
105 info._sifields._sigfault._addr = 0;
106 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
107 break;
108 default:
109 fprintf(stderr, "Unhandled hw-exception: 0x%" PRIx64 "\n",
110 env->sregs[SR_ESR] & ESR_EC_MASK);
111 cpu_dump_state(cs, stderr, 0);
112 exit(EXIT_FAILURE);
113 break;
114 }
115 break;
116 case EXCP_DEBUG:
117 info.si_signo = TARGET_SIGTRAP;
118 info.si_errno = 0;
119 info.si_code = TARGET_TRAP_BRKPT;
120 queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
121 break;
122 case EXCP_ATOMIC:
123 cpu_exec_step_atomic(cs);
124 break;
125 default:
126 fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
127 cpu_dump_state(cs, stderr, 0);
128 exit(EXIT_FAILURE);
129 }
130 process_pending_signals (env);
131 }
132}
133
134void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
135{
136 env->regs[0] = regs->r0;
137 env->regs[1] = regs->r1;
138 env->regs[2] = regs->r2;
139 env->regs[3] = regs->r3;
140 env->regs[4] = regs->r4;
141 env->regs[5] = regs->r5;
142 env->regs[6] = regs->r6;
143 env->regs[7] = regs->r7;
144 env->regs[8] = regs->r8;
145 env->regs[9] = regs->r9;
146 env->regs[10] = regs->r10;
147 env->regs[11] = regs->r11;
148 env->regs[12] = regs->r12;
149 env->regs[13] = regs->r13;
150 env->regs[14] = regs->r14;
151 env->regs[15] = regs->r15;
152 env->regs[16] = regs->r16;
153 env->regs[17] = regs->r17;
154 env->regs[18] = regs->r18;
155 env->regs[19] = regs->r19;
156 env->regs[20] = regs->r20;
157 env->regs[21] = regs->r21;
158 env->regs[22] = regs->r22;
159 env->regs[23] = regs->r23;
160 env->regs[24] = regs->r24;
161 env->regs[25] = regs->r25;
162 env->regs[26] = regs->r26;
163 env->regs[27] = regs->r27;
164 env->regs[28] = regs->r28;
165 env->regs[29] = regs->r29;
166 env->regs[30] = regs->r30;
167 env->regs[31] = regs->r31;
168 env->sregs[SR_PC] = regs->pc;
169}
170