LXR qemu/hw/intc/nios2

   1/*
   2 * QEMU Altera Internal Interrupt Controller.
   3 *
   4 * Copyright (c) 2012 Chris Wulff <crwulff@gmail.com>
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2.1 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see
  18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
  19 */
  20
  21#include "qemu/osdep.h"
  22#include "qemu/module.h"
  23#include "qapi/error.h"
  24
  25#include "hw/irq.h"
  26#include "hw/sysbus.h"
  27#include "cpu.h"
  28
  29#define TYPE_ALTERA_IIC "altera,iic"
  30#define ALTERA_IIC(obj) \
  31    OBJECT_CHECK(AlteraIIC, (obj), TYPE_ALTERA_IIC)
  32
  33typedef struct AlteraIIC {
  34    SysBusDevice  parent_obj;
  35    void         *cpu;
  36    qemu_irq      parent_irq;
  37} AlteraIIC;
  38
  39static void update_irq(AlteraIIC *pv)
  40{
  41    CPUNios2State *env = &((Nios2CPU *)(pv->cpu))->env;
  42
  43    qemu_set_irq(pv->parent_irq,
  44                 env->regs[CR_IPENDING] & env->regs[CR_IENABLE]);
  45}
  46
  47static void irq_handler(void *opaque, int irq, int level)
  48{
  49    AlteraIIC *pv = opaque;
  50    CPUNios2State *env = &((Nios2CPU *)(pv->cpu))->env;
  51
  52    env->regs[CR_IPENDING] &= ~(1 << irq);
  53    env->regs[CR_IPENDING] |= !!level << irq;
  54
  55    update_irq(pv);
  56}
  57
  58static void altera_iic_init(Object *obj)
  59{
  60    AlteraIIC *pv = ALTERA_IIC(obj);
  61
  62    qdev_init_gpio_in(DEVICE(pv), irq_handler, 32);
  63    sysbus_init_irq(SYS_BUS_DEVICE(obj), &pv->parent_irq);
  64}
  65
  66static void altera_iic_realize(DeviceState *dev, Error **errp)
  67{
  68    struct AlteraIIC *pv = ALTERA_IIC(dev);
  69    Error *err = NULL;
  70
  71    pv->cpu = object_property_get_link(OBJECT(dev), "cpu", &err);
  72    if (!pv->cpu) {
  73        error_setg(errp, "altera,iic: CPU link not found: %s",
  74                   error_get_pretty(err));
  75        return;
  76    }
  77}
  78
  79static void altera_iic_class_init(ObjectClass *klass, void *data)
  80{
  81    DeviceClass *dc = DEVICE_CLASS(klass);
  82
  83    /* Reason: needs to be wired up, e.g. by nios2_10m50_ghrd_init() */
  84    dc->user_creatable = false;
  85    dc->realize = altera_iic_realize;
  86}
  87
  88static TypeInfo altera_iic_info = {
  89    .name          = "altera,iic",
  90    .parent        = TYPE_SYS_BUS_DEVICE,
  91    .instance_size = sizeof(AlteraIIC),
  92    .instance_init = altera_iic_init,
  93    .class_init    = altera_iic_class_init,
  94};
  95
  96static void altera_iic_register(void)
  97{
  98    type_register_static(&altera_iic_info);
  99}
 100
 101type_init(altera_iic_register)
 102