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28#include "qemu/osdep.h"
29#include "qapi/error.h"
30#include "qemu-common.h"
31#include "cpu.h"
32#include "trace.h"
33#include "sysemu/kvm.h"
34#include "hw/ppc/spapr.h"
35#include "hw/ppc/spapr_cpu_core.h"
36#include "hw/ppc/xics.h"
37#include "hw/ppc/xics_spapr.h"
38#include "kvm_ppc.h"
39#include "qemu/config-file.h"
40#include "qemu/error-report.h"
41
42#include <sys/ioctl.h>
43
44static int kernel_xics_fd = -1;
45
46typedef struct KVMEnabledICP {
47 unsigned long vcpu_id;
48 QLIST_ENTRY(KVMEnabledICP) node;
49} KVMEnabledICP;
50
51static QLIST_HEAD(, KVMEnabledICP)
52 kvm_enabled_icps = QLIST_HEAD_INITIALIZER(&kvm_enabled_icps);
53
54static void kvm_disable_icps(void)
55{
56 KVMEnabledICP *enabled_icp, *next;
57
58 QLIST_FOREACH_SAFE(enabled_icp, &kvm_enabled_icps, node, next) {
59 QLIST_REMOVE(enabled_icp, node);
60 g_free(enabled_icp);
61 }
62}
63
64
65
66
67void icp_get_kvm_state(ICPState *icp)
68{
69 uint64_t state;
70 int ret;
71
72
73 if (kernel_xics_fd == -1) {
74 return;
75 }
76
77
78 if (!icp->cs) {
79 return;
80 }
81
82 ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
83 if (ret != 0) {
84 error_report("Unable to retrieve KVM interrupt controller state"
85 " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno));
86 exit(1);
87 }
88
89 icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT;
90 icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT)
91 & KVM_REG_PPC_ICP_MFRR_MASK;
92 icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT)
93 & KVM_REG_PPC_ICP_PPRI_MASK;
94}
95
96static void do_icp_synchronize_state(CPUState *cpu, run_on_cpu_data arg)
97{
98 icp_get_kvm_state(arg.host_ptr);
99}
100
101void icp_synchronize_state(ICPState *icp)
102{
103 if (icp->cs) {
104 run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp));
105 }
106}
107
108int icp_set_kvm_state(ICPState *icp, Error **errp)
109{
110 uint64_t state;
111 int ret;
112
113
114 if (kernel_xics_fd == -1) {
115 return 0;
116 }
117
118
119 if (!icp->cs) {
120 return 0;
121 }
122
123 state = ((uint64_t)icp->xirr << KVM_REG_PPC_ICP_XISR_SHIFT)
124 | ((uint64_t)icp->mfrr << KVM_REG_PPC_ICP_MFRR_SHIFT)
125 | ((uint64_t)icp->pending_priority << KVM_REG_PPC_ICP_PPRI_SHIFT);
126
127 ret = kvm_set_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state);
128 if (ret < 0) {
129 error_setg_errno(errp, -ret,
130 "Unable to restore KVM interrupt controller state (0x%"
131 PRIx64 ") for CPU %ld", state,
132 kvm_arch_vcpu_id(icp->cs));
133 return ret;
134 }
135
136 return 0;
137}
138
139void icp_kvm_realize(DeviceState *dev, Error **errp)
140{
141 ICPState *icp = ICP(dev);
142 CPUState *cs;
143 KVMEnabledICP *enabled_icp;
144 unsigned long vcpu_id;
145 int ret;
146
147
148 if (kernel_xics_fd == -1) {
149 return;
150 }
151
152 cs = icp->cs;
153 vcpu_id = kvm_arch_vcpu_id(cs);
154
155
156
157
158
159
160 QLIST_FOREACH(enabled_icp, &kvm_enabled_icps, node) {
161 if (enabled_icp->vcpu_id == vcpu_id) {
162 return;
163 }
164 }
165
166 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_XICS, 0, kernel_xics_fd, vcpu_id);
167 if (ret < 0) {
168 error_setg(errp, "Unable to connect CPU%ld to kernel XICS: %s", vcpu_id,
169 strerror(errno));
170 return;
171 }
172 enabled_icp = g_malloc(sizeof(*enabled_icp));
173 enabled_icp->vcpu_id = vcpu_id;
174 QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node);
175}
176
177
178
179
180void ics_get_kvm_state(ICSState *ics)
181{
182 uint64_t state;
183 int i;
184
185
186 if (kernel_xics_fd == -1) {
187 return;
188 }
189
190 for (i = 0; i < ics->nr_irqs; i++) {
191 ICSIRQState *irq = &ics->irqs[i];
192
193 if (ics_irq_free(ics, i)) {
194 continue;
195 }
196
197 kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
198 i + ics->offset, &state, false, &error_fatal);
199
200 irq->server = state & KVM_XICS_DESTINATION_MASK;
201 irq->saved_priority = (state >> KVM_XICS_PRIORITY_SHIFT)
202 & KVM_XICS_PRIORITY_MASK;
203
204
205
206
207
208
209
210
211 if (state & KVM_XICS_MASKED) {
212 irq->priority = 0xff;
213 } else {
214 irq->priority = irq->saved_priority;
215 }
216
217 irq->status = 0;
218 if (state & KVM_XICS_PENDING) {
219 if (state & KVM_XICS_LEVEL_SENSITIVE) {
220 irq->status |= XICS_STATUS_ASSERTED;
221 } else {
222
223
224
225
226
227
228
229 irq->status |= XICS_STATUS_MASKED_PENDING
230 | XICS_STATUS_REJECTED;
231 }
232 }
233 if (state & KVM_XICS_PRESENTED) {
234 irq->status |= XICS_STATUS_PRESENTED;
235 }
236 if (state & KVM_XICS_QUEUED) {
237 irq->status |= XICS_STATUS_QUEUED;
238 }
239 }
240}
241
242void ics_synchronize_state(ICSState *ics)
243{
244 ics_get_kvm_state(ics);
245}
246
247int ics_set_kvm_state_one(ICSState *ics, int srcno, Error **errp)
248{
249 uint64_t state;
250 ICSIRQState *irq = &ics->irqs[srcno];
251 int ret;
252
253
254 if (kernel_xics_fd == -1) {
255 return 0;
256 }
257
258 state = irq->server;
259 state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
260 << KVM_XICS_PRIORITY_SHIFT;
261 if (irq->priority != irq->saved_priority) {
262 assert(irq->priority == 0xff);
263 }
264
265 if (irq->priority == 0xff) {
266 state |= KVM_XICS_MASKED;
267 }
268
269 if (irq->flags & XICS_FLAGS_IRQ_LSI) {
270 state |= KVM_XICS_LEVEL_SENSITIVE;
271 if (irq->status & XICS_STATUS_ASSERTED) {
272 state |= KVM_XICS_PENDING;
273 }
274 } else {
275 if (irq->status & XICS_STATUS_MASKED_PENDING) {
276 state |= KVM_XICS_PENDING;
277 }
278 }
279 if (irq->status & XICS_STATUS_PRESENTED) {
280 state |= KVM_XICS_PRESENTED;
281 }
282 if (irq->status & XICS_STATUS_QUEUED) {
283 state |= KVM_XICS_QUEUED;
284 }
285
286 ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
287 srcno + ics->offset, &state, true, errp);
288 if (ret < 0) {
289 return ret;
290 }
291
292 return 0;
293}
294
295int ics_set_kvm_state(ICSState *ics, Error **errp)
296{
297 int i;
298
299
300 if (kernel_xics_fd == -1) {
301 return 0;
302 }
303
304 for (i = 0; i < ics->nr_irqs; i++) {
305 Error *local_err = NULL;
306 int ret;
307
308 if (ics_irq_free(ics, i)) {
309 continue;
310 }
311
312 ret = ics_set_kvm_state_one(ics, i, &local_err);
313 if (ret < 0) {
314 error_propagate(errp, local_err);
315 return ret;
316 }
317 }
318
319 return 0;
320}
321
322void ics_kvm_set_irq(ICSState *ics, int srcno, int val)
323{
324 struct kvm_irq_level args;
325 int rc;
326
327
328 assert(kernel_xics_fd != -1);
329
330 args.irq = srcno + ics->offset;
331 if (ics->irqs[srcno].flags & XICS_FLAGS_IRQ_MSI) {
332 if (!val) {
333 return;
334 }
335 args.level = KVM_INTERRUPT_SET;
336 } else {
337 args.level = val ? KVM_INTERRUPT_SET_LEVEL : KVM_INTERRUPT_UNSET;
338 }
339 rc = kvm_vm_ioctl(kvm_state, KVM_IRQ_LINE, &args);
340 if (rc < 0) {
341 perror("kvm_irq_line");
342 }
343}
344
345int xics_kvm_connect(SpaprInterruptController *intc, Error **errp)
346{
347 ICSState *ics = ICS_SPAPR(intc);
348 int rc;
349 CPUState *cs;
350 Error *local_err = NULL;
351
352
353
354
355
356 if (kernel_xics_fd != -1) {
357 return 0;
358 }
359
360 if (!kvm_enabled() || !kvm_check_extension(kvm_state, KVM_CAP_IRQ_XICS)) {
361 error_setg(errp,
362 "KVM and IRQ_XICS capability must be present for in-kernel XICS");
363 return -1;
364 }
365
366 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_SET_XIVE, "ibm,set-xive");
367 if (rc < 0) {
368 error_setg_errno(&local_err, -rc,
369 "kvmppc_define_rtas_kernel_token: ibm,set-xive");
370 goto fail;
371 }
372
373 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_GET_XIVE, "ibm,get-xive");
374 if (rc < 0) {
375 error_setg_errno(&local_err, -rc,
376 "kvmppc_define_rtas_kernel_token: ibm,get-xive");
377 goto fail;
378 }
379
380 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_ON, "ibm,int-on");
381 if (rc < 0) {
382 error_setg_errno(&local_err, -rc,
383 "kvmppc_define_rtas_kernel_token: ibm,int-on");
384 goto fail;
385 }
386
387 rc = kvmppc_define_rtas_kernel_token(RTAS_IBM_INT_OFF, "ibm,int-off");
388 if (rc < 0) {
389 error_setg_errno(&local_err, -rc,
390 "kvmppc_define_rtas_kernel_token: ibm,int-off");
391 goto fail;
392 }
393
394
395 rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
396 if (rc < 0) {
397 error_setg_errno(&local_err, -rc, "Error on KVM_CREATE_DEVICE for XICS");
398 goto fail;
399 }
400
401 kernel_xics_fd = rc;
402 kvm_kernel_irqchip = true;
403 kvm_msi_via_irqfd_allowed = true;
404 kvm_gsi_direct_mapping = true;
405
406
407 CPU_FOREACH(cs) {
408 PowerPCCPU *cpu = POWERPC_CPU(cs);
409
410 icp_kvm_realize(DEVICE(spapr_cpu_state(cpu)->icp), &local_err);
411 if (local_err) {
412 goto fail;
413 }
414 }
415
416
417 ics_set_kvm_state(ics, &local_err);
418 if (local_err) {
419 goto fail;
420 }
421
422
423 CPU_FOREACH(cs) {
424 PowerPCCPU *cpu = POWERPC_CPU(cs);
425 icp_set_kvm_state(spapr_cpu_state(cpu)->icp, &local_err);
426 if (local_err) {
427 goto fail;
428 }
429 }
430
431 return 0;
432
433fail:
434 error_propagate(errp, local_err);
435 xics_kvm_disconnect(intc);
436 return -1;
437}
438
439void xics_kvm_disconnect(SpaprInterruptController *intc)
440{
441
442
443
444
445
446
447
448 if (kernel_xics_fd != -1) {
449 close(kernel_xics_fd);
450 kernel_xics_fd = -1;
451 }
452
453 kvmppc_define_rtas_kernel_token(0, "ibm,set-xive");
454 kvmppc_define_rtas_kernel_token(0, "ibm,get-xive");
455 kvmppc_define_rtas_kernel_token(0, "ibm,int-on");
456 kvmppc_define_rtas_kernel_token(0, "ibm,int-off");
457
458 kvm_kernel_irqchip = false;
459 kvm_msi_via_irqfd_allowed = false;
460 kvm_gsi_direct_mapping = false;
461
462
463 kvm_disable_icps();
464}
465
466
467
468
469
470
471bool xics_kvm_has_broken_disconnect(SpaprMachineState *spapr)
472{
473 int rc;
474
475 rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
476 if (rc < 0) {
477
478
479
480
481
482 return false;
483 }
484
485 close(rc);
486
487 rc = kvm_create_device(kvm_state, KVM_DEV_TYPE_XICS, false);
488 if (rc >= 0) {
489 close(rc);
490 return false;
491 }
492
493 return errno == EEXIST;
494}
495