LXR qemu/include/exec/gen-icount.h

   1#ifndef GEN_ICOUNT_H
   2#define GEN_ICOUNT_H
   3
   4#include "qemu/timer.h"
   5
   6/* Helpers for instruction counting code generation.  */
   7
   8static TCGOp *icount_start_insn;
   9
  10static inline void gen_io_start(void)
  11{
  12    TCGv_i32 tmp = tcg_const_i32(1);
  13    tcg_gen_st_i32(tmp, cpu_env,
  14                   offsetof(ArchCPU, parent_obj.can_do_io) -
  15                   offsetof(ArchCPU, env));
  16    tcg_temp_free_i32(tmp);
  17}
  18
  19/*
  20 * cpu->can_do_io is cleared automatically at the beginning of
  21 * each translation block.  The cost is minimal and only paid
  22 * for -icount, plus it would be very easy to forget doing it
  23 * in the translator.  Therefore, backends only need to call
  24 * gen_io_start.
  25 */
  26static inline void gen_io_end(void)
  27{
  28    TCGv_i32 tmp = tcg_const_i32(0);
  29    tcg_gen_st_i32(tmp, cpu_env,
  30                   offsetof(ArchCPU, parent_obj.can_do_io) -
  31                   offsetof(ArchCPU, env));
  32    tcg_temp_free_i32(tmp);
  33}
  34
  35static inline void gen_tb_start(TranslationBlock *tb)
  36{
  37    TCGv_i32 count, imm;
  38
  39    tcg_ctx->exitreq_label = gen_new_label();
  40    if (tb_cflags(tb) & CF_USE_ICOUNT) {
  41        count = tcg_temp_local_new_i32();
  42    } else {
  43        count = tcg_temp_new_i32();
  44    }
  45
  46    tcg_gen_ld_i32(count, cpu_env,
  47                   offsetof(ArchCPU, neg.icount_decr.u32) -
  48                   offsetof(ArchCPU, env));
  49
  50    if (tb_cflags(tb) & CF_USE_ICOUNT) {
  51        imm = tcg_temp_new_i32();
  52        /* We emit a movi with a dummy immediate argument. Keep the insn index
  53         * of the movi so that we later (when we know the actual insn count)
  54         * can update the immediate argument with the actual insn count.  */
  55        tcg_gen_movi_i32(imm, 0xdeadbeef);
  56        icount_start_insn = tcg_last_op();
  57
  58        tcg_gen_sub_i32(count, count, imm);
  59        tcg_temp_free_i32(imm);
  60    }
  61
  62    tcg_gen_brcondi_i32(TCG_COND_LT, count, 0, tcg_ctx->exitreq_label);
  63
  64    if (tb_cflags(tb) & CF_USE_ICOUNT) {
  65        tcg_gen_st16_i32(count, cpu_env,
  66                         offsetof(ArchCPU, neg.icount_decr.u16.low) -
  67                         offsetof(ArchCPU, env));
  68        gen_io_end();
  69    }
  70
  71    tcg_temp_free_i32(count);
  72}
  73
  74static inline void gen_tb_end(TranslationBlock *tb, int num_insns)
  75{
  76    if (tb_cflags(tb) & CF_USE_ICOUNT) {
  77        /* Update the num_insn immediate parameter now that we know
  78         * the actual insn count.  */
  79        tcg_set_insn_param(icount_start_insn, 1, num_insns);
  80    }
  81
  82    gen_set_label(tcg_ctx->exitreq_label);
  83    tcg_gen_exit_tb(tb, TB_EXIT_REQUESTED);
  84}
  85
  86#endif
  87