LXR qemu/include/hw/misc/armsse-mhu.h

   1/*
   2 * ARM SSE-200 Message Handling Unit (MHU)
   3 *
   4 * Copyright (c) 2019 Linaro Limited
   5 * Written by Peter Maydell
   6 *
   7 *  This program is free software; you can redistribute it and/or modify
   8 *  it under the terms of the GNU General Public License version 2 or
   9 *  (at your option) any later version.
  10 */
  11
  12/*
  13 * This is a model of the Message Handling Unit (MHU) which is part of the
  14 * Arm SSE-200 and documented in
  15 * http://infocenter.arm.com/help/topic/com.arm.doc.101104_0100_00_en/corelink_sse200_subsystem_for_embedded_technical_reference_manual_101104_0100_00_en.pdf
  16 *
  17 * QEMU interface:
  18 *  + sysbus MMIO region 0: the system information register bank
  19 *  + sysbus IRQ 0: interrupt for CPU 0
  20 *  + sysbus IRQ 1: interrupt for CPU 1
  21 */
  22
  23#ifndef HW_MISC_ARMSSE_MHU_H
  24#define HW_MISC_ARMSSE_MHU_H
  25
  26#include "hw/sysbus.h"
  27
  28#define TYPE_ARMSSE_MHU "armsse-mhu"
  29#define ARMSSE_MHU(obj) OBJECT_CHECK(ARMSSEMHU, (obj), TYPE_ARMSSE_MHU)
  30
  31typedef struct ARMSSEMHU {
  32    /*< private >*/
  33    SysBusDevice parent_obj;
  34
  35    /*< public >*/
  36    MemoryRegion iomem;
  37    qemu_irq cpu0irq;
  38    qemu_irq cpu1irq;
  39
  40    uint32_t cpu0intr;
  41    uint32_t cpu1intr;
  42} ARMSSEMHU;
  43
  44#endif
  45