1/* 2 * QEMU PowerPC PowerNV CPU Core model 3 * 4 * Copyright (c) 2016, IBM Corporation. 5 * 6 * This library is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU Lesser General Public License 8 * as published by the Free Software Foundation; either version 2 of 9 * the License, or (at your option) any later version. 10 * 11 * This library is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * Lesser General Public License for more details. 15 * 16 * You should have received a copy of the GNU Lesser General Public 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20#ifndef PPC_PNV_CORE_H 21#define PPC_PNV_CORE_H 22 23#include "hw/cpu/core.h" 24#include "target/ppc/cpu.h" 25 26#define TYPE_PNV_CORE "powernv-cpu-core" 27#define PNV_CORE(obj) \ 28 OBJECT_CHECK(PnvCore, (obj), TYPE_PNV_CORE) 29#define PNV_CORE_CLASS(klass) \ 30 OBJECT_CLASS_CHECK(PnvCoreClass, (klass), TYPE_PNV_CORE) 31#define PNV_CORE_GET_CLASS(obj) \ 32 OBJECT_GET_CLASS(PnvCoreClass, (obj), TYPE_PNV_CORE) 33 34typedef struct PnvChip PnvChip; 35 36typedef struct PnvCore { 37 /*< private >*/ 38 CPUCore parent_obj; 39 40 /*< public >*/ 41 PowerPCCPU **threads; 42 uint32_t pir; 43 PnvChip *chip; 44 45 MemoryRegion xscom_regs; 46} PnvCore; 47 48typedef struct PnvCoreClass { 49 DeviceClass parent_class; 50 51 const MemoryRegionOps *xscom_ops; 52} PnvCoreClass; 53 54#define PNV_CORE_TYPE_SUFFIX "-" TYPE_PNV_CORE 55#define PNV_CORE_TYPE_NAME(cpu_model) cpu_model PNV_CORE_TYPE_SUFFIX 56 57typedef struct PnvCPUState { 58 Object *intc; 59} PnvCPUState; 60 61static inline PnvCPUState *pnv_cpu_state(PowerPCCPU *cpu) 62{ 63 return (PnvCPUState *)cpu->machine_data; 64} 65 66#define TYPE_PNV_QUAD "powernv-cpu-quad" 67#define PNV_QUAD(obj) \ 68 OBJECT_CHECK(PnvQuad, (obj), TYPE_PNV_QUAD) 69 70typedef struct PnvQuad { 71 DeviceState parent_obj; 72 73 uint32_t id; 74 MemoryRegion xscom_regs; 75} PnvQuad; 76#endif /* PPC_PNV_CORE_H */ 77