1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20#ifndef MOXIE_CPU_H
21#define MOXIE_CPU_H
22
23#include "exec/cpu-defs.h"
24
25#define MOXIE_EX_DIV0 0
26#define MOXIE_EX_BAD 1
27#define MOXIE_EX_IRQ 2
28#define MOXIE_EX_SWI 3
29#define MOXIE_EX_MMU_MISS 4
30#define MOXIE_EX_BREAK 16
31
32typedef struct CPUMoxieState {
33
34 uint32_t flags;
35 uint32_t gregs[16];
36 uint32_t sregs[256];
37 uint32_t pc;
38
39
40 uint32_t cc_a;
41 uint32_t cc_b;
42
43 void *irq[8];
44
45
46 struct {} end_reset_fields;
47} CPUMoxieState;
48
49#include "hw/core/cpu.h"
50
51#define TYPE_MOXIE_CPU "moxie-cpu"
52
53#define MOXIE_CPU_CLASS(klass) \
54 OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
55#define MOXIE_CPU(obj) \
56 OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
57#define MOXIE_CPU_GET_CLASS(obj) \
58 OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
59
60
61
62
63
64
65
66typedef struct MoxieCPUClass {
67
68 CPUClass parent_class;
69
70
71 DeviceRealize parent_realize;
72 void (*parent_reset)(CPUState *cpu);
73} MoxieCPUClass;
74
75
76
77
78
79
80
81typedef struct MoxieCPU {
82
83 CPUState parent_obj;
84
85
86 CPUNegativeOffsetState neg;
87 CPUMoxieState env;
88} MoxieCPU;
89
90
91void moxie_cpu_do_interrupt(CPUState *cs);
92void moxie_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
93hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
94void moxie_translate_init(void);
95int cpu_moxie_signal_handler(int host_signum, void *pinfo,
96 void *puc);
97
98#define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
99#define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
100#define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU
101
102#define cpu_signal_handler cpu_moxie_signal_handler
103
104static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
105{
106 return 0;
107}
108
109typedef CPUMoxieState CPUArchState;
110typedef MoxieCPU ArchCPU;
111
112#include "exec/cpu-all.h"
113
114static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
115 target_ulong *cs_base, uint32_t *flags)
116{
117 *pc = env->pc;
118 *cs_base = 0;
119 *flags = 0;
120}
121
122bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
123 MMUAccessType access_type, int mmu_idx,
124 bool probe, uintptr_t retaddr);
125
126#endif
127