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10#ifndef TRACE__MEM_INTERNAL_H
11#define TRACE__MEM_INTERNAL_H
12
13#define TRACE_MEM_SZ_SHIFT_MASK 0xf
14#define TRACE_MEM_SE (1ULL << 4)
15#define TRACE_MEM_BE (1ULL << 5)
16#define TRACE_MEM_ST (1ULL << 6)
17#define TRACE_MEM_MMU_SHIFT 8
18
19static inline uint16_t trace_mem_build_info(
20 int size_shift, bool sign_extend, MemOp endianness,
21 bool store, unsigned int mmu_idx)
22{
23 uint16_t res;
24
25 res = size_shift & TRACE_MEM_SZ_SHIFT_MASK;
26 if (sign_extend) {
27 res |= TRACE_MEM_SE;
28 }
29 if (endianness == MO_BE) {
30 res |= TRACE_MEM_BE;
31 }
32 if (store) {
33 res |= TRACE_MEM_ST;
34 }
35#ifdef CONFIG_SOFTMMU
36 res |= mmu_idx << TRACE_MEM_MMU_SHIFT;
37#endif
38 return res;
39}
40
41static inline uint16_t trace_mem_get_info(MemOp op,
42 unsigned int mmu_idx,
43 bool store)
44{
45 return trace_mem_build_info(op & MO_SIZE, !!(op & MO_SIGN),
46 op & MO_BSWAP, store,
47 mmu_idx);
48}
49
50
51static inline
52uint16_t trace_mem_build_info_no_se_be(int size_shift, bool store,
53 TCGMemOpIdx oi)
54{
55 return trace_mem_build_info(size_shift, false, MO_BE, store,
56 get_mmuidx(oi));
57}
58
59static inline
60uint16_t trace_mem_build_info_no_se_le(int size_shift, bool store,
61 TCGMemOpIdx oi)
62{
63 return trace_mem_build_info(size_shift, false, MO_LE, store,
64 get_mmuidx(oi));
65}
66
67#endif
68