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10#include "qemu/osdep.h"
11#include "hw/cpu/core.h"
12#include "hw/ppc/spapr_cpu_core.h"
13#include "hw/qdev-properties.h"
14#include "migration/vmstate.h"
15#include "target/ppc/cpu.h"
16#include "hw/ppc/spapr.h"
17#include "qapi/error.h"
18#include "sysemu/cpus.h"
19#include "sysemu/kvm.h"
20#include "target/ppc/kvm_ppc.h"
21#include "hw/ppc/ppc.h"
22#include "target/ppc/mmu-hash64.h"
23#include "sysemu/numa.h"
24#include "sysemu/reset.h"
25#include "sysemu/hw_accel.h"
26#include "qemu/error-report.h"
27
28static void spapr_reset_vcpu(PowerPCCPU *cpu)
29{
30 CPUState *cs = CPU(cpu);
31 CPUPPCState *env = &cpu->env;
32 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
33 SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu);
34 target_ulong lpcr;
35 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
36
37 cpu_reset(cs);
38
39
40
41
42 cs->halted = 1;
43
44 env->spr[SPR_HIOR] = 0;
45
46 lpcr = env->spr[SPR_LPCR];
47
48
49
50
51
52
53
54
55
56
57 lpcr &= ~(LPCR_VPM1 | LPCR_ISL | LPCR_KBV | pcc->lpcr_pm);
58 lpcr |= LPCR_LPES0 | LPCR_LPES1;
59 env->spr[SPR_PSSCR] |= PSSCR_EC;
60
61 ppc_store_lpcr(cpu, lpcr);
62
63
64 env->spr[SPR_AMOR] = 0xffffffffffffffffull;
65
66 spapr_cpu->vpa_addr = 0;
67 spapr_cpu->slb_shadow_addr = 0;
68 spapr_cpu->slb_shadow_size = 0;
69 spapr_cpu->dtl_addr = 0;
70 spapr_cpu->dtl_size = 0;
71
72 spapr_caps_cpu_apply(spapr, cpu);
73
74 kvm_check_mmu(cpu, &error_fatal);
75
76 spapr_irq_cpu_intc_reset(spapr, cpu);
77}
78
79void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip,
80 target_ulong r1, target_ulong r3,
81 target_ulong r4)
82{
83 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
84 CPUPPCState *env = &cpu->env;
85
86 env->nip = nip;
87 env->gpr[1] = r1;
88 env->gpr[3] = r3;
89 env->gpr[4] = r4;
90 kvmppc_set_reg_ppc_online(cpu, 1);
91 CPU(cpu)->halted = 0;
92
93 ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm);
94}
95
96
97
98
99
100const char *spapr_get_cpu_core_type(const char *cpu_type)
101{
102 int len = strlen(cpu_type) - strlen(POWERPC_CPU_TYPE_SUFFIX);
103 char *core_type = g_strdup_printf(SPAPR_CPU_CORE_TYPE_NAME("%.*s"),
104 len, cpu_type);
105 ObjectClass *oc = object_class_by_name(core_type);
106
107 g_free(core_type);
108 if (!oc) {
109 return NULL;
110 }
111
112 return object_class_get_name(oc);
113}
114
115static bool slb_shadow_needed(void *opaque)
116{
117 SpaprCpuState *spapr_cpu = opaque;
118
119 return spapr_cpu->slb_shadow_addr != 0;
120}
121
122static const VMStateDescription vmstate_spapr_cpu_slb_shadow = {
123 .name = "spapr_cpu/vpa/slb_shadow",
124 .version_id = 1,
125 .minimum_version_id = 1,
126 .needed = slb_shadow_needed,
127 .fields = (VMStateField[]) {
128 VMSTATE_UINT64(slb_shadow_addr, SpaprCpuState),
129 VMSTATE_UINT64(slb_shadow_size, SpaprCpuState),
130 VMSTATE_END_OF_LIST()
131 }
132};
133
134static bool dtl_needed(void *opaque)
135{
136 SpaprCpuState *spapr_cpu = opaque;
137
138 return spapr_cpu->dtl_addr != 0;
139}
140
141static const VMStateDescription vmstate_spapr_cpu_dtl = {
142 .name = "spapr_cpu/vpa/dtl",
143 .version_id = 1,
144 .minimum_version_id = 1,
145 .needed = dtl_needed,
146 .fields = (VMStateField[]) {
147 VMSTATE_UINT64(dtl_addr, SpaprCpuState),
148 VMSTATE_UINT64(dtl_size, SpaprCpuState),
149 VMSTATE_END_OF_LIST()
150 }
151};
152
153static bool vpa_needed(void *opaque)
154{
155 SpaprCpuState *spapr_cpu = opaque;
156
157 return spapr_cpu->vpa_addr != 0;
158}
159
160static const VMStateDescription vmstate_spapr_cpu_vpa = {
161 .name = "spapr_cpu/vpa",
162 .version_id = 1,
163 .minimum_version_id = 1,
164 .needed = vpa_needed,
165 .fields = (VMStateField[]) {
166 VMSTATE_UINT64(vpa_addr, SpaprCpuState),
167 VMSTATE_END_OF_LIST()
168 },
169 .subsections = (const VMStateDescription * []) {
170 &vmstate_spapr_cpu_slb_shadow,
171 &vmstate_spapr_cpu_dtl,
172 NULL
173 }
174};
175
176static const VMStateDescription vmstate_spapr_cpu_state = {
177 .name = "spapr_cpu",
178 .version_id = 1,
179 .minimum_version_id = 1,
180 .fields = (VMStateField[]) {
181 VMSTATE_END_OF_LIST()
182 },
183 .subsections = (const VMStateDescription * []) {
184 &vmstate_spapr_cpu_vpa,
185 NULL
186 }
187};
188
189static void spapr_unrealize_vcpu(PowerPCCPU *cpu, SpaprCpuCore *sc)
190{
191 if (!sc->pre_3_0_migration) {
192 vmstate_unregister(NULL, &vmstate_spapr_cpu_state, cpu->machine_data);
193 }
194 spapr_irq_cpu_intc_destroy(SPAPR_MACHINE(qdev_get_machine()), cpu);
195 cpu_remove_sync(CPU(cpu));
196 object_unparent(OBJECT(cpu));
197}
198
199
200
201
202static void spapr_cpu_core_reset(DeviceState *dev)
203{
204 CPUCore *cc = CPU_CORE(dev);
205 SpaprCpuCore *sc = SPAPR_CPU_CORE(dev);
206 int i;
207
208 for (i = 0; i < cc->nr_threads; i++) {
209 spapr_reset_vcpu(sc->threads[i]);
210 }
211}
212
213
214
215
216static void spapr_cpu_core_reset_handler(void *opaque)
217{
218 spapr_cpu_core_reset(opaque);
219}
220
221static void spapr_cpu_core_unrealize(DeviceState *dev, Error **errp)
222{
223 SpaprCpuCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
224 CPUCore *cc = CPU_CORE(dev);
225 int i;
226
227 qemu_unregister_reset(spapr_cpu_core_reset_handler, sc);
228
229 for (i = 0; i < cc->nr_threads; i++) {
230 spapr_unrealize_vcpu(sc->threads[i], sc);
231 }
232 g_free(sc->threads);
233}
234
235static void spapr_realize_vcpu(PowerPCCPU *cpu, SpaprMachineState *spapr,
236 SpaprCpuCore *sc, Error **errp)
237{
238 CPUPPCState *env = &cpu->env;
239 CPUState *cs = CPU(cpu);
240 Error *local_err = NULL;
241
242 object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
243 if (local_err) {
244 goto error;
245 }
246
247
248 cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
249
250 cpu_ppc_set_vhyp(cpu, PPC_VIRTUAL_HYPERVISOR(spapr));
251 kvmppc_set_papr(cpu);
252
253 if (spapr_irq_cpu_intc_create(spapr, cpu, &local_err) < 0) {
254 goto error_intc_create;
255 }
256
257 if (!sc->pre_3_0_migration) {
258 vmstate_register(NULL, cs->cpu_index, &vmstate_spapr_cpu_state,
259 cpu->machine_data);
260 }
261
262 return;
263
264error_intc_create:
265 cpu_remove_sync(CPU(cpu));
266error:
267 error_propagate(errp, local_err);
268}
269
270static PowerPCCPU *spapr_create_vcpu(SpaprCpuCore *sc, int i, Error **errp)
271{
272 SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_GET_CLASS(sc);
273 CPUCore *cc = CPU_CORE(sc);
274 Object *obj;
275 char *id;
276 CPUState *cs;
277 PowerPCCPU *cpu;
278 Error *local_err = NULL;
279
280 obj = object_new(scc->cpu_type);
281
282 cs = CPU(obj);
283 cpu = POWERPC_CPU(obj);
284 cs->cpu_index = cc->core_id + i;
285 spapr_set_vcpu_id(cpu, cs->cpu_index, &local_err);
286 if (local_err) {
287 goto err;
288 }
289
290 cpu->node_id = sc->node_id;
291
292 id = g_strdup_printf("thread[%d]", i);
293 object_property_add_child(OBJECT(sc), id, obj, &local_err);
294 g_free(id);
295 if (local_err) {
296 goto err;
297 }
298
299 cpu->machine_data = g_new0(SpaprCpuState, 1);
300
301 object_unref(obj);
302 return cpu;
303
304err:
305 object_unref(obj);
306 error_propagate(errp, local_err);
307 return NULL;
308}
309
310static void spapr_delete_vcpu(PowerPCCPU *cpu, SpaprCpuCore *sc)
311{
312 SpaprCpuState *spapr_cpu = spapr_cpu_state(cpu);
313
314 cpu->machine_data = NULL;
315 g_free(spapr_cpu);
316 object_unparent(OBJECT(cpu));
317}
318
319static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
320{
321
322
323
324 SpaprMachineState *spapr =
325 (SpaprMachineState *) object_dynamic_cast(qdev_get_machine(),
326 TYPE_SPAPR_MACHINE);
327 SpaprCpuCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
328 CPUCore *cc = CPU_CORE(OBJECT(dev));
329 Error *local_err = NULL;
330 int i, j;
331
332 if (!spapr) {
333 error_setg(errp, TYPE_SPAPR_CPU_CORE " needs a pseries machine");
334 return;
335 }
336
337 sc->threads = g_new(PowerPCCPU *, cc->nr_threads);
338 for (i = 0; i < cc->nr_threads; i++) {
339 sc->threads[i] = spapr_create_vcpu(sc, i, &local_err);
340 if (local_err) {
341 goto err;
342 }
343 }
344
345 for (j = 0; j < cc->nr_threads; j++) {
346 spapr_realize_vcpu(sc->threads[j], spapr, sc, &local_err);
347 if (local_err) {
348 goto err_unrealize;
349 }
350 }
351
352 qemu_register_reset(spapr_cpu_core_reset_handler, sc);
353 return;
354
355err_unrealize:
356 while (--j >= 0) {
357 spapr_unrealize_vcpu(sc->threads[j], sc);
358 }
359err:
360 while (--i >= 0) {
361 spapr_delete_vcpu(sc->threads[i], sc);
362 }
363 g_free(sc->threads);
364 error_propagate(errp, local_err);
365}
366
367static Property spapr_cpu_core_properties[] = {
368 DEFINE_PROP_INT32("node-id", SpaprCpuCore, node_id, CPU_UNSET_NUMA_NODE_ID),
369 DEFINE_PROP_BOOL("pre-3.0-migration", SpaprCpuCore, pre_3_0_migration,
370 false),
371 DEFINE_PROP_END_OF_LIST()
372};
373
374static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
375{
376 DeviceClass *dc = DEVICE_CLASS(oc);
377 SpaprCpuCoreClass *scc = SPAPR_CPU_CORE_CLASS(oc);
378
379 dc->realize = spapr_cpu_core_realize;
380 dc->unrealize = spapr_cpu_core_unrealize;
381 dc->reset = spapr_cpu_core_reset;
382 device_class_set_props(dc, spapr_cpu_core_properties);
383 scc->cpu_type = data;
384}
385
386#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \
387 { \
388 .parent = TYPE_SPAPR_CPU_CORE, \
389 .class_data = (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \
390 .class_init = spapr_cpu_core_class_init, \
391 .name = SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \
392 }
393
394static const TypeInfo spapr_cpu_core_type_infos[] = {
395 {
396 .name = TYPE_SPAPR_CPU_CORE,
397 .parent = TYPE_CPU_CORE,
398 .abstract = true,
399 .instance_size = sizeof(SpaprCpuCore),
400 .class_size = sizeof(SpaprCpuCoreClass),
401 },
402 DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"),
403 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"),
404 DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"),
405 DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"),
406 DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"),
407 DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"),
408 DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"),
409 DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"),
410 DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"),
411 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"),
412 DEFINE_SPAPR_CPU_CORE_TYPE("power9_v2.0"),
413#ifdef CONFIG_KVM
414 DEFINE_SPAPR_CPU_CORE_TYPE("host"),
415#endif
416};
417
418DEFINE_TYPES(spapr_cpu_core_type_infos)
419
