LXR qemu/include/hw/char/pl011.h

   1/*
   2 * This program is free software; you can redistribute it and/or modify it
   3 * under the terms and conditions of the GNU General Public License,
   4 * version 2 or later, as published by the Free Software Foundation.
   5 *
   6 * This program is distributed in the hope it will be useful, but WITHOUT
   7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   8 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   9 * more details.
  10 *
  11 * You should have received a copy of the GNU General Public License along with
  12 * this program.  If not, see <http://www.gnu.org/licenses/>.
  13 */
  14
  15#ifndef HW_PL011_H
  16#define HW_PL011_H
  17
  18#include "hw/qdev-properties.h"
  19#include "hw/sysbus.h"
  20#include "chardev/char-fe.h"
  21#include "qapi/error.h"
  22
  23#define TYPE_PL011 "pl011"
  24#define PL011(obj) OBJECT_CHECK(PL011State, (obj), TYPE_PL011)
  25
  26/* This shares the same struct (and cast macro) as the base pl011 device */
  27#define TYPE_PL011_LUMINARY "pl011_luminary"
  28
  29typedef struct PL011State {
  30    SysBusDevice parent_obj;
  31
  32    MemoryRegion iomem;
  33    uint32_t readbuff;
  34    uint32_t flags;
  35    uint32_t lcr;
  36    uint32_t rsr;
  37    uint32_t cr;
  38    uint32_t dmacr;
  39    uint32_t int_enabled;
  40    uint32_t int_level;
  41    uint32_t read_fifo[16];
  42    uint32_t ilpr;
  43    uint32_t ibrd;
  44    uint32_t fbrd;
  45    uint32_t ifl;
  46    int read_pos;
  47    int read_count;
  48    int read_trigger;
  49    CharBackend chr;
  50    qemu_irq irq[6];
  51    const unsigned char *id;
  52} PL011State;
  53
  54static inline DeviceState *pl011_create(hwaddr addr,
  55                                        qemu_irq irq,
  56                                        Chardev *chr)
  57{
  58    DeviceState *dev;
  59    SysBusDevice *s;
  60
  61    dev = qdev_new("pl011");
  62    s = SYS_BUS_DEVICE(dev);
  63    qdev_prop_set_chr(dev, "chardev", chr);
  64    sysbus_realize_and_unref(s, &error_fatal);
  65    sysbus_mmio_map(s, 0, addr);
  66    sysbus_connect_irq(s, 0, irq);
  67
  68    return dev;
  69}
  70
  71static inline DeviceState *pl011_luminary_create(hwaddr addr,
  72                                                 qemu_irq irq,
  73                                                 Chardev *chr)
  74{
  75    DeviceState *dev;
  76    SysBusDevice *s;
  77
  78    dev = qdev_new("pl011_luminary");
  79    s = SYS_BUS_DEVICE(dev);
  80    qdev_prop_set_chr(dev, "chardev", chr);
  81    sysbus_realize_and_unref(s, &error_fatal);
  82    sysbus_mmio_map(s, 0, addr);
  83    sysbus_connect_irq(s, 0, irq);
  84
  85    return dev;
  86}
  87
  88#endif
  89