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21#include "qemu/osdep.h"
22#include "qemu-common.h"
23#include "qemu/units.h"
24#include "qapi/error.h"
25#include "cpu.h"
26#include "hw/clock.h"
27#include "hw/intc/i8259.h"
28#include "hw/dma/i8257.h"
29#include "hw/isa/superio.h"
30#include "net/net.h"
31#include "hw/boards.h"
32#include "hw/i2c/smbus_eeprom.h"
33#include "hw/block/flash.h"
34#include "hw/mips/mips.h"
35#include "hw/mips/cpudevs.h"
36#include "hw/pci/pci.h"
37#include "qemu/log.h"
38#include "hw/loader.h"
39#include "hw/ide/pci.h"
40#include "elf.h"
41#include "hw/isa/vt82c686.h"
42#include "hw/rtc/mc146818rtc.h"
43#include "hw/timer/i8254.h"
44#include "exec/address-spaces.h"
45#include "sysemu/qtest.h"
46#include "sysemu/reset.h"
47#include "qemu/error-report.h"
48
49#define DEBUG_FULOONG2E_INIT
50
51#define ENVP_ADDR 0x80002000l
52#define ENVP_NB_ENTRIES 16
53#define ENVP_ENTRY_SIZE 256
54
55
56#define BIOS_SIZE (512 * KiB)
57#define MAX_IDE_BUS 2
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72#define FULOONG_BIOSNAME "pmon_2e.bin"
73
74
75#define FULOONG2E_VIA_SLOT 5
76#define FULOONG2E_ATI_SLOT 6
77#define FULOONG2E_RTL8139_SLOT 7
78
79static struct _loaderparams {
80 int ram_size;
81 const char *kernel_filename;
82 const char *kernel_cmdline;
83 const char *initrd_filename;
84} loaderparams;
85
86static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t *prom_buf, int index,
87 const char *string, ...)
88{
89 va_list ap;
90 int32_t table_addr;
91
92 if (index >= ENVP_NB_ENTRIES) {
93 return;
94 }
95
96 if (string == NULL) {
97 prom_buf[index] = 0;
98 return;
99 }
100
101 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
102 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
103
104 va_start(ap, string);
105 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
106 va_end(ap);
107}
108
109static int64_t load_kernel(CPUMIPSState *env)
110{
111 int64_t kernel_entry, kernel_high, initrd_size;
112 int index = 0;
113 long kernel_size;
114 ram_addr_t initrd_offset;
115 uint32_t *prom_buf;
116 long prom_size;
117
118 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
119 cpu_mips_kseg0_to_phys, NULL,
120 (uint64_t *)&kernel_entry, NULL,
121 (uint64_t *)&kernel_high, NULL,
122 0, EM_MIPS, 1, 0);
123 if (kernel_size < 0) {
124 error_report("could not load kernel '%s': %s",
125 loaderparams.kernel_filename,
126 load_elf_strerror(kernel_size));
127 exit(1);
128 }
129
130
131 initrd_size = 0;
132 initrd_offset = 0;
133 if (loaderparams.initrd_filename) {
134 initrd_size = get_image_size(loaderparams.initrd_filename);
135 if (initrd_size > 0) {
136 initrd_offset = ROUND_UP(kernel_high, INITRD_PAGE_SIZE);
137 if (initrd_offset + initrd_size > ram_size) {
138 error_report("memory too small for initial ram disk '%s'",
139 loaderparams.initrd_filename);
140 exit(1);
141 }
142 initrd_size = load_image_targphys(loaderparams.initrd_filename,
143 initrd_offset,
144 ram_size - initrd_offset);
145 }
146 if (initrd_size == (target_ulong) -1) {
147 error_report("could not load initial ram disk '%s'",
148 loaderparams.initrd_filename);
149 exit(1);
150 }
151 }
152
153
154 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
155 prom_buf = g_malloc(prom_size);
156
157 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
158 if (initrd_size > 0) {
159 prom_set(prom_buf, index++,
160 "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
161 cpu_mips_phys_to_kseg0(NULL, initrd_offset),
162 initrd_size, loaderparams.kernel_cmdline);
163 } else {
164 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
165 }
166
167
168 prom_set(prom_buf, index++, "busclock=33000000");
169 prom_set(prom_buf, index++, "cpuclock=100000000");
170 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
171 prom_set(prom_buf, index++, "modetty0=38400n8r");
172 prom_set(prom_buf, index++, NULL);
173
174 rom_add_blob_fixed("prom", prom_buf, prom_size,
175 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
176
177 g_free(prom_buf);
178 return kernel_entry;
179}
180
181static void write_bootloader(CPUMIPSState *env, uint8_t *base,
182 int64_t kernel_addr)
183{
184 uint32_t *p;
185
186
187 p = (uint32_t *)base;
188
189
190 stl_p(p++, 0x0bf00010);
191
192 stl_p(p++, 0x00000000);
193
194
195 p = (uint32_t *)(base + 0x040);
196
197
198 stl_p(p++, 0x3c040000);
199
200 stl_p(p++, 0x34840002);
201
202 stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff));
203
204 stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff));
205
206 stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff));
207
208 stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff));
209
210 stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16));
211
212 stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff));
213
214 stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff));
215
216 stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff));
217
218 stl_p(p++, 0x03e00008);
219
220 stl_p(p++, 0x00000000);
221}
222
223static void main_cpu_reset(void *opaque)
224{
225 MIPSCPU *cpu = opaque;
226 CPUMIPSState *env = &cpu->env;
227
228 cpu_reset(CPU(cpu));
229
230 if (loaderparams.kernel_filename) {
231 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
232 }
233}
234
235static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
236 I2CBus **i2c_bus, ISABus **p_isa_bus)
237{
238 qemu_irq *i8259;
239 ISABus *isa_bus;
240 PCIDevice *dev;
241
242 isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
243 assert(isa_bus);
244 *p_isa_bus = isa_bus;
245
246
247 i8259 = i8259_init(isa_bus, intc);
248 isa_bus_irqs(isa_bus, i8259);
249
250 i8254_pit_init(isa_bus, 0x40, 0, NULL);
251 i8257_dma_init(isa_bus, 0);
252
253 isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
254
255 dev = pci_create_simple(pci_bus, PCI_DEVFN(slot, 1), "via-ide");
256 pci_ide_create_devs(dev);
257
258 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
259 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
260
261 *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
262
263
264 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
265 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
266}
267
268
269static void network_init(PCIBus *pci_bus)
270{
271 int i;
272
273 for (i = 0; i < nb_nics; i++) {
274 NICInfo *nd = &nd_table[i];
275 const char *default_devaddr = NULL;
276
277 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
278
279 default_devaddr = "07";
280 }
281
282 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
283 }
284}
285
286static void mips_fuloong2e_init(MachineState *machine)
287{
288 const char *kernel_filename = machine->kernel_filename;
289 const char *kernel_cmdline = machine->kernel_cmdline;
290 const char *initrd_filename = machine->initrd_filename;
291 char *filename;
292 MemoryRegion *address_space_mem = get_system_memory();
293 MemoryRegion *bios = g_new(MemoryRegion, 1);
294 long bios_size;
295 uint8_t *spd_data;
296 int64_t kernel_entry;
297 PCIDevice *pci_dev;
298 PCIBus *pci_bus;
299 ISABus *isa_bus;
300 I2CBus *smbus;
301 Clock *cpuclk;
302 MIPSCPU *cpu;
303 CPUMIPSState *env;
304 DeviceState *dev;
305
306 cpuclk = clock_new(OBJECT(machine), "cpu-refclk");
307 clock_set_hz(cpuclk, 533080000);
308
309
310 cpu = mips_cpu_create_with_clock(machine->cpu_type, cpuclk);
311 env = &cpu->env;
312
313 qemu_register_reset(main_cpu_reset, cpu);
314
315
316 if (machine->ram_size != 256 * MiB) {
317 error_report("Invalid RAM size, should be 256MB");
318 exit(EXIT_FAILURE);
319 }
320 memory_region_add_subregion(address_space_mem, 0, machine->ram);
321
322
323 memory_region_init_rom(bios, NULL, "fuloong2e.bios", BIOS_SIZE,
324 &error_fatal);
325 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
326
327
328
329
330
331
332 if (kernel_filename) {
333 loaderparams.ram_size = machine->ram_size;
334 loaderparams.kernel_filename = kernel_filename;
335 loaderparams.kernel_cmdline = kernel_cmdline;
336 loaderparams.initrd_filename = initrd_filename;
337 kernel_entry = load_kernel(env);
338 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
339 } else {
340 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
341 bios_name ?: FULOONG_BIOSNAME);
342 if (filename) {
343 bios_size = load_image_targphys(filename, 0x1fc00000LL,
344 BIOS_SIZE);
345 g_free(filename);
346 } else {
347 bios_size = -1;
348 }
349
350 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
351 bios_name && !qtest_enabled()) {
352 error_report("Could not load MIPS bios '%s'", bios_name);
353 exit(1);
354 }
355 }
356
357
358 cpu_mips_irq_init_cpu(cpu);
359 cpu_mips_clock_init(cpu);
360
361
362 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
363
364
365 vt82c686b_southbridge_init(pci_bus, FULOONG2E_VIA_SLOT, env->irq[5],
366 &smbus, &isa_bus);
367
368
369 if (vga_interface_type != VGA_NONE) {
370 pci_dev = pci_new(-1, "ati-vga");
371 dev = DEVICE(pci_dev);
372 qdev_prop_set_uint32(dev, "vgamem_mb", 16);
373 qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
374 pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
375 }
376
377
378 spd_data = spd_data_generate(DDR, machine->ram_size);
379 smbus_eeprom_init_one(smbus, 0x50, spd_data);
380
381 mc146818_rtc_init(isa_bus, 2000, NULL);
382
383
384 network_init(pci_bus);
385}
386
387static void mips_fuloong2e_machine_init(MachineClass *mc)
388{
389 mc->desc = "Fuloong 2e mini pc";
390 mc->alias = "fulong2e";
391 mc->init = mips_fuloong2e_init;
392 mc->block_default_type = IF_IDE;
393 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
394 mc->default_ram_size = 256 * MiB;
395 mc->default_ram_id = "fuloong2e.ram";
396 mc->minimum_page_bits = 14;
397}
398
399DEFINE_MACHINE("fuloong2e", mips_fuloong2e_machine_init)
400