LXR qemu/hw/lm32/milkymist-hw.h

   1#ifndef QEMU_HW_MILKYMIST_HW_H
   2#define QEMU_HW_MILKYMIST_HW_H
   3
   4#include "hw/qdev-core.h"
   5#include "net/net.h"
   6#include "qapi/error.h"
   7
   8static inline DeviceState *milkymist_uart_create(hwaddr base,
   9                                                 qemu_irq irq,
  10                                                 Chardev *chr)
  11{
  12    DeviceState *dev;
  13
  14    dev = qdev_new("milkymist-uart");
  15    qdev_prop_set_chr(dev, "chardev", chr);
  16    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  17    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  18    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
  19
  20    return dev;
  21}
  22
  23static inline DeviceState *milkymist_hpdmc_create(hwaddr base)
  24{
  25    DeviceState *dev;
  26
  27    dev = qdev_new("milkymist-hpdmc");
  28    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  29    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  30
  31    return dev;
  32}
  33
  34static inline DeviceState *milkymist_vgafb_create(hwaddr base,
  35        uint32_t fb_offset, uint32_t fb_mask)
  36{
  37    DeviceState *dev;
  38
  39    dev = qdev_new("milkymist-vgafb");
  40    qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
  41    qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
  42    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  43    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  44
  45    return dev;
  46}
  47
  48static inline DeviceState *milkymist_sysctl_create(hwaddr base,
  49        qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
  50        uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
  51        uint32_t gpio_strappings)
  52{
  53    DeviceState *dev;
  54
  55    dev = qdev_new("milkymist-sysctl");
  56    qdev_prop_set_uint32(dev, "frequency", freq_hz);
  57    qdev_prop_set_uint32(dev, "systemid", system_id);
  58    qdev_prop_set_uint32(dev, "capabilities", capabilities);
  59    qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
  60    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  61    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  62    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, gpio_irq);
  63    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, timer0_irq);
  64    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, timer1_irq);
  65
  66    return dev;
  67}
  68
  69static inline DeviceState *milkymist_pfpu_create(hwaddr base,
  70        qemu_irq irq)
  71{
  72    DeviceState *dev;
  73
  74    dev = qdev_new("milkymist-pfpu");
  75    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  76    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  77    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
  78    return dev;
  79}
  80
  81static inline DeviceState *milkymist_ac97_create(hwaddr base,
  82        qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
  83        qemu_irq dmaw_irq)
  84{
  85    DeviceState *dev;
  86
  87    dev = qdev_new("milkymist-ac97");
  88    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
  89    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
  90    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, crrequest_irq);
  91    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, crreply_irq);
  92    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 2, dmar_irq);
  93    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 3, dmaw_irq);
  94
  95    return dev;
  96}
  97
  98static inline DeviceState *milkymist_minimac2_create(hwaddr base,
  99        hwaddr buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
 100{
 101    DeviceState *dev;
 102
 103    qemu_check_nic_model(&nd_table[0], "minimac2");
 104    dev = qdev_new("milkymist-minimac2");
 105    qdev_set_nic_properties(dev, &nd_table[0]);
 106    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 107    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
 108    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, buffers_base);
 109    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, rx_irq);
 110    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 1, tx_irq);
 111
 112    return dev;
 113}
 114
 115static inline DeviceState *milkymist_softusb_create(hwaddr base,
 116        qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
 117        uint32_t dmem_base, uint32_t dmem_size)
 118{
 119    DeviceState *dev;
 120
 121    dev = qdev_new("milkymist-softusb");
 122    qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
 123    qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
 124    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
 125    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);
 126    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, pmem_base);
 127    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, dmem_base);
 128    sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq);
 129
 130    return dev;
 131}
 132
 133#endif /* QEMU_HW_MILKYMIST_HW_H */
 134