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27#include "qemu/osdep.h"
28#include "qemu-common.h"
29#include "qemu/datadir.h"
30#include "qemu/units.h"
31#include "qapi/error.h"
32#include "hw/ppc/ppc.h"
33#include "hw/qdev-properties.h"
34#include "mac.h"
35#include "hw/input/adb.h"
36#include "sysemu/sysemu.h"
37#include "net/net.h"
38#include "hw/isa/isa.h"
39#include "hw/pci/pci.h"
40#include "hw/pci/pci_host.h"
41#include "hw/boards.h"
42#include "hw/nvram/fw_cfg.h"
43#include "hw/char/escc.h"
44#include "hw/misc/macio/macio.h"
45#include "hw/loader.h"
46#include "hw/fw-path-provider.h"
47#include "elf.h"
48#include "qemu/error-report.h"
49#include "sysemu/kvm.h"
50#include "sysemu/reset.h"
51#include "kvm_ppc.h"
52#include "exec/address-spaces.h"
53
54#define MAX_IDE_BUS 2
55#define CFG_ADDR 0xf0000510
56#define TBFREQ 16600000UL
57#define CLOCKFREQ 266000000UL
58#define BUSFREQ 66000000UL
59
60#define NDRV_VGA_FILENAME "qemu_vga.ndrv"
61
62#define GRACKLE_BASE 0xfec00000
63#define PROM_BASE 0xffc00000
64#define PROM_SIZE (4 * MiB)
65
66static void fw_cfg_boot_set(void *opaque, const char *boot_device,
67 Error **errp)
68{
69 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
70}
71
72static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
73{
74 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
75}
76
77static void ppc_heathrow_reset(void *opaque)
78{
79 PowerPCCPU *cpu = opaque;
80
81 cpu_reset(CPU(cpu));
82}
83
84static void ppc_heathrow_init(MachineState *machine)
85{
86 ram_addr_t ram_size = machine->ram_size;
87 const char *bios_name = machine->firmware ?: PROM_FILENAME;
88 const char *boot_device = machine->boot_order;
89 PowerPCCPU *cpu = NULL;
90 CPUPPCState *env = NULL;
91 char *filename;
92 int i;
93 MemoryRegion *bios = g_new(MemoryRegion, 1);
94 uint32_t kernel_base, initrd_base, cmdline_base = 0;
95 int32_t kernel_size, initrd_size;
96 PCIBus *pci_bus;
97 PCIDevice *macio;
98 MACIOIDEState *macio_ide;
99 ESCCState *escc;
100 SysBusDevice *s;
101 DeviceState *dev, *pic_dev, *grackle_dev;
102 BusState *adb_bus;
103 uint64_t bios_addr;
104 int bios_size;
105 unsigned int smp_cpus = machine->smp.cpus;
106 uint16_t ppc_boot_device;
107 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
108 void *fw_cfg;
109 uint64_t tbfreq;
110
111
112 for (i = 0; i < smp_cpus; i++) {
113 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
114 env = &cpu->env;
115
116
117 cpu_ppc_tb_init(env, TBFREQ);
118 qemu_register_reset(ppc_heathrow_reset, cpu);
119 }
120
121
122 if (ram_size > 2047 * MiB) {
123 error_report("Too much memory for this machine: %" PRId64 " MB, "
124 "maximum 2047 MB", ram_size / MiB);
125 exit(1);
126 }
127
128 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
129
130
131 memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE,
132 &error_fatal);
133 memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
134
135 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
136 if (filename) {
137
138 bios_size = load_elf(filename, NULL, NULL, NULL, NULL, &bios_addr,
139 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
140
141 bios_addr = (uint32_t)bios_addr;
142
143 if (bios_size <= 0) {
144
145 bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
146 bios_addr = PROM_BASE;
147 }
148 g_free(filename);
149 } else {
150 bios_size = -1;
151 }
152 if (bios_size < 0 || bios_addr - PROM_BASE + bios_size > PROM_SIZE) {
153 error_report("could not load PowerPC bios '%s'", bios_name);
154 exit(1);
155 }
156
157 if (machine->kernel_filename) {
158 int bswap_needed;
159
160#ifdef BSWAP_NEEDED
161 bswap_needed = 1;
162#else
163 bswap_needed = 0;
164#endif
165 kernel_base = KERNEL_LOAD_ADDR;
166 kernel_size = load_elf(machine->kernel_filename, NULL,
167 translate_kernel_address, NULL, NULL, NULL,
168 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
169 if (kernel_size < 0)
170 kernel_size = load_aout(machine->kernel_filename, kernel_base,
171 ram_size - kernel_base, bswap_needed,
172 TARGET_PAGE_SIZE);
173 if (kernel_size < 0)
174 kernel_size = load_image_targphys(machine->kernel_filename,
175 kernel_base,
176 ram_size - kernel_base);
177 if (kernel_size < 0) {
178 error_report("could not load kernel '%s'",
179 machine->kernel_filename);
180 exit(1);
181 }
182
183 if (machine->initrd_filename) {
184 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size +
185 KERNEL_GAP);
186 initrd_size = load_image_targphys(machine->initrd_filename,
187 initrd_base,
188 ram_size - initrd_base);
189 if (initrd_size < 0) {
190 error_report("could not load initial ram disk '%s'",
191 machine->initrd_filename);
192 exit(1);
193 }
194 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
195 } else {
196 initrd_base = 0;
197 initrd_size = 0;
198 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
199 }
200 ppc_boot_device = 'm';
201 } else {
202 kernel_base = 0;
203 kernel_size = 0;
204 initrd_base = 0;
205 initrd_size = 0;
206 ppc_boot_device = '\0';
207 for (i = 0; boot_device[i] != '\0'; i++) {
208
209
210
211
212#if 0
213 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
214 ppc_boot_device = boot_device[i];
215 break;
216 }
217#else
218 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
219 ppc_boot_device = boot_device[i];
220 break;
221 }
222#endif
223 }
224 if (ppc_boot_device == '\0') {
225 error_report("No valid boot device for G3 Beige machine");
226 exit(1);
227 }
228 }
229
230
231 if (kvm_enabled()) {
232 tbfreq = kvmppc_get_tbfreq();
233 } else {
234 tbfreq = TBFREQ;
235 }
236
237
238 grackle_dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
239 qdev_prop_set_uint32(grackle_dev, "ofw-addr", 0x80000000);
240 s = SYS_BUS_DEVICE(grackle_dev);
241 sysbus_realize_and_unref(s, &error_fatal);
242
243 sysbus_mmio_map(s, 0, GRACKLE_BASE);
244 sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
245
246 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
247 sysbus_mmio_get_region(s, 2));
248
249 memory_region_add_subregion(get_system_memory(), 0xfe000000,
250 sysbus_mmio_get_region(s, 3));
251
252 pci_bus = PCI_HOST_BRIDGE(grackle_dev)->bus;
253
254
255 macio = pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO);
256 dev = DEVICE(macio);
257 qdev_prop_set_uint64(dev, "frequency", tbfreq);
258
259 escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
260 qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
261 qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
262
263 pci_realize_and_unref(macio, pci_bus, &error_fatal);
264
265 pic_dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pic"));
266 for (i = 0; i < 4; i++) {
267 qdev_connect_gpio_out(grackle_dev, i,
268 qdev_get_gpio_in(pic_dev, 0x15 + i));
269 }
270
271
272 for (i = 0; i < smp_cpus; i++) {
273 switch (PPC_INPUT(env)) {
274 case PPC_FLAGS_INPUT_6xx:
275
276 qdev_connect_gpio_out(pic_dev, 0,
277 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
278 break;
279 default:
280 error_report("Bus model not supported on OldWorld Mac machine");
281 exit(1);
282 }
283 }
284
285 pci_vga_init(pci_bus);
286
287 for (i = 0; i < nb_nics; i++) {
288 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
289 }
290
291
292 ide_drive_get(hd, ARRAY_SIZE(hd));
293 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
294 "ide[0]"));
295 macio_ide_init_drives(macio_ide, hd);
296
297 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
298 "ide[1]"));
299 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
300
301
302 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
303 adb_bus = qdev_get_child_bus(dev, "adb.0");
304 dev = qdev_new(TYPE_ADB_KEYBOARD);
305 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
306 dev = qdev_new(TYPE_ADB_MOUSE);
307 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
308
309 if (machine_usb(machine)) {
310 pci_create_simple(pci_bus, -1, "pci-ohci");
311 }
312
313 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
314 graphic_depth = 15;
315
316
317
318 dev = qdev_new(TYPE_FW_CFG_MEM);
319 fw_cfg = FW_CFG(dev);
320 qdev_prop_set_uint32(dev, "data_width", 1);
321 qdev_prop_set_bit(dev, "dma_enabled", false);
322 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
323 OBJECT(fw_cfg));
324 s = SYS_BUS_DEVICE(dev);
325 sysbus_realize_and_unref(s, &error_fatal);
326 sysbus_mmio_map(s, 0, CFG_ADDR);
327 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
328
329 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
330 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
331 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
332 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
333 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
334 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
335 if (machine->kernel_cmdline) {
336 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
337 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE,
338 machine->kernel_cmdline);
339 } else {
340 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
341 }
342 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
343 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
344 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
345
346 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
347 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
348 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
349
350 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
351 if (kvm_enabled()) {
352 uint8_t *hypercall;
353
354 hypercall = g_malloc(16);
355 kvmppc_get_hypercall(env, hypercall, 16);
356 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
357 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
358 }
359 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
360
361 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
362 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
363
364
365 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
366 if (filename) {
367 gchar *ndrv_file;
368 gsize ndrv_size;
369
370 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
371 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
372 }
373 g_free(filename);
374 }
375
376 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
377}
378
379
380
381
382
383static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
384 DeviceState *dev)
385{
386 PCIDevice *pci;
387 MACIOIDEState *macio_ide;
388
389 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
390 pci = PCI_DEVICE(dev);
391 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
392 }
393
394 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
395 macio_ide = MACIO_IDE(dev);
396 return g_strdup_printf("ata-3@%x", macio_ide->addr);
397 }
398
399 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
400 return g_strdup("disk");
401 }
402
403 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
404 return g_strdup("cdrom");
405 }
406
407 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
408 return g_strdup("disk");
409 }
410
411 return NULL;
412}
413
414static int heathrow_kvm_type(MachineState *machine, const char *arg)
415{
416
417 return 2;
418}
419
420static void heathrow_class_init(ObjectClass *oc, void *data)
421{
422 MachineClass *mc = MACHINE_CLASS(oc);
423 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
424
425 mc->desc = "Heathrow based PowerMAC";
426 mc->init = ppc_heathrow_init;
427 mc->block_default_type = IF_IDE;
428 mc->max_cpus = MAX_CPUS;
429#ifndef TARGET_PPC64
430 mc->is_default = true;
431#endif
432
433 mc->default_boot_order = "cd";
434 mc->kvm_type = heathrow_kvm_type;
435 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
436 mc->default_display = "std";
437 mc->ignore_boot_device_suffixes = true;
438 mc->default_ram_id = "ppc_heathrow.ram";
439 fwc->get_dev_path = heathrow_fw_dev_path;
440}
441
442static const TypeInfo ppc_heathrow_machine_info = {
443 .name = MACHINE_TYPE_NAME("g3beige"),
444 .parent = TYPE_MACHINE,
445 .class_init = heathrow_class_init,
446 .interfaces = (InterfaceInfo[]) {
447 { TYPE_FW_PATH_PROVIDER },
448 { }
449 },
450};
451
452static void ppc_heathrow_register_types(void)
453{
454 type_register_static(&ppc_heathrow_machine_info);
455}
456
457type_init(ppc_heathrow_register_types);
458
