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26#include "qemu/osdep.h"
27#include "cpu.h"
28#include "hw/rtc/m48t59.h"
29#include "hw/char/serial.h"
30#include "hw/block/fdc.h"
31#include "net/net.h"
32#include "sysemu/sysemu.h"
33#include "hw/isa/isa.h"
34#include "hw/pci/pci.h"
35#include "hw/pci/pci_host.h"
36#include "hw/ppc/ppc.h"
37#include "hw/boards.h"
38#include "qapi/error.h"
39#include "qemu/error-report.h"
40#include "qemu/log.h"
41#include "hw/irq.h"
42#include "hw/loader.h"
43#include "hw/rtc/mc146818rtc.h"
44#include "hw/isa/pc87312.h"
45#include "hw/qdev-properties.h"
46#include "sysemu/arch_init.h"
47#include "sysemu/kvm.h"
48#include "sysemu/reset.h"
49#include "exec/address-spaces.h"
50#include "trace.h"
51#include "elf.h"
52#include "qemu/units.h"
53#include "kvm_ppc.h"
54
55
56#define MAX_CPUS 1
57
58#define MAX_IDE_BUS 2
59
60#define CFG_ADDR 0xf0000510
61
62#define KERNEL_LOAD_ADDR 0x01000000
63#define INITRD_LOAD_ADDR 0x01800000
64
65#define NVRAM_SIZE 0x2000
66
67static void fw_cfg_boot_set(void *opaque, const char *boot_device,
68 Error **errp)
69{
70 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
71}
72
73static void ppc_prep_reset(void *opaque)
74{
75 PowerPCCPU *cpu = opaque;
76
77 cpu_reset(CPU(cpu));
78}
79
80
81
82
83static inline uint32_t nvram_read(Nvram *nvram, uint32_t addr)
84{
85 NvramClass *k = NVRAM_GET_CLASS(nvram);
86 return (k->read)(nvram, addr);
87}
88
89static inline void nvram_write(Nvram *nvram, uint32_t addr, uint32_t val)
90{
91 NvramClass *k = NVRAM_GET_CLASS(nvram);
92 (k->write)(nvram, addr, val);
93}
94
95static void NVRAM_set_byte(Nvram *nvram, uint32_t addr, uint8_t value)
96{
97 nvram_write(nvram, addr, value);
98}
99
100static uint8_t NVRAM_get_byte(Nvram *nvram, uint32_t addr)
101{
102 return nvram_read(nvram, addr);
103}
104
105static void NVRAM_set_word(Nvram *nvram, uint32_t addr, uint16_t value)
106{
107 nvram_write(nvram, addr, value >> 8);
108 nvram_write(nvram, addr + 1, value & 0xFF);
109}
110
111static uint16_t NVRAM_get_word(Nvram *nvram, uint32_t addr)
112{
113 uint16_t tmp;
114
115 tmp = nvram_read(nvram, addr) << 8;
116 tmp |= nvram_read(nvram, addr + 1);
117
118 return tmp;
119}
120
121static void NVRAM_set_lword(Nvram *nvram, uint32_t addr, uint32_t value)
122{
123 nvram_write(nvram, addr, value >> 24);
124 nvram_write(nvram, addr + 1, (value >> 16) & 0xFF);
125 nvram_write(nvram, addr + 2, (value >> 8) & 0xFF);
126 nvram_write(nvram, addr + 3, value & 0xFF);
127}
128
129static void NVRAM_set_string(Nvram *nvram, uint32_t addr, const char *str,
130 uint32_t max)
131{
132 int i;
133
134 for (i = 0; i < max && str[i] != '\0'; i++) {
135 nvram_write(nvram, addr + i, str[i]);
136 }
137 nvram_write(nvram, addr + i, str[i]);
138 nvram_write(nvram, addr + max - 1, '\0');
139}
140
141static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value)
142{
143 uint16_t tmp;
144 uint16_t pd, pd1, pd2;
145
146 tmp = prev >> 8;
147 pd = prev ^ value;
148 pd1 = pd & 0x000F;
149 pd2 = ((pd >> 4) & 0x000F) ^ pd1;
150 tmp ^= (pd1 << 3) | (pd1 << 8);
151 tmp ^= pd2 | (pd2 << 7) | (pd2 << 12);
152
153 return tmp;
154}
155
156static uint16_t NVRAM_compute_crc (Nvram *nvram, uint32_t start, uint32_t count)
157{
158 uint32_t i;
159 uint16_t crc = 0xFFFF;
160 int odd;
161
162 odd = count & 1;
163 count &= ~1;
164 for (i = 0; i != count; i++) {
165 crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i));
166 }
167 if (odd) {
168 crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8);
169 }
170
171 return crc;
172}
173
174#define CMDLINE_ADDR 0x017ff000
175
176static int PPC_NVRAM_set_params (Nvram *nvram, uint16_t NVRAM_size,
177 const char *arch,
178 uint32_t RAM_size, int boot_device,
179 uint32_t kernel_image, uint32_t kernel_size,
180 const char *cmdline,
181 uint32_t initrd_image, uint32_t initrd_size,
182 uint32_t NVRAM_image,
183 int width, int height, int depth)
184{
185 uint16_t crc;
186
187
188 NVRAM_set_string(nvram, 0x00, "QEMU_BIOS", 16);
189 NVRAM_set_lword(nvram, 0x10, 0x00000002);
190 NVRAM_set_word(nvram, 0x14, NVRAM_size);
191 NVRAM_set_string(nvram, 0x20, arch, 16);
192 NVRAM_set_lword(nvram, 0x30, RAM_size);
193 NVRAM_set_byte(nvram, 0x34, boot_device);
194 NVRAM_set_lword(nvram, 0x38, kernel_image);
195 NVRAM_set_lword(nvram, 0x3C, kernel_size);
196 if (cmdline) {
197
198 pstrcpy_targphys("cmdline", CMDLINE_ADDR, RAM_size - CMDLINE_ADDR,
199 cmdline);
200 NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR);
201 NVRAM_set_lword(nvram, 0x44, strlen(cmdline));
202 } else {
203 NVRAM_set_lword(nvram, 0x40, 0);
204 NVRAM_set_lword(nvram, 0x44, 0);
205 }
206 NVRAM_set_lword(nvram, 0x48, initrd_image);
207 NVRAM_set_lword(nvram, 0x4C, initrd_size);
208 NVRAM_set_lword(nvram, 0x50, NVRAM_image);
209
210 NVRAM_set_word(nvram, 0x54, width);
211 NVRAM_set_word(nvram, 0x56, height);
212 NVRAM_set_word(nvram, 0x58, depth);
213 crc = NVRAM_compute_crc(nvram, 0x00, 0xF8);
214 NVRAM_set_word(nvram, 0xFC, crc);
215
216 return 0;
217}
218
219static int prep_set_cmos_checksum(DeviceState *dev, void *opaque)
220{
221 uint16_t checksum = *(uint16_t *)opaque;
222 ISADevice *rtc;
223
224 if (object_dynamic_cast(OBJECT(dev), TYPE_MC146818_RTC)) {
225 rtc = ISA_DEVICE(dev);
226 rtc_set_memory(rtc, 0x2e, checksum & 0xff);
227 rtc_set_memory(rtc, 0x3e, checksum & 0xff);
228 rtc_set_memory(rtc, 0x2f, checksum >> 8);
229 rtc_set_memory(rtc, 0x3f, checksum >> 8);
230
231 object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(rtc),
232 "date");
233 }
234 return 0;
235}
236
237static void ibm_40p_init(MachineState *machine)
238{
239 const char *bios_name = machine->firmware ?: "openbios-ppc";
240 CPUPPCState *env = NULL;
241 uint16_t cmos_checksum;
242 PowerPCCPU *cpu;
243 DeviceState *dev, *i82378_dev;
244 SysBusDevice *pcihost, *s;
245 Nvram *m48t59 = NULL;
246 PCIBus *pci_bus;
247 ISADevice *isa_dev;
248 ISABus *isa_bus;
249 void *fw_cfg;
250 int i;
251 uint32_t kernel_base = 0, initrd_base = 0;
252 long kernel_size = 0, initrd_size = 0;
253 char boot_device;
254
255
256 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
257 env = &cpu->env;
258 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
259 error_report("only 6xx bus is supported on this machine");
260 exit(1);
261 }
262
263 if (env->flags & POWERPC_FLAG_RTC_CLK) {
264
265 cpu_ppc_tb_init(env, 7812500UL);
266 } else {
267
268 cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
269 }
270 qemu_register_reset(ppc_prep_reset, cpu);
271
272
273 dev = qdev_new("raven-pcihost");
274 qdev_prop_set_string(dev, "bios-name", bios_name);
275 qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE);
276 pcihost = SYS_BUS_DEVICE(dev);
277 object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev));
278 sysbus_realize_and_unref(pcihost, &error_fatal);
279 pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci.0"));
280 if (!pci_bus) {
281 error_report("could not create PCI host controller");
282 exit(1);
283 }
284
285
286 i82378_dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(11, 0), "i82378"));
287 qdev_connect_gpio_out(i82378_dev, 0,
288 cpu->env.irq_inputs[PPC6xx_INPUT_INT]);
289 sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15));
290 isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0"));
291
292
293 isa_dev = isa_new("rs6000-mc");
294 dev = DEVICE(isa_dev);
295 qdev_prop_set_uint32(dev, "ram-size", machine->ram_size);
296 isa_realize_and_unref(isa_dev, isa_bus, &error_fatal);
297
298
299 isa_dev = isa_new(TYPE_MC146818_RTC);
300 dev = DEVICE(isa_dev);
301 qdev_prop_set_int32(dev, "base_year", 1900);
302 isa_realize_and_unref(isa_dev, isa_bus, &error_fatal);
303
304
305 cmos_checksum = 0x6aa9;
306 qbus_walk_children(BUS(isa_bus), prep_set_cmos_checksum, NULL, NULL, NULL,
307 &cmos_checksum);
308
309
310 if (defaults_enabled()) {
311 m48t59 = NVRAM(isa_create_simple(isa_bus, "isa-m48t59"));
312
313 isa_dev = isa_new("cs4231a");
314 dev = DEVICE(isa_dev);
315 qdev_prop_set_uint32(dev, "iobase", 0x830);
316 qdev_prop_set_uint32(dev, "irq", 10);
317 isa_realize_and_unref(isa_dev, isa_bus, &error_fatal);
318
319 isa_dev = isa_new("pc87312");
320 dev = DEVICE(isa_dev);
321 qdev_prop_set_uint32(dev, "config", 12);
322 isa_realize_and_unref(isa_dev, isa_bus, &error_fatal);
323
324 isa_dev = isa_new("prep-systemio");
325 dev = DEVICE(isa_dev);
326 qdev_prop_set_uint32(dev, "ibm-planar-id", 0xfc);
327 qdev_prop_set_uint32(dev, "equipment", 0xc0);
328 isa_realize_and_unref(isa_dev, isa_bus, &error_fatal);
329
330 dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0),
331 "lsi53c810"));
332 lsi53c8xx_handle_legacy_cmdline(dev);
333 qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13));
334
335
336 pci_vga_init(pci_bus);
337
338 for (i = 0; i < nb_nics; i++) {
339 pci_nic_init_nofail(&nd_table[i], pci_bus, "pcnet",
340 i == 0 ? "3" : NULL);
341 }
342 }
343
344
345 dev = qdev_new(TYPE_FW_CFG_MEM);
346 fw_cfg = FW_CFG(dev);
347 qdev_prop_set_uint32(dev, "data_width", 1);
348 qdev_prop_set_bit(dev, "dma_enabled", false);
349 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
350 OBJECT(fw_cfg));
351 s = SYS_BUS_DEVICE(dev);
352 sysbus_realize_and_unref(s, &error_fatal);
353 sysbus_mmio_map(s, 0, CFG_ADDR);
354 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
355
356 if (machine->kernel_filename) {
357
358 kernel_base = KERNEL_LOAD_ADDR;
359 kernel_size = load_image_targphys(machine->kernel_filename,
360 kernel_base,
361 machine->ram_size - kernel_base);
362 if (kernel_size < 0) {
363 error_report("could not load kernel '%s'",
364 machine->kernel_filename);
365 exit(1);
366 }
367 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
368 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
369
370 if (machine->initrd_filename) {
371 initrd_base = INITRD_LOAD_ADDR;
372 initrd_size = load_image_targphys(machine->initrd_filename,
373 initrd_base,
374 machine->ram_size - initrd_base);
375 if (initrd_size < 0) {
376 error_report("could not load initial ram disk '%s'",
377 machine->initrd_filename);
378 exit(1);
379 }
380 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
381 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
382 }
383 if (machine->kernel_cmdline && *machine->kernel_cmdline) {
384 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
385 pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE,
386 machine->kernel_cmdline);
387 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
388 machine->kernel_cmdline);
389 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
390 strlen(machine->kernel_cmdline) + 1);
391 }
392 boot_device = 'm';
393 } else {
394 boot_device = machine->boot_order[0];
395 }
396
397 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
398 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size);
399 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP);
400
401 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
402 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
403 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
404
405 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
406 if (kvm_enabled()) {
407 uint8_t *hypercall;
408
409 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
410 hypercall = g_malloc(16);
411 kvmppc_get_hypercall(env, hypercall, 16);
412 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
413 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
414 } else {
415 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, NANOSECONDS_PER_SECOND);
416 }
417 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device);
418 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
419
420
421 if (m48t59) {
422 PPC_NVRAM_set_params(m48t59, NVRAM_SIZE, "PREP", machine->ram_size,
423 boot_device,
424 kernel_base, kernel_size,
425 machine->kernel_cmdline,
426 initrd_base, initrd_size,
427
428 0,
429 graphic_width, graphic_height, graphic_depth);
430 }
431}
432
433static void ibm_40p_machine_init(MachineClass *mc)
434{
435 mc->desc = "IBM RS/6000 7020 (40p)",
436 mc->init = ibm_40p_init;
437 mc->max_cpus = 1;
438 mc->default_ram_size = 128 * MiB;
439 mc->block_default_type = IF_SCSI;
440 mc->default_boot_order = "c";
441 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("604");
442 mc->default_display = "std";
443}
444
445DEFINE_MACHINE("40p", ibm_40p_machine_init)
446
