LXR qemu/include/hw/arm/msf2-soc.h

   1/*
   2 * Microsemi Smartfusion2 SoC
   3 *
   4 * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a copy
   7 * of this software and associated documentation files (the "Software"), to deal
   8 * in the Software without restriction, including without limitation the rights
   9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10 * copies of the Software, and to permit persons to whom the Software is
  11 * furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22 * THE SOFTWARE.
  23 */
  24
  25#ifndef HW_ARM_MSF2_SOC_H
  26#define HW_ARM_MSF2_SOC_H
  27
  28#include "hw/arm/armv7m.h"
  29#include "hw/timer/mss-timer.h"
  30#include "hw/misc/msf2-sysreg.h"
  31#include "hw/ssi/mss-spi.h"
  32#include "hw/net/msf2-emac.h"
  33#include "qom/object.h"
  34
  35#define TYPE_MSF2_SOC     "msf2-soc"
  36OBJECT_DECLARE_SIMPLE_TYPE(MSF2State, MSF2_SOC)
  37
  38#define MSF2_NUM_SPIS         2
  39#define MSF2_NUM_UARTS        2
  40
  41/*
  42 * System timer consists of two programmable 32-bit
  43 * decrementing counters that generate individual interrupts to
  44 * the Cortex-M3 processor
  45 */
  46#define MSF2_NUM_TIMERS       2
  47
  48struct MSF2State {
  49    /*< private >*/
  50    SysBusDevice parent_obj;
  51    /*< public >*/
  52
  53    ARMv7MState armv7m;
  54
  55    char *cpu_type;
  56    char *part_name;
  57    uint64_t envm_size;
  58    uint64_t esram_size;
  59
  60    uint32_t m3clk;
  61    uint8_t apb0div;
  62    uint8_t apb1div;
  63
  64    MSF2SysregState sysreg;
  65    MSSTimerState timer;
  66    MSSSpiState spi[MSF2_NUM_SPIS];
  67    MSF2EmacState emac;
  68};
  69
  70#endif
  71