qemu/softmmu/memory.c
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   1/*
   2 * Physical memory management
   3 *
   4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
   5 *
   6 * Authors:
   7 *  Avi Kivity <avi@redhat.com>
   8 *
   9 * This work is licensed under the terms of the GNU GPL, version 2.  See
  10 * the COPYING file in the top-level directory.
  11 *
  12 * Contributions after 2012-01-13 are licensed under the terms of the
  13 * GNU GPL, version 2 or (at your option) any later version.
  14 */
  15
  16#include "qemu/osdep.h"
  17#include "qemu/log.h"
  18#include "qapi/error.h"
  19#include "cpu.h"
  20#include "exec/memory.h"
  21#include "exec/address-spaces.h"
  22#include "qapi/visitor.h"
  23#include "qemu/bitops.h"
  24#include "qemu/error-report.h"
  25#include "qemu/main-loop.h"
  26#include "qemu/qemu-print.h"
  27#include "qom/object.h"
  28#include "trace.h"
  29
  30#include "exec/memory-internal.h"
  31#include "exec/ram_addr.h"
  32#include "sysemu/kvm.h"
  33#include "sysemu/runstate.h"
  34#include "sysemu/tcg.h"
  35#include "qemu/accel.h"
  36#include "hw/boards.h"
  37#include "migration/vmstate.h"
  38
  39//#define DEBUG_UNASSIGNED
  40
  41static unsigned memory_region_transaction_depth;
  42static bool memory_region_update_pending;
  43static bool ioeventfd_update_pending;
  44bool global_dirty_log;
  45
  46static QTAILQ_HEAD(, MemoryListener) memory_listeners
  47    = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  48
  49static QTAILQ_HEAD(, AddressSpace) address_spaces
  50    = QTAILQ_HEAD_INITIALIZER(address_spaces);
  51
  52static GHashTable *flat_views;
  53
  54typedef struct AddrRange AddrRange;
  55
  56/*
  57 * Note that signed integers are needed for negative offsetting in aliases
  58 * (large MemoryRegion::alias_offset).
  59 */
  60struct AddrRange {
  61    Int128 start;
  62    Int128 size;
  63};
  64
  65static AddrRange addrrange_make(Int128 start, Int128 size)
  66{
  67    return (AddrRange) { start, size };
  68}
  69
  70static bool addrrange_equal(AddrRange r1, AddrRange r2)
  71{
  72    return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  73}
  74
  75static Int128 addrrange_end(AddrRange r)
  76{
  77    return int128_add(r.start, r.size);
  78}
  79
  80static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  81{
  82    int128_addto(&range.start, delta);
  83    return range;
  84}
  85
  86static bool addrrange_contains(AddrRange range, Int128 addr)
  87{
  88    return int128_ge(addr, range.start)
  89        && int128_lt(addr, addrrange_end(range));
  90}
  91
  92static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  93{
  94    return addrrange_contains(r1, r2.start)
  95        || addrrange_contains(r2, r1.start);
  96}
  97
  98static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  99{
 100    Int128 start = int128_max(r1.start, r2.start);
 101    Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
 102    return addrrange_make(start, int128_sub(end, start));
 103}
 104
 105enum ListenerDirection { Forward, Reverse };
 106
 107#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
 108    do {                                                                \
 109        MemoryListener *_listener;                                      \
 110                                                                        \
 111        switch (_direction) {                                           \
 112        case Forward:                                                   \
 113            QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
 114                if (_listener->_callback) {                             \
 115                    _listener->_callback(_listener, ##_args);           \
 116                }                                                       \
 117            }                                                           \
 118            break;                                                      \
 119        case Reverse:                                                   \
 120            QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
 121                if (_listener->_callback) {                             \
 122                    _listener->_callback(_listener, ##_args);           \
 123                }                                                       \
 124            }                                                           \
 125            break;                                                      \
 126        default:                                                        \
 127            abort();                                                    \
 128        }                                                               \
 129    } while (0)
 130
 131#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
 132    do {                                                                \
 133        MemoryListener *_listener;                                      \
 134                                                                        \
 135        switch (_direction) {                                           \
 136        case Forward:                                                   \
 137            QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) {     \
 138                if (_listener->_callback) {                             \
 139                    _listener->_callback(_listener, _section, ##_args); \
 140                }                                                       \
 141            }                                                           \
 142            break;                                                      \
 143        case Reverse:                                                   \
 144            QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
 145                if (_listener->_callback) {                             \
 146                    _listener->_callback(_listener, _section, ##_args); \
 147                }                                                       \
 148            }                                                           \
 149            break;                                                      \
 150        default:                                                        \
 151            abort();                                                    \
 152        }                                                               \
 153    } while (0)
 154
 155/* No need to ref/unref .mr, the FlatRange keeps it alive.  */
 156#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...)  \
 157    do {                                                                \
 158        MemoryRegionSection mrs = section_from_flat_range(fr,           \
 159                address_space_to_flatview(as));                         \
 160        MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args);         \
 161    } while(0)
 162
 163struct CoalescedMemoryRange {
 164    AddrRange addr;
 165    QTAILQ_ENTRY(CoalescedMemoryRange) link;
 166};
 167
 168struct MemoryRegionIoeventfd {
 169    AddrRange addr;
 170    bool match_data;
 171    uint64_t data;
 172    EventNotifier *e;
 173};
 174
 175static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
 176                                           MemoryRegionIoeventfd *b)
 177{
 178    if (int128_lt(a->addr.start, b->addr.start)) {
 179        return true;
 180    } else if (int128_gt(a->addr.start, b->addr.start)) {
 181        return false;
 182    } else if (int128_lt(a->addr.size, b->addr.size)) {
 183        return true;
 184    } else if (int128_gt(a->addr.size, b->addr.size)) {
 185        return false;
 186    } else if (a->match_data < b->match_data) {
 187        return true;
 188    } else  if (a->match_data > b->match_data) {
 189        return false;
 190    } else if (a->match_data) {
 191        if (a->data < b->data) {
 192            return true;
 193        } else if (a->data > b->data) {
 194            return false;
 195        }
 196    }
 197    if (a->e < b->e) {
 198        return true;
 199    } else if (a->e > b->e) {
 200        return false;
 201    }
 202    return false;
 203}
 204
 205static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
 206                                          MemoryRegionIoeventfd *b)
 207{
 208    if (int128_eq(a->addr.start, b->addr.start) &&
 209        (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
 210         (int128_eq(a->addr.size, b->addr.size) &&
 211          (a->match_data == b->match_data) &&
 212          ((a->match_data && (a->data == b->data)) || !a->match_data) &&
 213          (a->e == b->e))))
 214        return true;
 215
 216    return false;
 217}
 218
 219/* Range of memory in the global map.  Addresses are absolute. */
 220struct FlatRange {
 221    MemoryRegion *mr;
 222    hwaddr offset_in_region;
 223    AddrRange addr;
 224    uint8_t dirty_log_mask;
 225    bool romd_mode;
 226    bool readonly;
 227    bool nonvolatile;
 228};
 229
 230#define FOR_EACH_FLAT_RANGE(var, view)          \
 231    for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
 232
 233static inline MemoryRegionSection
 234section_from_flat_range(FlatRange *fr, FlatView *fv)
 235{
 236    return (MemoryRegionSection) {
 237        .mr = fr->mr,
 238        .fv = fv,
 239        .offset_within_region = fr->offset_in_region,
 240        .size = fr->addr.size,
 241        .offset_within_address_space = int128_get64(fr->addr.start),
 242        .readonly = fr->readonly,
 243        .nonvolatile = fr->nonvolatile,
 244    };
 245}
 246
 247static bool flatrange_equal(FlatRange *a, FlatRange *b)
 248{
 249    return a->mr == b->mr
 250        && addrrange_equal(a->addr, b->addr)
 251        && a->offset_in_region == b->offset_in_region
 252        && a->romd_mode == b->romd_mode
 253        && a->readonly == b->readonly
 254        && a->nonvolatile == b->nonvolatile;
 255}
 256
 257static FlatView *flatview_new(MemoryRegion *mr_root)
 258{
 259    FlatView *view;
 260
 261    view = g_new0(FlatView, 1);
 262    view->ref = 1;
 263    view->root = mr_root;
 264    memory_region_ref(mr_root);
 265    trace_flatview_new(view, mr_root);
 266
 267    return view;
 268}
 269
 270/* Insert a range into a given position.  Caller is responsible for maintaining
 271 * sorting order.
 272 */
 273static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
 274{
 275    if (view->nr == view->nr_allocated) {
 276        view->nr_allocated = MAX(2 * view->nr, 10);
 277        view->ranges = g_realloc(view->ranges,
 278                                    view->nr_allocated * sizeof(*view->ranges));
 279    }
 280    memmove(view->ranges + pos + 1, view->ranges + pos,
 281            (view->nr - pos) * sizeof(FlatRange));
 282    view->ranges[pos] = *range;
 283    memory_region_ref(range->mr);
 284    ++view->nr;
 285}
 286
 287static void flatview_destroy(FlatView *view)
 288{
 289    int i;
 290
 291    trace_flatview_destroy(view, view->root);
 292    if (view->dispatch) {
 293        address_space_dispatch_free(view->dispatch);
 294    }
 295    for (i = 0; i < view->nr; i++) {
 296        memory_region_unref(view->ranges[i].mr);
 297    }
 298    g_free(view->ranges);
 299    memory_region_unref(view->root);
 300    g_free(view);
 301}
 302
 303static bool flatview_ref(FlatView *view)
 304{
 305    return qatomic_fetch_inc_nonzero(&view->ref) > 0;
 306}
 307
 308void flatview_unref(FlatView *view)
 309{
 310    if (qatomic_fetch_dec(&view->ref) == 1) {
 311        trace_flatview_destroy_rcu(view, view->root);
 312        assert(view->root);
 313        call_rcu(view, flatview_destroy, rcu);
 314    }
 315}
 316
 317static bool can_merge(FlatRange *r1, FlatRange *r2)
 318{
 319    return int128_eq(addrrange_end(r1->addr), r2->addr.start)
 320        && r1->mr == r2->mr
 321        && int128_eq(int128_add(int128_make64(r1->offset_in_region),
 322                                r1->addr.size),
 323                     int128_make64(r2->offset_in_region))
 324        && r1->dirty_log_mask == r2->dirty_log_mask
 325        && r1->romd_mode == r2->romd_mode
 326        && r1->readonly == r2->readonly
 327        && r1->nonvolatile == r2->nonvolatile;
 328}
 329
 330/* Attempt to simplify a view by merging adjacent ranges */
 331static void flatview_simplify(FlatView *view)
 332{
 333    unsigned i, j, k;
 334
 335    i = 0;
 336    while (i < view->nr) {
 337        j = i + 1;
 338        while (j < view->nr
 339               && can_merge(&view->ranges[j-1], &view->ranges[j])) {
 340            int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
 341            ++j;
 342        }
 343        ++i;
 344        for (k = i; k < j; k++) {
 345            memory_region_unref(view->ranges[k].mr);
 346        }
 347        memmove(&view->ranges[i], &view->ranges[j],
 348                (view->nr - j) * sizeof(view->ranges[j]));
 349        view->nr -= j - i;
 350    }
 351}
 352
 353static bool memory_region_big_endian(MemoryRegion *mr)
 354{
 355#ifdef TARGET_WORDS_BIGENDIAN
 356    return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
 357#else
 358    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 359#endif
 360}
 361
 362static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
 363{
 364    if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
 365        switch (op & MO_SIZE) {
 366        case MO_8:
 367            break;
 368        case MO_16:
 369            *data = bswap16(*data);
 370            break;
 371        case MO_32:
 372            *data = bswap32(*data);
 373            break;
 374        case MO_64:
 375            *data = bswap64(*data);
 376            break;
 377        default:
 378            g_assert_not_reached();
 379        }
 380    }
 381}
 382
 383static inline void memory_region_shift_read_access(uint64_t *value,
 384                                                   signed shift,
 385                                                   uint64_t mask,
 386                                                   uint64_t tmp)
 387{
 388    if (shift >= 0) {
 389        *value |= (tmp & mask) << shift;
 390    } else {
 391        *value |= (tmp & mask) >> -shift;
 392    }
 393}
 394
 395static inline uint64_t memory_region_shift_write_access(uint64_t *value,
 396                                                        signed shift,
 397                                                        uint64_t mask)
 398{
 399    uint64_t tmp;
 400
 401    if (shift >= 0) {
 402        tmp = (*value >> shift) & mask;
 403    } else {
 404        tmp = (*value << -shift) & mask;
 405    }
 406
 407    return tmp;
 408}
 409
 410static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
 411{
 412    MemoryRegion *root;
 413    hwaddr abs_addr = offset;
 414
 415    abs_addr += mr->addr;
 416    for (root = mr; root->container; ) {
 417        root = root->container;
 418        abs_addr += root->addr;
 419    }
 420
 421    return abs_addr;
 422}
 423
 424static int get_cpu_index(void)
 425{
 426    if (current_cpu) {
 427        return current_cpu->cpu_index;
 428    }
 429    return -1;
 430}
 431
 432static MemTxResult  memory_region_read_accessor(MemoryRegion *mr,
 433                                                hwaddr addr,
 434                                                uint64_t *value,
 435                                                unsigned size,
 436                                                signed shift,
 437                                                uint64_t mask,
 438                                                MemTxAttrs attrs)
 439{
 440    uint64_t tmp;
 441
 442    tmp = mr->ops->read(mr->opaque, addr, size);
 443    if (mr->subpage) {
 444        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 445    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
 446        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 447        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 448    }
 449    memory_region_shift_read_access(value, shift, mask, tmp);
 450    return MEMTX_OK;
 451}
 452
 453static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
 454                                                          hwaddr addr,
 455                                                          uint64_t *value,
 456                                                          unsigned size,
 457                                                          signed shift,
 458                                                          uint64_t mask,
 459                                                          MemTxAttrs attrs)
 460{
 461    uint64_t tmp = 0;
 462    MemTxResult r;
 463
 464    r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
 465    if (mr->subpage) {
 466        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 467    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
 468        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 469        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
 470    }
 471    memory_region_shift_read_access(value, shift, mask, tmp);
 472    return r;
 473}
 474
 475static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
 476                                                hwaddr addr,
 477                                                uint64_t *value,
 478                                                unsigned size,
 479                                                signed shift,
 480                                                uint64_t mask,
 481                                                MemTxAttrs attrs)
 482{
 483    uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
 484
 485    if (mr->subpage) {
 486        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 487    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
 488        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 489        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 490    }
 491    mr->ops->write(mr->opaque, addr, tmp, size);
 492    return MEMTX_OK;
 493}
 494
 495static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
 496                                                           hwaddr addr,
 497                                                           uint64_t *value,
 498                                                           unsigned size,
 499                                                           signed shift,
 500                                                           uint64_t mask,
 501                                                           MemTxAttrs attrs)
 502{
 503    uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
 504
 505    if (mr->subpage) {
 506        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 507    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
 508        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 509        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
 510    }
 511    return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
 512}
 513
 514static MemTxResult access_with_adjusted_size(hwaddr addr,
 515                                      uint64_t *value,
 516                                      unsigned size,
 517                                      unsigned access_size_min,
 518                                      unsigned access_size_max,
 519                                      MemTxResult (*access_fn)
 520                                                  (MemoryRegion *mr,
 521                                                   hwaddr addr,
 522                                                   uint64_t *value,
 523                                                   unsigned size,
 524                                                   signed shift,
 525                                                   uint64_t mask,
 526                                                   MemTxAttrs attrs),
 527                                      MemoryRegion *mr,
 528                                      MemTxAttrs attrs)
 529{
 530    uint64_t access_mask;
 531    unsigned access_size;
 532    unsigned i;
 533    MemTxResult r = MEMTX_OK;
 534
 535    if (!access_size_min) {
 536        access_size_min = 1;
 537    }
 538    if (!access_size_max) {
 539        access_size_max = 4;
 540    }
 541
 542    /* FIXME: support unaligned access? */
 543    access_size = MAX(MIN(size, access_size_max), access_size_min);
 544    access_mask = MAKE_64BIT_MASK(0, access_size * 8);
 545    if (memory_region_big_endian(mr)) {
 546        for (i = 0; i < size; i += access_size) {
 547            r |= access_fn(mr, addr + i, value, access_size,
 548                        (size - access_size - i) * 8, access_mask, attrs);
 549        }
 550    } else {
 551        for (i = 0; i < size; i += access_size) {
 552            r |= access_fn(mr, addr + i, value, access_size, i * 8,
 553                        access_mask, attrs);
 554        }
 555    }
 556    return r;
 557}
 558
 559static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
 560{
 561    AddressSpace *as;
 562
 563    while (mr->container) {
 564        mr = mr->container;
 565    }
 566    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 567        if (mr == as->root) {
 568            return as;
 569        }
 570    }
 571    return NULL;
 572}
 573
 574/* Render a memory region into the global view.  Ranges in @view obscure
 575 * ranges in @mr.
 576 */
 577static void render_memory_region(FlatView *view,
 578                                 MemoryRegion *mr,
 579                                 Int128 base,
 580                                 AddrRange clip,
 581                                 bool readonly,
 582                                 bool nonvolatile)
 583{
 584    MemoryRegion *subregion;
 585    unsigned i;
 586    hwaddr offset_in_region;
 587    Int128 remain;
 588    Int128 now;
 589    FlatRange fr;
 590    AddrRange tmp;
 591
 592    if (!mr->enabled) {
 593        return;
 594    }
 595
 596    int128_addto(&base, int128_make64(mr->addr));
 597    readonly |= mr->readonly;
 598    nonvolatile |= mr->nonvolatile;
 599
 600    tmp = addrrange_make(base, mr->size);
 601
 602    if (!addrrange_intersects(tmp, clip)) {
 603        return;
 604    }
 605
 606    clip = addrrange_intersection(tmp, clip);
 607
 608    if (mr->alias) {
 609        int128_subfrom(&base, int128_make64(mr->alias->addr));
 610        int128_subfrom(&base, int128_make64(mr->alias_offset));
 611        render_memory_region(view, mr->alias, base, clip,
 612                             readonly, nonvolatile);
 613        return;
 614    }
 615
 616    /* Render subregions in priority order. */
 617    QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
 618        render_memory_region(view, subregion, base, clip,
 619                             readonly, nonvolatile);
 620    }
 621
 622    if (!mr->terminates) {
 623        return;
 624    }
 625
 626    offset_in_region = int128_get64(int128_sub(clip.start, base));
 627    base = clip.start;
 628    remain = clip.size;
 629
 630    fr.mr = mr;
 631    fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
 632    fr.romd_mode = mr->romd_mode;
 633    fr.readonly = readonly;
 634    fr.nonvolatile = nonvolatile;
 635
 636    /* Render the region itself into any gaps left by the current view. */
 637    for (i = 0; i < view->nr && int128_nz(remain); ++i) {
 638        if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
 639            continue;
 640        }
 641        if (int128_lt(base, view->ranges[i].addr.start)) {
 642            now = int128_min(remain,
 643                             int128_sub(view->ranges[i].addr.start, base));
 644            fr.offset_in_region = offset_in_region;
 645            fr.addr = addrrange_make(base, now);
 646            flatview_insert(view, i, &fr);
 647            ++i;
 648            int128_addto(&base, now);
 649            offset_in_region += int128_get64(now);
 650            int128_subfrom(&remain, now);
 651        }
 652        now = int128_sub(int128_min(int128_add(base, remain),
 653                                    addrrange_end(view->ranges[i].addr)),
 654                         base);
 655        int128_addto(&base, now);
 656        offset_in_region += int128_get64(now);
 657        int128_subfrom(&remain, now);
 658    }
 659    if (int128_nz(remain)) {
 660        fr.offset_in_region = offset_in_region;
 661        fr.addr = addrrange_make(base, remain);
 662        flatview_insert(view, i, &fr);
 663    }
 664}
 665
 666void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
 667{
 668    FlatRange *fr;
 669
 670    assert(fv);
 671    assert(cb);
 672
 673    FOR_EACH_FLAT_RANGE(fr, fv) {
 674        if (cb(fr->addr.start, fr->addr.size, fr->mr,
 675               fr->offset_in_region, opaque)) {
 676            break;
 677        }
 678    }
 679}
 680
 681static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
 682{
 683    while (mr->enabled) {
 684        if (mr->alias) {
 685            if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
 686                /* The alias is included in its entirety.  Use it as
 687                 * the "real" root, so that we can share more FlatViews.
 688                 */
 689                mr = mr->alias;
 690                continue;
 691            }
 692        } else if (!mr->terminates) {
 693            unsigned int found = 0;
 694            MemoryRegion *child, *next = NULL;
 695            QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
 696                if (child->enabled) {
 697                    if (++found > 1) {
 698                        next = NULL;
 699                        break;
 700                    }
 701                    if (!child->addr && int128_ge(mr->size, child->size)) {
 702                        /* A child is included in its entirety.  If it's the only
 703                         * enabled one, use it in the hope of finding an alias down the
 704                         * way. This will also let us share FlatViews.
 705                         */
 706                        next = child;
 707                    }
 708                }
 709            }
 710            if (found == 0) {
 711                return NULL;
 712            }
 713            if (next) {
 714                mr = next;
 715                continue;
 716            }
 717        }
 718
 719        return mr;
 720    }
 721
 722    return NULL;
 723}
 724
 725/* Render a memory topology into a list of disjoint absolute ranges. */
 726static FlatView *generate_memory_topology(MemoryRegion *mr)
 727{
 728    int i;
 729    FlatView *view;
 730
 731    view = flatview_new(mr);
 732
 733    if (mr) {
 734        render_memory_region(view, mr, int128_zero(),
 735                             addrrange_make(int128_zero(), int128_2_64()),
 736                             false, false);
 737    }
 738    flatview_simplify(view);
 739
 740    view->dispatch = address_space_dispatch_new(view);
 741    for (i = 0; i < view->nr; i++) {
 742        MemoryRegionSection mrs =
 743            section_from_flat_range(&view->ranges[i], view);
 744        flatview_add_to_dispatch(view, &mrs);
 745    }
 746    address_space_dispatch_compact(view->dispatch);
 747    g_hash_table_replace(flat_views, mr, view);
 748
 749    return view;
 750}
 751
 752static void address_space_add_del_ioeventfds(AddressSpace *as,
 753                                             MemoryRegionIoeventfd *fds_new,
 754                                             unsigned fds_new_nb,
 755                                             MemoryRegionIoeventfd *fds_old,
 756                                             unsigned fds_old_nb)
 757{
 758    unsigned iold, inew;
 759    MemoryRegionIoeventfd *fd;
 760    MemoryRegionSection section;
 761
 762    /* Generate a symmetric difference of the old and new fd sets, adding
 763     * and deleting as necessary.
 764     */
 765
 766    iold = inew = 0;
 767    while (iold < fds_old_nb || inew < fds_new_nb) {
 768        if (iold < fds_old_nb
 769            && (inew == fds_new_nb
 770                || memory_region_ioeventfd_before(&fds_old[iold],
 771                                                  &fds_new[inew]))) {
 772            fd = &fds_old[iold];
 773            section = (MemoryRegionSection) {
 774                .fv = address_space_to_flatview(as),
 775                .offset_within_address_space = int128_get64(fd->addr.start),
 776                .size = fd->addr.size,
 777            };
 778            MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
 779                                 fd->match_data, fd->data, fd->e);
 780            ++iold;
 781        } else if (inew < fds_new_nb
 782                   && (iold == fds_old_nb
 783                       || memory_region_ioeventfd_before(&fds_new[inew],
 784                                                         &fds_old[iold]))) {
 785            fd = &fds_new[inew];
 786            section = (MemoryRegionSection) {
 787                .fv = address_space_to_flatview(as),
 788                .offset_within_address_space = int128_get64(fd->addr.start),
 789                .size = fd->addr.size,
 790            };
 791            MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
 792                                 fd->match_data, fd->data, fd->e);
 793            ++inew;
 794        } else {
 795            ++iold;
 796            ++inew;
 797        }
 798    }
 799}
 800
 801FlatView *address_space_get_flatview(AddressSpace *as)
 802{
 803    FlatView *view;
 804
 805    RCU_READ_LOCK_GUARD();
 806    do {
 807        view = address_space_to_flatview(as);
 808        /* If somebody has replaced as->current_map concurrently,
 809         * flatview_ref returns false.
 810         */
 811    } while (!flatview_ref(view));
 812    return view;
 813}
 814
 815static void address_space_update_ioeventfds(AddressSpace *as)
 816{
 817    FlatView *view;
 818    FlatRange *fr;
 819    unsigned ioeventfd_nb = 0;
 820    unsigned ioeventfd_max;
 821    MemoryRegionIoeventfd *ioeventfds;
 822    AddrRange tmp;
 823    unsigned i;
 824
 825    /*
 826     * It is likely that the number of ioeventfds hasn't changed much, so use
 827     * the previous size as the starting value, with some headroom to avoid
 828     * gratuitous reallocations.
 829     */
 830    ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
 831    ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
 832
 833    view = address_space_get_flatview(as);
 834    FOR_EACH_FLAT_RANGE(fr, view) {
 835        for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
 836            tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
 837                                  int128_sub(fr->addr.start,
 838                                             int128_make64(fr->offset_in_region)));
 839            if (addrrange_intersects(fr->addr, tmp)) {
 840                ++ioeventfd_nb;
 841                if (ioeventfd_nb > ioeventfd_max) {
 842                    ioeventfd_max = MAX(ioeventfd_max * 2, 4);
 843                    ioeventfds = g_realloc(ioeventfds,
 844                            ioeventfd_max * sizeof(*ioeventfds));
 845                }
 846                ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
 847                ioeventfds[ioeventfd_nb-1].addr = tmp;
 848            }
 849        }
 850    }
 851
 852    address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
 853                                     as->ioeventfds, as->ioeventfd_nb);
 854
 855    g_free(as->ioeventfds);
 856    as->ioeventfds = ioeventfds;
 857    as->ioeventfd_nb = ioeventfd_nb;
 858    flatview_unref(view);
 859}
 860
 861/*
 862 * Notify the memory listeners about the coalesced IO change events of
 863 * range `cmr'.  Only the part that has intersection of the specified
 864 * FlatRange will be sent.
 865 */
 866static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
 867                                           CoalescedMemoryRange *cmr, bool add)
 868{
 869    AddrRange tmp;
 870
 871    tmp = addrrange_shift(cmr->addr,
 872                          int128_sub(fr->addr.start,
 873                                     int128_make64(fr->offset_in_region)));
 874    if (!addrrange_intersects(tmp, fr->addr)) {
 875        return;
 876    }
 877    tmp = addrrange_intersection(tmp, fr->addr);
 878
 879    if (add) {
 880        MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
 881                                      int128_get64(tmp.start),
 882                                      int128_get64(tmp.size));
 883    } else {
 884        MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
 885                                      int128_get64(tmp.start),
 886                                      int128_get64(tmp.size));
 887    }
 888}
 889
 890static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
 891{
 892    CoalescedMemoryRange *cmr;
 893
 894    QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
 895        flat_range_coalesced_io_notify(fr, as, cmr, false);
 896    }
 897}
 898
 899static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
 900{
 901    MemoryRegion *mr = fr->mr;
 902    CoalescedMemoryRange *cmr;
 903
 904    if (QTAILQ_EMPTY(&mr->coalesced)) {
 905        return;
 906    }
 907
 908    QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
 909        flat_range_coalesced_io_notify(fr, as, cmr, true);
 910    }
 911}
 912
 913static void address_space_update_topology_pass(AddressSpace *as,
 914                                               const FlatView *old_view,
 915                                               const FlatView *new_view,
 916                                               bool adding)
 917{
 918    unsigned iold, inew;
 919    FlatRange *frold, *frnew;
 920
 921    /* Generate a symmetric difference of the old and new memory maps.
 922     * Kill ranges in the old map, and instantiate ranges in the new map.
 923     */
 924    iold = inew = 0;
 925    while (iold < old_view->nr || inew < new_view->nr) {
 926        if (iold < old_view->nr) {
 927            frold = &old_view->ranges[iold];
 928        } else {
 929            frold = NULL;
 930        }
 931        if (inew < new_view->nr) {
 932            frnew = &new_view->ranges[inew];
 933        } else {
 934            frnew = NULL;
 935        }
 936
 937        if (frold
 938            && (!frnew
 939                || int128_lt(frold->addr.start, frnew->addr.start)
 940                || (int128_eq(frold->addr.start, frnew->addr.start)
 941                    && !flatrange_equal(frold, frnew)))) {
 942            /* In old but not in new, or in both but attributes changed. */
 943
 944            if (!adding) {
 945                flat_range_coalesced_io_del(frold, as);
 946                MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
 947            }
 948
 949            ++iold;
 950        } else if (frold && frnew && flatrange_equal(frold, frnew)) {
 951            /* In both and unchanged (except logging may have changed) */
 952
 953            if (adding) {
 954                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
 955                if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
 956                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
 957                                                  frold->dirty_log_mask,
 958                                                  frnew->dirty_log_mask);
 959                }
 960                if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
 961                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
 962                                                  frold->dirty_log_mask,
 963                                                  frnew->dirty_log_mask);
 964                }
 965            }
 966
 967            ++iold;
 968            ++inew;
 969        } else {
 970            /* In new */
 971
 972            if (adding) {
 973                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
 974                flat_range_coalesced_io_add(frnew, as);
 975            }
 976
 977            ++inew;
 978        }
 979    }
 980}
 981
 982static void flatviews_init(void)
 983{
 984    static FlatView *empty_view;
 985
 986    if (flat_views) {
 987        return;
 988    }
 989
 990    flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
 991                                       (GDestroyNotify) flatview_unref);
 992    if (!empty_view) {
 993        empty_view = generate_memory_topology(NULL);
 994        /* We keep it alive forever in the global variable.  */
 995        flatview_ref(empty_view);
 996    } else {
 997        g_hash_table_replace(flat_views, NULL, empty_view);
 998        flatview_ref(empty_view);
 999    }
1000}
1001
1002static void flatviews_reset(void)
1003{
1004    AddressSpace *as;
1005
1006    if (flat_views) {
1007        g_hash_table_unref(flat_views);
1008        flat_views = NULL;
1009    }
1010    flatviews_init();
1011
1012    /* Render unique FVs */
1013    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1014        MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1015
1016        if (g_hash_table_lookup(flat_views, physmr)) {
1017            continue;
1018        }
1019
1020        generate_memory_topology(physmr);
1021    }
1022}
1023
1024static void address_space_set_flatview(AddressSpace *as)
1025{
1026    FlatView *old_view = address_space_to_flatview(as);
1027    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1028    FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1029
1030    assert(new_view);
1031
1032    if (old_view == new_view) {
1033        return;
1034    }
1035
1036    if (old_view) {
1037        flatview_ref(old_view);
1038    }
1039
1040    flatview_ref(new_view);
1041
1042    if (!QTAILQ_EMPTY(&as->listeners)) {
1043        FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1044
1045        if (!old_view2) {
1046            old_view2 = &tmpview;
1047        }
1048        address_space_update_topology_pass(as, old_view2, new_view, false);
1049        address_space_update_topology_pass(as, old_view2, new_view, true);
1050    }
1051
1052    /* Writes are protected by the BQL.  */
1053    qatomic_rcu_set(&as->current_map, new_view);
1054    if (old_view) {
1055        flatview_unref(old_view);
1056    }
1057
1058    /* Note that all the old MemoryRegions are still alive up to this
1059     * point.  This relieves most MemoryListeners from the need to
1060     * ref/unref the MemoryRegions they get---unless they use them
1061     * outside the iothread mutex, in which case precise reference
1062     * counting is necessary.
1063     */
1064    if (old_view) {
1065        flatview_unref(old_view);
1066    }
1067}
1068
1069static void address_space_update_topology(AddressSpace *as)
1070{
1071    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1072
1073    flatviews_init();
1074    if (!g_hash_table_lookup(flat_views, physmr)) {
1075        generate_memory_topology(physmr);
1076    }
1077    address_space_set_flatview(as);
1078}
1079
1080void memory_region_transaction_begin(void)
1081{
1082    qemu_flush_coalesced_mmio_buffer();
1083    ++memory_region_transaction_depth;
1084}
1085
1086void memory_region_transaction_commit(void)
1087{
1088    AddressSpace *as;
1089
1090    assert(memory_region_transaction_depth);
1091    assert(qemu_mutex_iothread_locked());
1092
1093    --memory_region_transaction_depth;
1094    if (!memory_region_transaction_depth) {
1095        if (memory_region_update_pending) {
1096            flatviews_reset();
1097
1098            MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1099
1100            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1101                address_space_set_flatview(as);
1102                address_space_update_ioeventfds(as);
1103            }
1104            memory_region_update_pending = false;
1105            ioeventfd_update_pending = false;
1106            MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1107        } else if (ioeventfd_update_pending) {
1108            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1109                address_space_update_ioeventfds(as);
1110            }
1111            ioeventfd_update_pending = false;
1112        }
1113   }
1114}
1115
1116static void memory_region_destructor_none(MemoryRegion *mr)
1117{
1118}
1119
1120static void memory_region_destructor_ram(MemoryRegion *mr)
1121{
1122    qemu_ram_free(mr->ram_block);
1123}
1124
1125static bool memory_region_need_escape(char c)
1126{
1127    return c == '/' || c == '[' || c == '\\' || c == ']';
1128}
1129
1130static char *memory_region_escape_name(const char *name)
1131{
1132    const char *p;
1133    char *escaped, *q;
1134    uint8_t c;
1135    size_t bytes = 0;
1136
1137    for (p = name; *p; p++) {
1138        bytes += memory_region_need_escape(*p) ? 4 : 1;
1139    }
1140    if (bytes == p - name) {
1141       return g_memdup(name, bytes + 1);
1142    }
1143
1144    escaped = g_malloc(bytes + 1);
1145    for (p = name, q = escaped; *p; p++) {
1146        c = *p;
1147        if (unlikely(memory_region_need_escape(c))) {
1148            *q++ = '\\';
1149            *q++ = 'x';
1150            *q++ = "0123456789abcdef"[c >> 4];
1151            c = "0123456789abcdef"[c & 15];
1152        }
1153        *q++ = c;
1154    }
1155    *q = 0;
1156    return escaped;
1157}
1158
1159static void memory_region_do_init(MemoryRegion *mr,
1160                                  Object *owner,
1161                                  const char *name,
1162                                  uint64_t size)
1163{
1164    mr->size = int128_make64(size);
1165    if (size == UINT64_MAX) {
1166        mr->size = int128_2_64();
1167    }
1168    mr->name = g_strdup(name);
1169    mr->owner = owner;
1170    mr->ram_block = NULL;
1171
1172    if (name) {
1173        char *escaped_name = memory_region_escape_name(name);
1174        char *name_array = g_strdup_printf("%s[*]", escaped_name);
1175
1176        if (!owner) {
1177            owner = container_get(qdev_get_machine(), "/unattached");
1178        }
1179
1180        object_property_add_child(owner, name_array, OBJECT(mr));
1181        object_unref(OBJECT(mr));
1182        g_free(name_array);
1183        g_free(escaped_name);
1184    }
1185}
1186
1187void memory_region_init(MemoryRegion *mr,
1188                        Object *owner,
1189                        const char *name,
1190                        uint64_t size)
1191{
1192    object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1193    memory_region_do_init(mr, owner, name, size);
1194}
1195
1196static void memory_region_get_container(Object *obj, Visitor *v,
1197                                        const char *name, void *opaque,
1198                                        Error **errp)
1199{
1200    MemoryRegion *mr = MEMORY_REGION(obj);
1201    char *path = (char *)"";
1202
1203    if (mr->container) {
1204        path = object_get_canonical_path(OBJECT(mr->container));
1205    }
1206    visit_type_str(v, name, &path, errp);
1207    if (mr->container) {
1208        g_free(path);
1209    }
1210}
1211
1212static Object *memory_region_resolve_container(Object *obj, void *opaque,
1213                                               const char *part)
1214{
1215    MemoryRegion *mr = MEMORY_REGION(obj);
1216
1217    return OBJECT(mr->container);
1218}
1219
1220static void memory_region_get_priority(Object *obj, Visitor *v,
1221                                       const char *name, void *opaque,
1222                                       Error **errp)
1223{
1224    MemoryRegion *mr = MEMORY_REGION(obj);
1225    int32_t value = mr->priority;
1226
1227    visit_type_int32(v, name, &value, errp);
1228}
1229
1230static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1231                                   void *opaque, Error **errp)
1232{
1233    MemoryRegion *mr = MEMORY_REGION(obj);
1234    uint64_t value = memory_region_size(mr);
1235
1236    visit_type_uint64(v, name, &value, errp);
1237}
1238
1239static void memory_region_initfn(Object *obj)
1240{
1241    MemoryRegion *mr = MEMORY_REGION(obj);
1242    ObjectProperty *op;
1243
1244    mr->ops = &unassigned_mem_ops;
1245    mr->enabled = true;
1246    mr->romd_mode = true;
1247    mr->destructor = memory_region_destructor_none;
1248    QTAILQ_INIT(&mr->subregions);
1249    QTAILQ_INIT(&mr->coalesced);
1250
1251    op = object_property_add(OBJECT(mr), "container",
1252                             "link<" TYPE_MEMORY_REGION ">",
1253                             memory_region_get_container,
1254                             NULL, /* memory_region_set_container */
1255                             NULL, NULL);
1256    op->resolve = memory_region_resolve_container;
1257
1258    object_property_add_uint64_ptr(OBJECT(mr), "addr",
1259                                   &mr->addr, OBJ_PROP_FLAG_READ);
1260    object_property_add(OBJECT(mr), "priority", "uint32",
1261                        memory_region_get_priority,
1262                        NULL, /* memory_region_set_priority */
1263                        NULL, NULL);
1264    object_property_add(OBJECT(mr), "size", "uint64",
1265                        memory_region_get_size,
1266                        NULL, /* memory_region_set_size, */
1267                        NULL, NULL);
1268}
1269
1270static void iommu_memory_region_initfn(Object *obj)
1271{
1272    MemoryRegion *mr = MEMORY_REGION(obj);
1273
1274    mr->is_iommu = true;
1275}
1276
1277static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1278                                    unsigned size)
1279{
1280#ifdef DEBUG_UNASSIGNED
1281    printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1282#endif
1283    return 0;
1284}
1285
1286static void unassigned_mem_write(void *opaque, hwaddr addr,
1287                                 uint64_t val, unsigned size)
1288{
1289#ifdef DEBUG_UNASSIGNED
1290    printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1291#endif
1292}
1293
1294static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1295                                   unsigned size, bool is_write,
1296                                   MemTxAttrs attrs)
1297{
1298    return false;
1299}
1300
1301const MemoryRegionOps unassigned_mem_ops = {
1302    .valid.accepts = unassigned_mem_accepts,
1303    .endianness = DEVICE_NATIVE_ENDIAN,
1304};
1305
1306static uint64_t memory_region_ram_device_read(void *opaque,
1307                                              hwaddr addr, unsigned size)
1308{
1309    MemoryRegion *mr = opaque;
1310    uint64_t data = (uint64_t)~0;
1311
1312    switch (size) {
1313    case 1:
1314        data = *(uint8_t *)(mr->ram_block->host + addr);
1315        break;
1316    case 2:
1317        data = *(uint16_t *)(mr->ram_block->host + addr);
1318        break;
1319    case 4:
1320        data = *(uint32_t *)(mr->ram_block->host + addr);
1321        break;
1322    case 8:
1323        data = *(uint64_t *)(mr->ram_block->host + addr);
1324        break;
1325    }
1326
1327    trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1328
1329    return data;
1330}
1331
1332static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1333                                           uint64_t data, unsigned size)
1334{
1335    MemoryRegion *mr = opaque;
1336
1337    trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1338
1339    switch (size) {
1340    case 1:
1341        *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1342        break;
1343    case 2:
1344        *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1345        break;
1346    case 4:
1347        *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1348        break;
1349    case 8:
1350        *(uint64_t *)(mr->ram_block->host + addr) = data;
1351        break;
1352    }
1353}
1354
1355static const MemoryRegionOps ram_device_mem_ops = {
1356    .read = memory_region_ram_device_read,
1357    .write = memory_region_ram_device_write,
1358    .endianness = DEVICE_HOST_ENDIAN,
1359    .valid = {
1360        .min_access_size = 1,
1361        .max_access_size = 8,
1362        .unaligned = true,
1363    },
1364    .impl = {
1365        .min_access_size = 1,
1366        .max_access_size = 8,
1367        .unaligned = true,
1368    },
1369};
1370
1371bool memory_region_access_valid(MemoryRegion *mr,
1372                                hwaddr addr,
1373                                unsigned size,
1374                                bool is_write,
1375                                MemTxAttrs attrs)
1376{
1377    if (mr->ops->valid.accepts
1378        && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1379        qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1380                                       "0x%" HWADDR_PRIX ", size %u, "
1381                                       "region '%s', reason: rejected\n",
1382                      addr, size, memory_region_name(mr));
1383        return false;
1384    }
1385
1386    if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1387        qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1388                                       "0x%" HWADDR_PRIX ", size %u, "
1389                                       "region '%s', reason: unaligned\n",
1390                      addr, size, memory_region_name(mr));
1391        return false;
1392    }
1393
1394    /* Treat zero as compatibility all valid */
1395    if (!mr->ops->valid.max_access_size) {
1396        return true;
1397    }
1398
1399    if (size > mr->ops->valid.max_access_size
1400        || size < mr->ops->valid.min_access_size) {
1401        qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
1402                                       "0x%" HWADDR_PRIX ", size %u, "
1403                                       "region '%s', reason: invalid size "
1404                                       "(min:%u max:%u)\n",
1405                      addr, size, memory_region_name(mr),
1406                      mr->ops->valid.min_access_size,
1407                      mr->ops->valid.max_access_size);
1408        return false;
1409    }
1410    return true;
1411}
1412
1413static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1414                                                hwaddr addr,
1415                                                uint64_t *pval,
1416                                                unsigned size,
1417                                                MemTxAttrs attrs)
1418{
1419    *pval = 0;
1420
1421    if (mr->ops->read) {
1422        return access_with_adjusted_size(addr, pval, size,
1423                                         mr->ops->impl.min_access_size,
1424                                         mr->ops->impl.max_access_size,
1425                                         memory_region_read_accessor,
1426                                         mr, attrs);
1427    } else {
1428        return access_with_adjusted_size(addr, pval, size,
1429                                         mr->ops->impl.min_access_size,
1430                                         mr->ops->impl.max_access_size,
1431                                         memory_region_read_with_attrs_accessor,
1432                                         mr, attrs);
1433    }
1434}
1435
1436MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1437                                        hwaddr addr,
1438                                        uint64_t *pval,
1439                                        MemOp op,
1440                                        MemTxAttrs attrs)
1441{
1442    unsigned size = memop_size(op);
1443    MemTxResult r;
1444
1445    if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1446        *pval = unassigned_mem_read(mr, addr, size);
1447        return MEMTX_DECODE_ERROR;
1448    }
1449
1450    r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1451    adjust_endianness(mr, pval, op);
1452    return r;
1453}
1454
1455/* Return true if an eventfd was signalled */
1456static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1457                                                    hwaddr addr,
1458                                                    uint64_t data,
1459                                                    unsigned size,
1460                                                    MemTxAttrs attrs)
1461{
1462    MemoryRegionIoeventfd ioeventfd = {
1463        .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1464        .data = data,
1465    };
1466    unsigned i;
1467
1468    for (i = 0; i < mr->ioeventfd_nb; i++) {
1469        ioeventfd.match_data = mr->ioeventfds[i].match_data;
1470        ioeventfd.e = mr->ioeventfds[i].e;
1471
1472        if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1473            event_notifier_set(ioeventfd.e);
1474            return true;
1475        }
1476    }
1477
1478    return false;
1479}
1480
1481MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1482                                         hwaddr addr,
1483                                         uint64_t data,
1484                                         MemOp op,
1485                                         MemTxAttrs attrs)
1486{
1487    unsigned size = memop_size(op);
1488
1489    if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1490        unassigned_mem_write(mr, addr, data, size);
1491        return MEMTX_DECODE_ERROR;
1492    }
1493
1494    adjust_endianness(mr, &data, op);
1495
1496    if ((!kvm_eventfds_enabled()) &&
1497        memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1498        return MEMTX_OK;
1499    }
1500
1501    if (mr->ops->write) {
1502        return access_with_adjusted_size(addr, &data, size,
1503                                         mr->ops->impl.min_access_size,
1504                                         mr->ops->impl.max_access_size,
1505                                         memory_region_write_accessor, mr,
1506                                         attrs);
1507    } else {
1508        return
1509            access_with_adjusted_size(addr, &data, size,
1510                                      mr->ops->impl.min_access_size,
1511                                      mr->ops->impl.max_access_size,
1512                                      memory_region_write_with_attrs_accessor,
1513                                      mr, attrs);
1514    }
1515}
1516
1517void memory_region_init_io(MemoryRegion *mr,
1518                           Object *owner,
1519                           const MemoryRegionOps *ops,
1520                           void *opaque,
1521                           const char *name,
1522                           uint64_t size)
1523{
1524    memory_region_init(mr, owner, name, size);
1525    mr->ops = ops ? ops : &unassigned_mem_ops;
1526    mr->opaque = opaque;
1527    mr->terminates = true;
1528}
1529
1530void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1531                                      Object *owner,
1532                                      const char *name,
1533                                      uint64_t size,
1534                                      Error **errp)
1535{
1536    memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1537}
1538
1539void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
1540                                             Object *owner,
1541                                             const char *name,
1542                                             uint64_t size,
1543                                             bool share,
1544                                             Error **errp)
1545{
1546    Error *err = NULL;
1547    memory_region_init(mr, owner, name, size);
1548    mr->ram = true;
1549    mr->terminates = true;
1550    mr->destructor = memory_region_destructor_ram;
1551    mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
1552    if (err) {
1553        mr->size = int128_zero();
1554        object_unparent(OBJECT(mr));
1555        error_propagate(errp, err);
1556    }
1557}
1558
1559void memory_region_init_resizeable_ram(MemoryRegion *mr,
1560                                       Object *owner,
1561                                       const char *name,
1562                                       uint64_t size,
1563                                       uint64_t max_size,
1564                                       void (*resized)(const char*,
1565                                                       uint64_t length,
1566                                                       void *host),
1567                                       Error **errp)
1568{
1569    Error *err = NULL;
1570    memory_region_init(mr, owner, name, size);
1571    mr->ram = true;
1572    mr->terminates = true;
1573    mr->destructor = memory_region_destructor_ram;
1574    mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1575                                              mr, &err);
1576    if (err) {
1577        mr->size = int128_zero();
1578        object_unparent(OBJECT(mr));
1579        error_propagate(errp, err);
1580    }
1581}
1582
1583#ifdef CONFIG_POSIX
1584void memory_region_init_ram_from_file(MemoryRegion *mr,
1585                                      Object *owner,
1586                                      const char *name,
1587                                      uint64_t size,
1588                                      uint64_t align,
1589                                      uint32_t ram_flags,
1590                                      const char *path,
1591                                      bool readonly,
1592                                      Error **errp)
1593{
1594    Error *err = NULL;
1595    memory_region_init(mr, owner, name, size);
1596    mr->ram = true;
1597    mr->readonly = readonly;
1598    mr->terminates = true;
1599    mr->destructor = memory_region_destructor_ram;
1600    mr->align = align;
1601    mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1602                                             readonly, &err);
1603    if (err) {
1604        mr->size = int128_zero();
1605        object_unparent(OBJECT(mr));
1606        error_propagate(errp, err);
1607    }
1608}
1609
1610void memory_region_init_ram_from_fd(MemoryRegion *mr,
1611                                    Object *owner,
1612                                    const char *name,
1613                                    uint64_t size,
1614                                    bool share,
1615                                    int fd,
1616                                    ram_addr_t offset,
1617                                    Error **errp)
1618{
1619    Error *err = NULL;
1620    memory_region_init(mr, owner, name, size);
1621    mr->ram = true;
1622    mr->terminates = true;
1623    mr->destructor = memory_region_destructor_ram;
1624    mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
1625                                           share ? RAM_SHARED : 0,
1626                                           fd, offset, false, &err);
1627    if (err) {
1628        mr->size = int128_zero();
1629        object_unparent(OBJECT(mr));
1630        error_propagate(errp, err);
1631    }
1632}
1633#endif
1634
1635void memory_region_init_ram_ptr(MemoryRegion *mr,
1636                                Object *owner,
1637                                const char *name,
1638                                uint64_t size,
1639                                void *ptr)
1640{
1641    memory_region_init(mr, owner, name, size);
1642    mr->ram = true;
1643    mr->terminates = true;
1644    mr->destructor = memory_region_destructor_ram;
1645
1646    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1647    assert(ptr != NULL);
1648    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1649}
1650
1651void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1652                                       Object *owner,
1653                                       const char *name,
1654                                       uint64_t size,
1655                                       void *ptr)
1656{
1657    memory_region_init(mr, owner, name, size);
1658    mr->ram = true;
1659    mr->terminates = true;
1660    mr->ram_device = true;
1661    mr->ops = &ram_device_mem_ops;
1662    mr->opaque = mr;
1663    mr->destructor = memory_region_destructor_ram;
1664
1665    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1666    assert(ptr != NULL);
1667    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1668}
1669
1670void memory_region_init_alias(MemoryRegion *mr,
1671                              Object *owner,
1672                              const char *name,
1673                              MemoryRegion *orig,
1674                              hwaddr offset,
1675                              uint64_t size)
1676{
1677    memory_region_init(mr, owner, name, size);
1678    mr->alias = orig;
1679    mr->alias_offset = offset;
1680}
1681
1682void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1683                                      Object *owner,
1684                                      const char *name,
1685                                      uint64_t size,
1686                                      Error **errp)
1687{
1688    memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
1689    mr->readonly = true;
1690}
1691
1692void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1693                                             Object *owner,
1694                                             const MemoryRegionOps *ops,
1695                                             void *opaque,
1696                                             const char *name,
1697                                             uint64_t size,
1698                                             Error **errp)
1699{
1700    Error *err = NULL;
1701    assert(ops);
1702    memory_region_init(mr, owner, name, size);
1703    mr->ops = ops;
1704    mr->opaque = opaque;
1705    mr->terminates = true;
1706    mr->rom_device = true;
1707    mr->destructor = memory_region_destructor_ram;
1708    mr->ram_block = qemu_ram_alloc(size, false,  mr, &err);
1709    if (err) {
1710        mr->size = int128_zero();
1711        object_unparent(OBJECT(mr));
1712        error_propagate(errp, err);
1713    }
1714}
1715
1716void memory_region_init_iommu(void *_iommu_mr,
1717                              size_t instance_size,
1718                              const char *mrtypename,
1719                              Object *owner,
1720                              const char *name,
1721                              uint64_t size)
1722{
1723    struct IOMMUMemoryRegion *iommu_mr;
1724    struct MemoryRegion *mr;
1725
1726    object_initialize(_iommu_mr, instance_size, mrtypename);
1727    mr = MEMORY_REGION(_iommu_mr);
1728    memory_region_do_init(mr, owner, name, size);
1729    iommu_mr = IOMMU_MEMORY_REGION(mr);
1730    mr->terminates = true;  /* then re-forwards */
1731    QLIST_INIT(&iommu_mr->iommu_notify);
1732    iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1733}
1734
1735static void memory_region_finalize(Object *obj)
1736{
1737    MemoryRegion *mr = MEMORY_REGION(obj);
1738
1739    assert(!mr->container);
1740
1741    /* We know the region is not visible in any address space (it
1742     * does not have a container and cannot be a root either because
1743     * it has no references, so we can blindly clear mr->enabled.
1744     * memory_region_set_enabled instead could trigger a transaction
1745     * and cause an infinite loop.
1746     */
1747    mr->enabled = false;
1748    memory_region_transaction_begin();
1749    while (!QTAILQ_EMPTY(&mr->subregions)) {
1750        MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1751        memory_region_del_subregion(mr, subregion);
1752    }
1753    memory_region_transaction_commit();
1754
1755    mr->destructor(mr);
1756    memory_region_clear_coalescing(mr);
1757    g_free((char *)mr->name);
1758    g_free(mr->ioeventfds);
1759}
1760
1761Object *memory_region_owner(MemoryRegion *mr)
1762{
1763    Object *obj = OBJECT(mr);
1764    return obj->parent;
1765}
1766
1767void memory_region_ref(MemoryRegion *mr)
1768{
1769    /* MMIO callbacks most likely will access data that belongs
1770     * to the owner, hence the need to ref/unref the owner whenever
1771     * the memory region is in use.
1772     *
1773     * The memory region is a child of its owner.  As long as the
1774     * owner doesn't call unparent itself on the memory region,
1775     * ref-ing the owner will also keep the memory region alive.
1776     * Memory regions without an owner are supposed to never go away;
1777     * we do not ref/unref them because it slows down DMA sensibly.
1778     */
1779    if (mr && mr->owner) {
1780        object_ref(mr->owner);
1781    }
1782}
1783
1784void memory_region_unref(MemoryRegion *mr)
1785{
1786    if (mr && mr->owner) {
1787        object_unref(mr->owner);
1788    }
1789}
1790
1791uint64_t memory_region_size(MemoryRegion *mr)
1792{
1793    if (int128_eq(mr->size, int128_2_64())) {
1794        return UINT64_MAX;
1795    }
1796    return int128_get64(mr->size);
1797}
1798
1799const char *memory_region_name(const MemoryRegion *mr)
1800{
1801    if (!mr->name) {
1802        ((MemoryRegion *)mr)->name =
1803            g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1804    }
1805    return mr->name;
1806}
1807
1808bool memory_region_is_ram_device(MemoryRegion *mr)
1809{
1810    return mr->ram_device;
1811}
1812
1813uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1814{
1815    uint8_t mask = mr->dirty_log_mask;
1816    RAMBlock *rb = mr->ram_block;
1817
1818    if (global_dirty_log && ((rb && qemu_ram_is_migratable(rb)) ||
1819                             memory_region_is_iommu(mr))) {
1820        mask |= (1 << DIRTY_MEMORY_MIGRATION);
1821    }
1822
1823    if (tcg_enabled() && rb) {
1824        /* TCG only cares about dirty memory logging for RAM, not IOMMU.  */
1825        mask |= (1 << DIRTY_MEMORY_CODE);
1826    }
1827    return mask;
1828}
1829
1830bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1831{
1832    return memory_region_get_dirty_log_mask(mr) & (1 << client);
1833}
1834
1835static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1836                                                   Error **errp)
1837{
1838    IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1839    IOMMUNotifier *iommu_notifier;
1840    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1841    int ret = 0;
1842
1843    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1844        flags |= iommu_notifier->notifier_flags;
1845    }
1846
1847    if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1848        ret = imrc->notify_flag_changed(iommu_mr,
1849                                        iommu_mr->iommu_notify_flags,
1850                                        flags, errp);
1851    }
1852
1853    if (!ret) {
1854        iommu_mr->iommu_notify_flags = flags;
1855    }
1856    return ret;
1857}
1858
1859int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1860                                           uint64_t page_size_mask,
1861                                           Error **errp)
1862{
1863    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1864    int ret = 0;
1865
1866    if (imrc->iommu_set_page_size_mask) {
1867        ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1868    }
1869    return ret;
1870}
1871
1872int memory_region_register_iommu_notifier(MemoryRegion *mr,
1873                                          IOMMUNotifier *n, Error **errp)
1874{
1875    IOMMUMemoryRegion *iommu_mr;
1876    int ret;
1877
1878    if (mr->alias) {
1879        return memory_region_register_iommu_notifier(mr->alias, n, errp);
1880    }
1881
1882    /* We need to register for at least one bitfield */
1883    iommu_mr = IOMMU_MEMORY_REGION(mr);
1884    assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1885    assert(n->start <= n->end);
1886    assert(n->iommu_idx >= 0 &&
1887           n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1888
1889    QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1890    ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1891    if (ret) {
1892        QLIST_REMOVE(n, node);
1893    }
1894    return ret;
1895}
1896
1897uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1898{
1899    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1900
1901    if (imrc->get_min_page_size) {
1902        return imrc->get_min_page_size(iommu_mr);
1903    }
1904    return TARGET_PAGE_SIZE;
1905}
1906
1907void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1908{
1909    MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1910    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1911    hwaddr addr, granularity;
1912    IOMMUTLBEntry iotlb;
1913
1914    /* If the IOMMU has its own replay callback, override */
1915    if (imrc->replay) {
1916        imrc->replay(iommu_mr, n);
1917        return;
1918    }
1919
1920    granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1921
1922    for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1923        iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1924        if (iotlb.perm != IOMMU_NONE) {
1925            n->notify(n, &iotlb);
1926        }
1927
1928        /* if (2^64 - MR size) < granularity, it's possible to get an
1929         * infinite loop here.  This should catch such a wraparound */
1930        if ((addr + granularity) < addr) {
1931            break;
1932        }
1933    }
1934}
1935
1936void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1937                                             IOMMUNotifier *n)
1938{
1939    IOMMUMemoryRegion *iommu_mr;
1940
1941    if (mr->alias) {
1942        memory_region_unregister_iommu_notifier(mr->alias, n);
1943        return;
1944    }
1945    QLIST_REMOVE(n, node);
1946    iommu_mr = IOMMU_MEMORY_REGION(mr);
1947    memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1948}
1949
1950void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
1951                                    IOMMUTLBEvent *event)
1952{
1953    IOMMUTLBEntry *entry = &event->entry;
1954    hwaddr entry_end = entry->iova + entry->addr_mask;
1955    IOMMUTLBEntry tmp = *entry;
1956
1957    if (event->type == IOMMU_NOTIFIER_UNMAP) {
1958        assert(entry->perm == IOMMU_NONE);
1959    }
1960
1961    /*
1962     * Skip the notification if the notification does not overlap
1963     * with registered range.
1964     */
1965    if (notifier->start > entry_end || notifier->end < entry->iova) {
1966        return;
1967    }
1968
1969    if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
1970        /* Crop (iova, addr_mask) to range */
1971        tmp.iova = MAX(tmp.iova, notifier->start);
1972        tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
1973    } else {
1974        assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1975    }
1976
1977    if (event->type & notifier->notifier_flags) {
1978        notifier->notify(notifier, &tmp);
1979    }
1980}
1981
1982void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1983                                int iommu_idx,
1984                                IOMMUTLBEvent event)
1985{
1986    IOMMUNotifier *iommu_notifier;
1987
1988    assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1989
1990    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1991        if (iommu_notifier->iommu_idx == iommu_idx) {
1992            memory_region_notify_iommu_one(iommu_notifier, &event);
1993        }
1994    }
1995}
1996
1997int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
1998                                 enum IOMMUMemoryRegionAttr attr,
1999                                 void *data)
2000{
2001    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2002
2003    if (!imrc->get_attr) {
2004        return -EINVAL;
2005    }
2006
2007    return imrc->get_attr(iommu_mr, attr, data);
2008}
2009
2010int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2011                                       MemTxAttrs attrs)
2012{
2013    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2014
2015    if (!imrc->attrs_to_index) {
2016        return 0;
2017    }
2018
2019    return imrc->attrs_to_index(iommu_mr, attrs);
2020}
2021
2022int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2023{
2024    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2025
2026    if (!imrc->num_indexes) {
2027        return 1;
2028    }
2029
2030    return imrc->num_indexes(iommu_mr);
2031}
2032
2033void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2034{
2035    uint8_t mask = 1 << client;
2036    uint8_t old_logging;
2037
2038    assert(client == DIRTY_MEMORY_VGA);
2039    old_logging = mr->vga_logging_count;
2040    mr->vga_logging_count += log ? 1 : -1;
2041    if (!!old_logging == !!mr->vga_logging_count) {
2042        return;
2043    }
2044
2045    memory_region_transaction_begin();
2046    mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2047    memory_region_update_pending |= mr->enabled;
2048    memory_region_transaction_commit();
2049}
2050
2051void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2052                             hwaddr size)
2053{
2054    assert(mr->ram_block);
2055    cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2056                                        size,
2057                                        memory_region_get_dirty_log_mask(mr));
2058}
2059
2060static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2061{
2062    MemoryListener *listener;
2063    AddressSpace *as;
2064    FlatView *view;
2065    FlatRange *fr;
2066
2067    /* If the same address space has multiple log_sync listeners, we
2068     * visit that address space's FlatView multiple times.  But because
2069     * log_sync listeners are rare, it's still cheaper than walking each
2070     * address space once.
2071     */
2072    QTAILQ_FOREACH(listener, &memory_listeners, link) {
2073        if (!listener->log_sync) {
2074            continue;
2075        }
2076        as = listener->address_space;
2077        view = address_space_get_flatview(as);
2078        FOR_EACH_FLAT_RANGE(fr, view) {
2079            if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2080                MemoryRegionSection mrs = section_from_flat_range(fr, view);
2081                listener->log_sync(listener, &mrs);
2082            }
2083        }
2084        flatview_unref(view);
2085    }
2086}
2087
2088void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2089                                      hwaddr len)
2090{
2091    MemoryRegionSection mrs;
2092    MemoryListener *listener;
2093    AddressSpace *as;
2094    FlatView *view;
2095    FlatRange *fr;
2096    hwaddr sec_start, sec_end, sec_size;
2097
2098    QTAILQ_FOREACH(listener, &memory_listeners, link) {
2099        if (!listener->log_clear) {
2100            continue;
2101        }
2102        as = listener->address_space;
2103        view = address_space_get_flatview(as);
2104        FOR_EACH_FLAT_RANGE(fr, view) {
2105            if (!fr->dirty_log_mask || fr->mr != mr) {
2106                /*
2107                 * Clear dirty bitmap operation only applies to those
2108                 * regions whose dirty logging is at least enabled
2109                 */
2110                continue;
2111            }
2112
2113            mrs = section_from_flat_range(fr, view);
2114
2115            sec_start = MAX(mrs.offset_within_region, start);
2116            sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2117            sec_end = MIN(sec_end, start + len);
2118
2119            if (sec_start >= sec_end) {
2120                /*
2121                 * If this memory region section has no intersection
2122                 * with the requested range, skip.
2123                 */
2124                continue;
2125            }
2126
2127            /* Valid case; shrink the section if needed */
2128            mrs.offset_within_address_space +=
2129                sec_start - mrs.offset_within_region;
2130            mrs.offset_within_region = sec_start;
2131            sec_size = sec_end - sec_start;
2132            mrs.size = int128_make64(sec_size);
2133            listener->log_clear(listener, &mrs);
2134        }
2135        flatview_unref(view);
2136    }
2137}
2138
2139DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2140                                                            hwaddr addr,
2141                                                            hwaddr size,
2142                                                            unsigned client)
2143{
2144    DirtyBitmapSnapshot *snapshot;
2145    assert(mr->ram_block);
2146    memory_region_sync_dirty_bitmap(mr);
2147    snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2148    memory_global_after_dirty_log_sync();
2149    return snapshot;
2150}
2151
2152bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2153                                      hwaddr addr, hwaddr size)
2154{
2155    assert(mr->ram_block);
2156    return cpu_physical_memory_snapshot_get_dirty(snap,
2157                memory_region_get_ram_addr(mr) + addr, size);
2158}
2159
2160void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2161{
2162    if (mr->readonly != readonly) {
2163        memory_region_transaction_begin();
2164        mr->readonly = readonly;
2165        memory_region_update_pending |= mr->enabled;
2166        memory_region_transaction_commit();
2167    }
2168}
2169
2170void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2171{
2172    if (mr->nonvolatile != nonvolatile) {
2173        memory_region_transaction_begin();
2174        mr->nonvolatile = nonvolatile;
2175        memory_region_update_pending |= mr->enabled;
2176        memory_region_transaction_commit();
2177    }
2178}
2179
2180void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2181{
2182    if (mr->romd_mode != romd_mode) {
2183        memory_region_transaction_begin();
2184        mr->romd_mode = romd_mode;
2185        memory_region_update_pending |= mr->enabled;
2186        memory_region_transaction_commit();
2187    }
2188}
2189
2190void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2191                               hwaddr size, unsigned client)
2192{
2193    assert(mr->ram_block);
2194    cpu_physical_memory_test_and_clear_dirty(
2195        memory_region_get_ram_addr(mr) + addr, size, client);
2196}
2197
2198int memory_region_get_fd(MemoryRegion *mr)
2199{
2200    int fd;
2201
2202    RCU_READ_LOCK_GUARD();
2203    while (mr->alias) {
2204        mr = mr->alias;
2205    }
2206    fd = mr->ram_block->fd;
2207
2208    return fd;
2209}
2210
2211void *memory_region_get_ram_ptr(MemoryRegion *mr)
2212{
2213    void *ptr;
2214    uint64_t offset = 0;
2215
2216    RCU_READ_LOCK_GUARD();
2217    while (mr->alias) {
2218        offset += mr->alias_offset;
2219        mr = mr->alias;
2220    }
2221    assert(mr->ram_block);
2222    ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2223
2224    return ptr;
2225}
2226
2227MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2228{
2229    RAMBlock *block;
2230
2231    block = qemu_ram_block_from_host(ptr, false, offset);
2232    if (!block) {
2233        return NULL;
2234    }
2235
2236    return block->mr;
2237}
2238
2239ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2240{
2241    return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2242}
2243
2244void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2245{
2246    assert(mr->ram_block);
2247
2248    qemu_ram_resize(mr->ram_block, newsize, errp);
2249}
2250
2251void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2252{
2253    if (mr->ram_block) {
2254        qemu_ram_msync(mr->ram_block, addr, size);
2255    }
2256}
2257
2258void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2259{
2260    /*
2261     * Might be extended case needed to cover
2262     * different types of memory regions
2263     */
2264    if (mr->dirty_log_mask) {
2265        memory_region_msync(mr, addr, size);
2266    }
2267}
2268
2269/*
2270 * Call proper memory listeners about the change on the newly
2271 * added/removed CoalescedMemoryRange.
2272 */
2273static void memory_region_update_coalesced_range(MemoryRegion *mr,
2274                                                 CoalescedMemoryRange *cmr,
2275                                                 bool add)
2276{
2277    AddressSpace *as;
2278    FlatView *view;
2279    FlatRange *fr;
2280
2281    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2282        view = address_space_get_flatview(as);
2283        FOR_EACH_FLAT_RANGE(fr, view) {
2284            if (fr->mr == mr) {
2285                flat_range_coalesced_io_notify(fr, as, cmr, add);
2286            }
2287        }
2288        flatview_unref(view);
2289    }
2290}
2291
2292void memory_region_set_coalescing(MemoryRegion *mr)
2293{
2294    memory_region_clear_coalescing(mr);
2295    memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2296}
2297
2298void memory_region_add_coalescing(MemoryRegion *mr,
2299                                  hwaddr offset,
2300                                  uint64_t size)
2301{
2302    CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2303
2304    cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2305    QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2306    memory_region_update_coalesced_range(mr, cmr, true);
2307    memory_region_set_flush_coalesced(mr);
2308}
2309
2310void memory_region_clear_coalescing(MemoryRegion *mr)
2311{
2312    CoalescedMemoryRange *cmr;
2313
2314    if (QTAILQ_EMPTY(&mr->coalesced)) {
2315        return;
2316    }
2317
2318    qemu_flush_coalesced_mmio_buffer();
2319    mr->flush_coalesced_mmio = false;
2320
2321    while (!QTAILQ_EMPTY(&mr->coalesced)) {
2322        cmr = QTAILQ_FIRST(&mr->coalesced);
2323        QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2324        memory_region_update_coalesced_range(mr, cmr, false);
2325        g_free(cmr);
2326    }
2327}
2328
2329void memory_region_set_flush_coalesced(MemoryRegion *mr)
2330{
2331    mr->flush_coalesced_mmio = true;
2332}
2333
2334void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2335{
2336    qemu_flush_coalesced_mmio_buffer();
2337    if (QTAILQ_EMPTY(&mr->coalesced)) {
2338        mr->flush_coalesced_mmio = false;
2339    }
2340}
2341
2342static bool userspace_eventfd_warning;
2343
2344void memory_region_add_eventfd(MemoryRegion *mr,
2345                               hwaddr addr,
2346                               unsigned size,
2347                               bool match_data,
2348                               uint64_t data,
2349                               EventNotifier *e)
2350{
2351    MemoryRegionIoeventfd mrfd = {
2352        .addr.start = int128_make64(addr),
2353        .addr.size = int128_make64(size),
2354        .match_data = match_data,
2355        .data = data,
2356        .e = e,
2357    };
2358    unsigned i;
2359
2360    if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2361                            userspace_eventfd_warning))) {
2362        userspace_eventfd_warning = true;
2363        error_report("Using eventfd without MMIO binding in KVM. "
2364                     "Suboptimal performance expected");
2365    }
2366
2367    if (size) {
2368        adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2369    }
2370    memory_region_transaction_begin();
2371    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2372        if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2373            break;
2374        }
2375    }
2376    ++mr->ioeventfd_nb;
2377    mr->ioeventfds = g_realloc(mr->ioeventfds,
2378                                  sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2379    memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2380            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2381    mr->ioeventfds[i] = mrfd;
2382    ioeventfd_update_pending |= mr->enabled;
2383    memory_region_transaction_commit();
2384}
2385
2386void memory_region_del_eventfd(MemoryRegion *mr,
2387                               hwaddr addr,
2388                               unsigned size,
2389                               bool match_data,
2390                               uint64_t data,
2391                               EventNotifier *e)
2392{
2393    MemoryRegionIoeventfd mrfd = {
2394        .addr.start = int128_make64(addr),
2395        .addr.size = int128_make64(size),
2396        .match_data = match_data,
2397        .data = data,
2398        .e = e,
2399    };
2400    unsigned i;
2401
2402    if (size) {
2403        adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2404    }
2405    memory_region_transaction_begin();
2406    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2407        if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2408            break;
2409        }
2410    }
2411    assert(i != mr->ioeventfd_nb);
2412    memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2413            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2414    --mr->ioeventfd_nb;
2415    mr->ioeventfds = g_realloc(mr->ioeventfds,
2416                                  sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2417    ioeventfd_update_pending |= mr->enabled;
2418    memory_region_transaction_commit();
2419}
2420
2421static void memory_region_update_container_subregions(MemoryRegion *subregion)
2422{
2423    MemoryRegion *mr = subregion->container;
2424    MemoryRegion *other;
2425
2426    memory_region_transaction_begin();
2427
2428    memory_region_ref(subregion);
2429    QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2430        if (subregion->priority >= other->priority) {
2431            QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2432            goto done;
2433        }
2434    }
2435    QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2436done:
2437    memory_region_update_pending |= mr->enabled && subregion->enabled;
2438    memory_region_transaction_commit();
2439}
2440
2441static void memory_region_add_subregion_common(MemoryRegion *mr,
2442                                               hwaddr offset,
2443                                               MemoryRegion *subregion)
2444{
2445    assert(!subregion->container);
2446    subregion->container = mr;
2447    subregion->addr = offset;
2448    memory_region_update_container_subregions(subregion);
2449}
2450
2451void memory_region_add_subregion(MemoryRegion *mr,
2452                                 hwaddr offset,
2453                                 MemoryRegion *subregion)
2454{
2455    subregion->priority = 0;
2456    memory_region_add_subregion_common(mr, offset, subregion);
2457}
2458
2459void memory_region_add_subregion_overlap(MemoryRegion *mr,
2460                                         hwaddr offset,
2461                                         MemoryRegion *subregion,
2462                                         int priority)
2463{
2464    subregion->priority = priority;
2465    memory_region_add_subregion_common(mr, offset, subregion);
2466}
2467
2468void memory_region_del_subregion(MemoryRegion *mr,
2469                                 MemoryRegion *subregion)
2470{
2471    memory_region_transaction_begin();
2472    assert(subregion->container == mr);
2473    subregion->container = NULL;
2474    QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2475    memory_region_unref(subregion);
2476    memory_region_update_pending |= mr->enabled && subregion->enabled;
2477    memory_region_transaction_commit();
2478}
2479
2480void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2481{
2482    if (enabled == mr->enabled) {
2483        return;
2484    }
2485    memory_region_transaction_begin();
2486    mr->enabled = enabled;
2487    memory_region_update_pending = true;
2488    memory_region_transaction_commit();
2489}
2490
2491void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2492{
2493    Int128 s = int128_make64(size);
2494
2495    if (size == UINT64_MAX) {
2496        s = int128_2_64();
2497    }
2498    if (int128_eq(s, mr->size)) {
2499        return;
2500    }
2501    memory_region_transaction_begin();
2502    mr->size = s;
2503    memory_region_update_pending = true;
2504    memory_region_transaction_commit();
2505}
2506
2507static void memory_region_readd_subregion(MemoryRegion *mr)
2508{
2509    MemoryRegion *container = mr->container;
2510
2511    if (container) {
2512        memory_region_transaction_begin();
2513        memory_region_ref(mr);
2514        memory_region_del_subregion(container, mr);
2515        mr->container = container;
2516        memory_region_update_container_subregions(mr);
2517        memory_region_unref(mr);
2518        memory_region_transaction_commit();
2519    }
2520}
2521
2522void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2523{
2524    if (addr != mr->addr) {
2525        mr->addr = addr;
2526        memory_region_readd_subregion(mr);
2527    }
2528}
2529
2530void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2531{
2532    assert(mr->alias);
2533
2534    if (offset == mr->alias_offset) {
2535        return;
2536    }
2537
2538    memory_region_transaction_begin();
2539    mr->alias_offset = offset;
2540    memory_region_update_pending |= mr->enabled;
2541    memory_region_transaction_commit();
2542}
2543
2544uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2545{
2546    return mr->align;
2547}
2548
2549static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2550{
2551    const AddrRange *addr = addr_;
2552    const FlatRange *fr = fr_;
2553
2554    if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2555        return -1;
2556    } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2557        return 1;
2558    }
2559    return 0;
2560}
2561
2562static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2563{
2564    return bsearch(&addr, view->ranges, view->nr,
2565                   sizeof(FlatRange), cmp_flatrange_addr);
2566}
2567
2568bool memory_region_is_mapped(MemoryRegion *mr)
2569{
2570    return mr->container ? true : false;
2571}
2572
2573/* Same as memory_region_find, but it does not add a reference to the
2574 * returned region.  It must be called from an RCU critical section.
2575 */
2576static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2577                                                  hwaddr addr, uint64_t size)
2578{
2579    MemoryRegionSection ret = { .mr = NULL };
2580    MemoryRegion *root;
2581    AddressSpace *as;
2582    AddrRange range;
2583    FlatView *view;
2584    FlatRange *fr;
2585
2586    addr += mr->addr;
2587    for (root = mr; root->container; ) {
2588        root = root->container;
2589        addr += root->addr;
2590    }
2591
2592    as = memory_region_to_address_space(root);
2593    if (!as) {
2594        return ret;
2595    }
2596    range = addrrange_make(int128_make64(addr), int128_make64(size));
2597
2598    view = address_space_to_flatview(as);
2599    fr = flatview_lookup(view, range);
2600    if (!fr) {
2601        return ret;
2602    }
2603
2604    while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2605        --fr;
2606    }
2607
2608    ret.mr = fr->mr;
2609    ret.fv = view;
2610    range = addrrange_intersection(range, fr->addr);
2611    ret.offset_within_region = fr->offset_in_region;
2612    ret.offset_within_region += int128_get64(int128_sub(range.start,
2613                                                        fr->addr.start));
2614    ret.size = range.size;
2615    ret.offset_within_address_space = int128_get64(range.start);
2616    ret.readonly = fr->readonly;
2617    ret.nonvolatile = fr->nonvolatile;
2618    return ret;
2619}
2620
2621MemoryRegionSection memory_region_find(MemoryRegion *mr,
2622                                       hwaddr addr, uint64_t size)
2623{
2624    MemoryRegionSection ret;
2625    RCU_READ_LOCK_GUARD();
2626    ret = memory_region_find_rcu(mr, addr, size);
2627    if (ret.mr) {
2628        memory_region_ref(ret.mr);
2629    }
2630    return ret;
2631}
2632
2633bool memory_region_present(MemoryRegion *container, hwaddr addr)
2634{
2635    MemoryRegion *mr;
2636
2637    RCU_READ_LOCK_GUARD();
2638    mr = memory_region_find_rcu(container, addr, 1).mr;
2639    return mr && mr != container;
2640}
2641
2642void memory_global_dirty_log_sync(void)
2643{
2644    memory_region_sync_dirty_bitmap(NULL);
2645}
2646
2647void memory_global_after_dirty_log_sync(void)
2648{
2649    MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2650}
2651
2652static VMChangeStateEntry *vmstate_change;
2653
2654void memory_global_dirty_log_start(void)
2655{
2656    if (vmstate_change) {
2657        qemu_del_vm_change_state_handler(vmstate_change);
2658        vmstate_change = NULL;
2659    }
2660
2661    global_dirty_log = true;
2662
2663    MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2664
2665    /* Refresh DIRTY_MEMORY_MIGRATION bit.  */
2666    memory_region_transaction_begin();
2667    memory_region_update_pending = true;
2668    memory_region_transaction_commit();
2669}
2670
2671static void memory_global_dirty_log_do_stop(void)
2672{
2673    global_dirty_log = false;
2674
2675    /* Refresh DIRTY_MEMORY_MIGRATION bit.  */
2676    memory_region_transaction_begin();
2677    memory_region_update_pending = true;
2678    memory_region_transaction_commit();
2679
2680    MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2681}
2682
2683static void memory_vm_change_state_handler(void *opaque, bool running,
2684                                           RunState state)
2685{
2686    if (running) {
2687        memory_global_dirty_log_do_stop();
2688
2689        if (vmstate_change) {
2690            qemu_del_vm_change_state_handler(vmstate_change);
2691            vmstate_change = NULL;
2692        }
2693    }
2694}
2695
2696void memory_global_dirty_log_stop(void)
2697{
2698    if (!runstate_is_running()) {
2699        if (vmstate_change) {
2700            return;
2701        }
2702        vmstate_change = qemu_add_vm_change_state_handler(
2703                                memory_vm_change_state_handler, NULL);
2704        return;
2705    }
2706
2707    memory_global_dirty_log_do_stop();
2708}
2709
2710static void listener_add_address_space(MemoryListener *listener,
2711                                       AddressSpace *as)
2712{
2713    FlatView *view;
2714    FlatRange *fr;
2715
2716    if (listener->begin) {
2717        listener->begin(listener);
2718    }
2719    if (global_dirty_log) {
2720        if (listener->log_global_start) {
2721            listener->log_global_start(listener);
2722        }
2723    }
2724
2725    view = address_space_get_flatview(as);
2726    FOR_EACH_FLAT_RANGE(fr, view) {
2727        MemoryRegionSection section = section_from_flat_range(fr, view);
2728
2729        if (listener->region_add) {
2730            listener->region_add(listener, &section);
2731        }
2732        if (fr->dirty_log_mask && listener->log_start) {
2733            listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2734        }
2735    }
2736    if (listener->commit) {
2737        listener->commit(listener);
2738    }
2739    flatview_unref(view);
2740}
2741
2742static void listener_del_address_space(MemoryListener *listener,
2743                                       AddressSpace *as)
2744{
2745    FlatView *view;
2746    FlatRange *fr;
2747
2748    if (listener->begin) {
2749        listener->begin(listener);
2750    }
2751    view = address_space_get_flatview(as);
2752    FOR_EACH_FLAT_RANGE(fr, view) {
2753        MemoryRegionSection section = section_from_flat_range(fr, view);
2754
2755        if (fr->dirty_log_mask && listener->log_stop) {
2756            listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2757        }
2758        if (listener->region_del) {
2759            listener->region_del(listener, &section);
2760        }
2761    }
2762    if (listener->commit) {
2763        listener->commit(listener);
2764    }
2765    flatview_unref(view);
2766}
2767
2768void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2769{
2770    MemoryListener *other = NULL;
2771
2772    listener->address_space = as;
2773    if (QTAILQ_EMPTY(&memory_listeners)
2774        || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2775        QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2776    } else {
2777        QTAILQ_FOREACH(other, &memory_listeners, link) {
2778            if (listener->priority < other->priority) {
2779                break;
2780            }
2781        }
2782        QTAILQ_INSERT_BEFORE(other, listener, link);
2783    }
2784
2785    if (QTAILQ_EMPTY(&as->listeners)
2786        || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2787        QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2788    } else {
2789        QTAILQ_FOREACH(other, &as->listeners, link_as) {
2790            if (listener->priority < other->priority) {
2791                break;
2792            }
2793        }
2794        QTAILQ_INSERT_BEFORE(other, listener, link_as);
2795    }
2796
2797    listener_add_address_space(listener, as);
2798}
2799
2800void memory_listener_unregister(MemoryListener *listener)
2801{
2802    if (!listener->address_space) {
2803        return;
2804    }
2805
2806    listener_del_address_space(listener, listener->address_space);
2807    QTAILQ_REMOVE(&memory_listeners, listener, link);
2808    QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2809    listener->address_space = NULL;
2810}
2811
2812void address_space_remove_listeners(AddressSpace *as)
2813{
2814    while (!QTAILQ_EMPTY(&as->listeners)) {
2815        memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2816    }
2817}
2818
2819void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2820{
2821    memory_region_ref(root);
2822    as->root = root;
2823    as->current_map = NULL;
2824    as->ioeventfd_nb = 0;
2825    as->ioeventfds = NULL;
2826    QTAILQ_INIT(&as->listeners);
2827    QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2828    as->name = g_strdup(name ? name : "anonymous");
2829    address_space_update_topology(as);
2830    address_space_update_ioeventfds(as);
2831}
2832
2833static void do_address_space_destroy(AddressSpace *as)
2834{
2835    assert(QTAILQ_EMPTY(&as->listeners));
2836
2837    flatview_unref(as->current_map);
2838    g_free(as->name);
2839    g_free(as->ioeventfds);
2840    memory_region_unref(as->root);
2841}
2842
2843void address_space_destroy(AddressSpace *as)
2844{
2845    MemoryRegion *root = as->root;
2846
2847    /* Flush out anything from MemoryListeners listening in on this */
2848    memory_region_transaction_begin();
2849    as->root = NULL;
2850    memory_region_transaction_commit();
2851    QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2852
2853    /* At this point, as->dispatch and as->current_map are dummy
2854     * entries that the guest should never use.  Wait for the old
2855     * values to expire before freeing the data.
2856     */
2857    as->root = root;
2858    call_rcu(as, do_address_space_destroy, rcu);
2859}
2860
2861static const char *memory_region_type(MemoryRegion *mr)
2862{
2863    if (mr->alias) {
2864        return memory_region_type(mr->alias);
2865    }
2866    if (memory_region_is_ram_device(mr)) {
2867        return "ramd";
2868    } else if (memory_region_is_romd(mr)) {
2869        return "romd";
2870    } else if (memory_region_is_rom(mr)) {
2871        return "rom";
2872    } else if (memory_region_is_ram(mr)) {
2873        return "ram";
2874    } else {
2875        return "i/o";
2876    }
2877}
2878
2879typedef struct MemoryRegionList MemoryRegionList;
2880
2881struct MemoryRegionList {
2882    const MemoryRegion *mr;
2883    QTAILQ_ENTRY(MemoryRegionList) mrqueue;
2884};
2885
2886typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
2887
2888#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
2889                           int128_sub((size), int128_one())) : 0)
2890#define MTREE_INDENT "  "
2891
2892static void mtree_expand_owner(const char *label, Object *obj)
2893{
2894    DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
2895
2896    qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
2897    if (dev && dev->id) {
2898        qemu_printf(" id=%s", dev->id);
2899    } else {
2900        char *canonical_path = object_get_canonical_path(obj);
2901        if (canonical_path) {
2902            qemu_printf(" path=%s", canonical_path);
2903            g_free(canonical_path);
2904        } else {
2905            qemu_printf(" type=%s", object_get_typename(obj));
2906        }
2907    }
2908    qemu_printf("}");
2909}
2910
2911static void mtree_print_mr_owner(const MemoryRegion *mr)
2912{
2913    Object *owner = mr->owner;
2914    Object *parent = memory_region_owner((MemoryRegion *)mr);
2915
2916    if (!owner && !parent) {
2917        qemu_printf(" orphan");
2918        return;
2919    }
2920    if (owner) {
2921        mtree_expand_owner("owner", owner);
2922    }
2923    if (parent && parent != owner) {
2924        mtree_expand_owner("parent", parent);
2925    }
2926}
2927
2928static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
2929                           hwaddr base,
2930                           MemoryRegionListHead *alias_print_queue,
2931                           bool owner, bool display_disabled)
2932{
2933    MemoryRegionList *new_ml, *ml, *next_ml;
2934    MemoryRegionListHead submr_print_queue;
2935    const MemoryRegion *submr;
2936    unsigned int i;
2937    hwaddr cur_start, cur_end;
2938
2939    if (!mr) {
2940        return;
2941    }
2942
2943    cur_start = base + mr->addr;
2944    cur_end = cur_start + MR_SIZE(mr->size);
2945
2946    /*
2947     * Try to detect overflow of memory region. This should never
2948     * happen normally. When it happens, we dump something to warn the
2949     * user who is observing this.
2950     */
2951    if (cur_start < base || cur_end < cur_start) {
2952        qemu_printf("[DETECTED OVERFLOW!] ");
2953    }
2954
2955    if (mr->alias) {
2956        MemoryRegionList *ml;
2957        bool found = false;
2958
2959        /* check if the alias is already in the queue */
2960        QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
2961            if (ml->mr == mr->alias) {
2962                found = true;
2963            }
2964        }
2965
2966        if (!found) {
2967            ml = g_new(MemoryRegionList, 1);
2968            ml->mr = mr->alias;
2969            QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
2970        }
2971        if (mr->enabled || display_disabled) {
2972            for (i = 0; i < level; i++) {
2973                qemu_printf(MTREE_INDENT);
2974            }
2975            qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2976                        " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
2977                        "-" TARGET_FMT_plx "%s",
2978                        cur_start, cur_end,
2979                        mr->priority,
2980                        mr->nonvolatile ? "nv-" : "",
2981                        memory_region_type((MemoryRegion *)mr),
2982                        memory_region_name(mr),
2983                        memory_region_name(mr->alias),
2984                        mr->alias_offset,
2985                        mr->alias_offset + MR_SIZE(mr->size),
2986                        mr->enabled ? "" : " [disabled]");
2987            if (owner) {
2988                mtree_print_mr_owner(mr);
2989            }
2990            qemu_printf("\n");
2991        }
2992    } else {
2993        if (mr->enabled || display_disabled) {
2994            for (i = 0; i < level; i++) {
2995                qemu_printf(MTREE_INDENT);
2996            }
2997            qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
2998                        " (prio %d, %s%s): %s%s",
2999                        cur_start, cur_end,
3000                        mr->priority,
3001                        mr->nonvolatile ? "nv-" : "",
3002                        memory_region_type((MemoryRegion *)mr),
3003                        memory_region_name(mr),
3004                        mr->enabled ? "" : " [disabled]");
3005            if (owner) {
3006                mtree_print_mr_owner(mr);
3007            }
3008            qemu_printf("\n");
3009        }
3010    }
3011
3012    QTAILQ_INIT(&submr_print_queue);
3013
3014    QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3015        new_ml = g_new(MemoryRegionList, 1);
3016        new_ml->mr = submr;
3017        QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3018            if (new_ml->mr->addr < ml->mr->addr ||
3019                (new_ml->mr->addr == ml->mr->addr &&
3020                 new_ml->mr->priority > ml->mr->priority)) {
3021                QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3022                new_ml = NULL;
3023                break;
3024            }
3025        }
3026        if (new_ml) {
3027            QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3028        }
3029    }
3030
3031    QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3032        mtree_print_mr(ml->mr, level + 1, cur_start,
3033                       alias_print_queue, owner, display_disabled);
3034    }
3035
3036    QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3037        g_free(ml);
3038    }
3039}
3040
3041struct FlatViewInfo {
3042    int counter;
3043    bool dispatch_tree;
3044    bool owner;
3045    AccelClass *ac;
3046};
3047
3048static void mtree_print_flatview(gpointer key, gpointer value,
3049                                 gpointer user_data)
3050{
3051    FlatView *view = key;
3052    GArray *fv_address_spaces = value;
3053    struct FlatViewInfo *fvi = user_data;
3054    FlatRange *range = &view->ranges[0];
3055    MemoryRegion *mr;
3056    int n = view->nr;
3057    int i;
3058    AddressSpace *as;
3059
3060    qemu_printf("FlatView #%d\n", fvi->counter);
3061    ++fvi->counter;
3062
3063    for (i = 0; i < fv_address_spaces->len; ++i) {
3064        as = g_array_index(fv_address_spaces, AddressSpace*, i);
3065        qemu_printf(" AS \"%s\", root: %s",
3066                    as->name, memory_region_name(as->root));
3067        if (as->root->alias) {
3068            qemu_printf(", alias %s", memory_region_name(as->root->alias));
3069        }
3070        qemu_printf("\n");
3071    }
3072
3073    qemu_printf(" Root memory region: %s\n",
3074      view->root ? memory_region_name(view->root) : "(none)");
3075
3076    if (n <= 0) {
3077        qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3078        return;
3079    }
3080
3081    while (n--) {
3082        mr = range->mr;
3083        if (range->offset_in_region) {
3084            qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3085                        " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3086                        int128_get64(range->addr.start),
3087                        int128_get64(range->addr.start)
3088                        + MR_SIZE(range->addr.size),
3089                        mr->priority,
3090                        range->nonvolatile ? "nv-" : "",
3091                        range->readonly ? "rom" : memory_region_type(mr),
3092                        memory_region_name(mr),
3093                        range->offset_in_region);
3094        } else {
3095            qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3096                        " (prio %d, %s%s): %s",
3097                        int128_get64(range->addr.start),
3098                        int128_get64(range->addr.start)
3099                        + MR_SIZE(range->addr.size),
3100                        mr->priority,
3101                        range->nonvolatile ? "nv-" : "",
3102                        range->readonly ? "rom" : memory_region_type(mr),
3103                        memory_region_name(mr));
3104        }
3105        if (fvi->owner) {
3106            mtree_print_mr_owner(mr);
3107        }
3108
3109        if (fvi->ac) {
3110            for (i = 0; i < fv_address_spaces->len; ++i) {
3111                as = g_array_index(fv_address_spaces, AddressSpace*, i);
3112                if (fvi->ac->has_memory(current_machine, as,
3113                                        int128_get64(range->addr.start),
3114                                        MR_SIZE(range->addr.size) + 1)) {
3115                    qemu_printf(" %s", fvi->ac->name);
3116                }
3117            }
3118        }
3119        qemu_printf("\n");
3120        range++;
3121    }
3122
3123#if !defined(CONFIG_USER_ONLY)
3124    if (fvi->dispatch_tree && view->root) {
3125        mtree_print_dispatch(view->dispatch, view->root);
3126    }
3127#endif
3128
3129    qemu_printf("\n");
3130}
3131
3132static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3133                                      gpointer user_data)
3134{
3135    FlatView *view = key;
3136    GArray *fv_address_spaces = value;
3137
3138    g_array_unref(fv_address_spaces);
3139    flatview_unref(view);
3140
3141    return true;
3142}
3143
3144void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3145{
3146    MemoryRegionListHead ml_head;
3147    MemoryRegionList *ml, *ml2;
3148    AddressSpace *as;
3149
3150    if (flatview) {
3151        FlatView *view;
3152        struct FlatViewInfo fvi = {
3153            .counter = 0,
3154            .dispatch_tree = dispatch_tree,
3155            .owner = owner,
3156        };
3157        GArray *fv_address_spaces;
3158        GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3159        AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3160
3161        if (ac->has_memory) {
3162            fvi.ac = ac;
3163        }
3164
3165        /* Gather all FVs in one table */
3166        QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3167            view = address_space_get_flatview(as);
3168
3169            fv_address_spaces = g_hash_table_lookup(views, view);
3170            if (!fv_address_spaces) {
3171                fv_address_spaces = g_array_new(false, false, sizeof(as));
3172                g_hash_table_insert(views, view, fv_address_spaces);
3173            }
3174
3175            g_array_append_val(fv_address_spaces, as);
3176        }
3177
3178        /* Print */
3179        g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3180
3181        /* Free */
3182        g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3183        g_hash_table_unref(views);
3184
3185        return;
3186    }
3187
3188    QTAILQ_INIT(&ml_head);
3189
3190    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3191        qemu_printf("address-space: %s\n", as->name);
3192        mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled);
3193        qemu_printf("\n");
3194    }
3195
3196    /* print aliased regions */
3197    QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3198        qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3199        mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3200        qemu_printf("\n");
3201    }
3202
3203    QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3204        g_free(ml);
3205    }
3206}
3207
3208void memory_region_init_ram(MemoryRegion *mr,
3209                            Object *owner,
3210                            const char *name,
3211                            uint64_t size,
3212                            Error **errp)
3213{
3214    DeviceState *owner_dev;
3215    Error *err = NULL;
3216
3217    memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3218    if (err) {
3219        error_propagate(errp, err);
3220        return;
3221    }
3222    /* This will assert if owner is neither NULL nor a DeviceState.
3223     * We only want the owner here for the purposes of defining a
3224     * unique name for migration. TODO: Ideally we should implement
3225     * a naming scheme for Objects which are not DeviceStates, in
3226     * which case we can relax this restriction.
3227     */
3228    owner_dev = DEVICE(owner);
3229    vmstate_register_ram(mr, owner_dev);
3230}
3231
3232void memory_region_init_rom(MemoryRegion *mr,
3233                            Object *owner,
3234                            const char *name,
3235                            uint64_t size,
3236                            Error **errp)
3237{
3238    DeviceState *owner_dev;
3239    Error *err = NULL;
3240
3241    memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3242    if (err) {
3243        error_propagate(errp, err);
3244        return;
3245    }
3246    /* This will assert if owner is neither NULL nor a DeviceState.
3247     * We only want the owner here for the purposes of defining a
3248     * unique name for migration. TODO: Ideally we should implement
3249     * a naming scheme for Objects which are not DeviceStates, in
3250     * which case we can relax this restriction.
3251     */
3252    owner_dev = DEVICE(owner);
3253    vmstate_register_ram(mr, owner_dev);
3254}
3255
3256void memory_region_init_rom_device(MemoryRegion *mr,
3257                                   Object *owner,
3258                                   const MemoryRegionOps *ops,
3259                                   void *opaque,
3260                                   const char *name,
3261                                   uint64_t size,
3262                                   Error **errp)
3263{
3264    DeviceState *owner_dev;
3265    Error *err = NULL;
3266
3267    memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3268                                            name, size, &err);
3269    if (err) {
3270        error_propagate(errp, err);
3271        return;
3272    }
3273    /* This will assert if owner is neither NULL nor a DeviceState.
3274     * We only want the owner here for the purposes of defining a
3275     * unique name for migration. TODO: Ideally we should implement
3276     * a naming scheme for Objects which are not DeviceStates, in
3277     * which case we can relax this restriction.
3278     */
3279    owner_dev = DEVICE(owner);
3280    vmstate_register_ram(mr, owner_dev);
3281}
3282
3283/*
3284 * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for
3285 * the fuzz_dma_read_cb callback
3286 */
3287#ifdef CONFIG_FUZZ
3288void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3289                      size_t len,
3290                      MemoryRegion *mr)
3291{
3292}
3293#endif
3294
3295static const TypeInfo memory_region_info = {
3296    .parent             = TYPE_OBJECT,
3297    .name               = TYPE_MEMORY_REGION,
3298    .class_size         = sizeof(MemoryRegionClass),
3299    .instance_size      = sizeof(MemoryRegion),
3300    .instance_init      = memory_region_initfn,
3301    .instance_finalize  = memory_region_finalize,
3302};
3303
3304static const TypeInfo iommu_memory_region_info = {
3305    .parent             = TYPE_MEMORY_REGION,
3306    .name               = TYPE_IOMMU_MEMORY_REGION,
3307    .class_size         = sizeof(IOMMUMemoryRegionClass),
3308    .instance_size      = sizeof(IOMMUMemoryRegion),
3309    .instance_init      = iommu_memory_region_initfn,
3310    .abstract           = true,
3311};
3312
3313static void memory_register_types(void)
3314{
3315    type_register_static(&memory_region_info);
3316    type_register_static(&iommu_memory_region_info);
3317}
3318
3319type_init(memory_register_types)
3320