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20#ifndef MOXIE_CPU_H
21#define MOXIE_CPU_H
22
23#include "exec/cpu-defs.h"
24#include "qom/object.h"
25
26#define MOXIE_EX_DIV0 0
27#define MOXIE_EX_BAD 1
28#define MOXIE_EX_IRQ 2
29#define MOXIE_EX_SWI 3
30#define MOXIE_EX_MMU_MISS 4
31#define MOXIE_EX_BREAK 16
32
33typedef struct CPUMoxieState {
34
35 uint32_t flags;
36 uint32_t gregs[16];
37 uint32_t sregs[256];
38 uint32_t pc;
39
40
41 uint32_t cc_a;
42 uint32_t cc_b;
43
44 void *irq[8];
45
46
47 struct {} end_reset_fields;
48} CPUMoxieState;
49
50#include "hw/core/cpu.h"
51
52#define TYPE_MOXIE_CPU "moxie-cpu"
53
54OBJECT_DECLARE_TYPE(MoxieCPU, MoxieCPUClass,
55 MOXIE_CPU)
56
57
58
59
60
61
62
63struct MoxieCPUClass {
64
65 CPUClass parent_class;
66
67
68 DeviceRealize parent_realize;
69 DeviceReset parent_reset;
70};
71
72
73
74
75
76
77
78struct MoxieCPU {
79
80 CPUState parent_obj;
81
82
83 CPUNegativeOffsetState neg;
84 CPUMoxieState env;
85};
86
87
88void moxie_cpu_do_interrupt(CPUState *cs);
89void moxie_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
90hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
91void moxie_translate_init(void);
92int cpu_moxie_signal_handler(int host_signum, void *pinfo,
93 void *puc);
94
95#define MOXIE_CPU_TYPE_SUFFIX "-" TYPE_MOXIE_CPU
96#define MOXIE_CPU_TYPE_NAME(model) model MOXIE_CPU_TYPE_SUFFIX
97#define CPU_RESOLVING_TYPE TYPE_MOXIE_CPU
98
99#define cpu_signal_handler cpu_moxie_signal_handler
100
101static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
102{
103 return 0;
104}
105
106typedef CPUMoxieState CPUArchState;
107typedef MoxieCPU ArchCPU;
108
109#include "exec/cpu-all.h"
110
111static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
112 target_ulong *cs_base, uint32_t *flags)
113{
114 *pc = env->pc;
115 *cs_base = 0;
116 *flags = 0;
117}
118
119bool moxie_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
120 MMUAccessType access_type, int mmu_idx,
121 bool probe, uintptr_t retaddr);
122
123#endif
124