qemu/hw/acpi/ich9.c
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   1/*
   2 * ACPI implementation
   3 *
   4 * Copyright (c) 2006 Fabrice Bellard
   5 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   6 *                    VA Linux Systems Japan K.K.
   7 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
   8 *
   9 * This is based on acpi.c.
  10 *
  11 * This library is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU Lesser General Public
  13 * License version 2.1 as published by the Free Software Foundation.
  14 *
  15 * This library is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18 * Lesser General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU Lesser General Public
  21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
  22 *
  23 * Contributions after 2012-01-13 are licensed under the terms of the
  24 * GNU GPL, version 2 or (at your option) any later version.
  25 */
  26
  27#include "qemu/osdep.h"
  28#include "qapi/error.h"
  29#include "qapi/visitor.h"
  30#include "hw/pci/pci.h"
  31#include "migration/vmstate.h"
  32#include "qemu/timer.h"
  33#include "hw/core/cpu.h"
  34#include "sysemu/reset.h"
  35#include "sysemu/runstate.h"
  36#include "hw/acpi/acpi.h"
  37#include "hw/acpi/tco.h"
  38
  39#include "hw/i386/ich9.h"
  40#include "hw/mem/pc-dimm.h"
  41#include "hw/mem/nvdimm.h"
  42
  43//#define DEBUG
  44
  45#ifdef DEBUG
  46#define ICH9_DEBUG(fmt, ...) \
  47do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
  48#else
  49#define ICH9_DEBUG(fmt, ...)    do { } while (0)
  50#endif
  51
  52static void ich9_pm_update_sci_fn(ACPIREGS *regs)
  53{
  54    ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
  55    acpi_update_sci(&pm->acpi_regs, pm->irq);
  56}
  57
  58static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
  59{
  60    ICH9LPCPMRegs *pm = opaque;
  61    return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
  62}
  63
  64static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
  65                            unsigned width)
  66{
  67    ICH9LPCPMRegs *pm = opaque;
  68    acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
  69    acpi_update_sci(&pm->acpi_regs, pm->irq);
  70}
  71
  72static const MemoryRegionOps ich9_gpe_ops = {
  73    .read = ich9_gpe_readb,
  74    .write = ich9_gpe_writeb,
  75    .valid.min_access_size = 1,
  76    .valid.max_access_size = 4,
  77    .impl.min_access_size = 1,
  78    .impl.max_access_size = 1,
  79    .endianness = DEVICE_LITTLE_ENDIAN,
  80};
  81
  82static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
  83{
  84    ICH9LPCPMRegs *pm = opaque;
  85    switch (addr) {
  86    case 0:
  87        return pm->smi_en;
  88    case 4:
  89        return pm->smi_sts;
  90    default:
  91        return 0;
  92    }
  93}
  94
  95static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
  96                            unsigned width)
  97{
  98    ICH9LPCPMRegs *pm = opaque;
  99    TCOIORegs *tr = &pm->tco_regs;
 100    uint64_t tco_en;
 101
 102    switch (addr) {
 103    case 0:
 104        tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
 105        /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
 106        if (tr->tco.cnt1 & TCO_LOCK) {
 107            val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
 108        }
 109        pm->smi_en &= ~pm->smi_en_wmask;
 110        pm->smi_en |= (val & pm->smi_en_wmask);
 111        break;
 112    }
 113}
 114
 115static const MemoryRegionOps ich9_smi_ops = {
 116    .read = ich9_smi_readl,
 117    .write = ich9_smi_writel,
 118    .valid.min_access_size = 4,
 119    .valid.max_access_size = 4,
 120    .endianness = DEVICE_LITTLE_ENDIAN,
 121};
 122
 123void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
 124{
 125    ICH9_DEBUG("to 0x%x\n", pm_io_base);
 126
 127    assert((pm_io_base & ICH9_PMIO_MASK) == 0);
 128
 129    pm->pm_io_base = pm_io_base;
 130    memory_region_transaction_begin();
 131    memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
 132    memory_region_set_address(&pm->io, pm->pm_io_base);
 133    memory_region_transaction_commit();
 134}
 135
 136static int ich9_pm_post_load(void *opaque, int version_id)
 137{
 138    ICH9LPCPMRegs *pm = opaque;
 139    uint32_t pm_io_base = pm->pm_io_base;
 140    pm->pm_io_base = 0;
 141    ich9_pm_iospace_update(pm, pm_io_base);
 142    return 0;
 143}
 144
 145#define VMSTATE_GPE_ARRAY(_field, _state)                            \
 146 {                                                                   \
 147     .name       = (stringify(_field)),                              \
 148     .version_id = 0,                                                \
 149     .num        = ICH9_PMIO_GPE0_LEN,                               \
 150     .info       = &vmstate_info_uint8,                              \
 151     .size       = sizeof(uint8_t),                                  \
 152     .flags      = VMS_ARRAY | VMS_POINTER,                          \
 153     .offset     = vmstate_offset_pointer(_state, _field, uint8_t),  \
 154 }
 155
 156static bool vmstate_test_use_memhp(void *opaque)
 157{
 158    ICH9LPCPMRegs *s = opaque;
 159    return s->acpi_memory_hotplug.is_enabled;
 160}
 161
 162static const VMStateDescription vmstate_memhp_state = {
 163    .name = "ich9_pm/memhp",
 164    .version_id = 1,
 165    .minimum_version_id = 1,
 166    .minimum_version_id_old = 1,
 167    .needed = vmstate_test_use_memhp,
 168    .fields      = (VMStateField[]) {
 169        VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
 170        VMSTATE_END_OF_LIST()
 171    }
 172};
 173
 174static bool vmstate_test_use_tco(void *opaque)
 175{
 176    ICH9LPCPMRegs *s = opaque;
 177    return s->enable_tco;
 178}
 179
 180static const VMStateDescription vmstate_tco_io_state = {
 181    .name = "ich9_pm/tco",
 182    .version_id = 1,
 183    .minimum_version_id = 1,
 184    .minimum_version_id_old = 1,
 185    .needed = vmstate_test_use_tco,
 186    .fields      = (VMStateField[]) {
 187        VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
 188                       TCOIORegs),
 189        VMSTATE_END_OF_LIST()
 190    }
 191};
 192
 193static bool vmstate_test_use_cpuhp(void *opaque)
 194{
 195    ICH9LPCPMRegs *s = opaque;
 196    return !s->cpu_hotplug_legacy;
 197}
 198
 199static int vmstate_cpuhp_pre_load(void *opaque)
 200{
 201    ICH9LPCPMRegs *s = opaque;
 202    Object *obj = OBJECT(s->gpe_cpu.device);
 203    object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
 204    return 0;
 205}
 206
 207static const VMStateDescription vmstate_cpuhp_state = {
 208    .name = "ich9_pm/cpuhp",
 209    .version_id = 1,
 210    .minimum_version_id = 1,
 211    .minimum_version_id_old = 1,
 212    .needed = vmstate_test_use_cpuhp,
 213    .pre_load = vmstate_cpuhp_pre_load,
 214    .fields      = (VMStateField[]) {
 215        VMSTATE_CPU_HOTPLUG(cpuhp_state, ICH9LPCPMRegs),
 216        VMSTATE_END_OF_LIST()
 217    }
 218};
 219
 220static bool vmstate_test_use_pcihp(void *opaque)
 221{
 222    ICH9LPCPMRegs *s = opaque;
 223
 224    return s->use_acpi_hotplug_bridge;
 225}
 226
 227static const VMStateDescription vmstate_pcihp_state = {
 228    .name = "ich9_pm/pcihp",
 229    .version_id = 1,
 230    .minimum_version_id = 1,
 231    .needed = vmstate_test_use_pcihp,
 232    .fields      = (VMStateField[]) {
 233        VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug,
 234                            ICH9LPCPMRegs,
 235                            NULL, NULL),
 236        VMSTATE_END_OF_LIST()
 237    }
 238};
 239
 240const VMStateDescription vmstate_ich9_pm = {
 241    .name = "ich9_pm",
 242    .version_id = 1,
 243    .minimum_version_id = 1,
 244    .post_load = ich9_pm_post_load,
 245    .fields = (VMStateField[]) {
 246        VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
 247        VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
 248        VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
 249        VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
 250        VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
 251        VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
 252        VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
 253        VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
 254        VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
 255        VMSTATE_END_OF_LIST()
 256    },
 257    .subsections = (const VMStateDescription*[]) {
 258        &vmstate_memhp_state,
 259        &vmstate_tco_io_state,
 260        &vmstate_cpuhp_state,
 261        &vmstate_pcihp_state,
 262        NULL
 263    }
 264};
 265
 266static void pm_reset(void *opaque)
 267{
 268    ICH9LPCPMRegs *pm = opaque;
 269    ich9_pm_iospace_update(pm, 0);
 270
 271    acpi_pm1_evt_reset(&pm->acpi_regs);
 272    acpi_pm1_cnt_reset(&pm->acpi_regs);
 273    acpi_pm_tmr_reset(&pm->acpi_regs);
 274    acpi_gpe_reset(&pm->acpi_regs);
 275
 276    pm->smi_en = 0;
 277    if (!pm->smm_enabled) {
 278        /* Mark SMM as already inited to prevent SMM from running. */
 279        pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
 280    }
 281    pm->smi_en_wmask = ~0;
 282
 283    if (pm->use_acpi_hotplug_bridge) {
 284        acpi_pcihp_reset(&pm->acpi_pci_hotplug, true);
 285    }
 286
 287    acpi_update_sci(&pm->acpi_regs, pm->irq);
 288}
 289
 290static void pm_powerdown_req(Notifier *n, void *opaque)
 291{
 292    ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
 293
 294    acpi_pm1_evt_power_down(&pm->acpi_regs);
 295}
 296
 297void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
 298                  bool smm_enabled,
 299                  qemu_irq sci_irq)
 300{
 301    memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
 302    memory_region_set_enabled(&pm->io, false);
 303    memory_region_add_subregion(pci_address_space_io(lpc_pci),
 304                                0, &pm->io);
 305
 306    acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 307    acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
 308    acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
 309                      pm->s4_val, !pm->smm_compat && !smm_enabled);
 310
 311    acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
 312    memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
 313                          "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
 314    memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
 315
 316    memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
 317                          "acpi-smi", 8);
 318    memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
 319
 320    pm->smm_enabled = smm_enabled;
 321
 322    pm->enable_tco = true;
 323    acpi_pm_tco_init(&pm->tco_regs, &pm->io);
 324
 325    if (pm->use_acpi_hotplug_bridge) {
 326        acpi_pcihp_init(OBJECT(lpc_pci),
 327                        &pm->acpi_pci_hotplug,
 328                        pci_get_bus(lpc_pci),
 329                        pci_address_space_io(lpc_pci),
 330                        true,
 331                        ACPI_PCIHP_ADDR_ICH9);
 332
 333        qbus_set_hotplug_handler(BUS(pci_get_bus(lpc_pci)),
 334                                 OBJECT(lpc_pci));
 335    }
 336
 337    pm->irq = sci_irq;
 338    qemu_register_reset(pm_reset, pm);
 339    pm->powerdown_notifier.notify = pm_powerdown_req;
 340    qemu_register_powerdown_notifier(&pm->powerdown_notifier);
 341
 342    legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci),
 343        OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
 344
 345    if (pm->acpi_memory_hotplug.is_enabled) {
 346        acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
 347                                 &pm->acpi_memory_hotplug,
 348                                 ACPI_MEMORY_HOTPLUG_BASE);
 349    }
 350}
 351
 352static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
 353                                 void *opaque, Error **errp)
 354{
 355    ICH9LPCPMRegs *pm = opaque;
 356    uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
 357
 358    visit_type_uint32(v, name, &value, errp);
 359}
 360
 361static bool ich9_pm_get_memory_hotplug_support(Object *obj, Error **errp)
 362{
 363    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 364
 365    return s->pm.acpi_memory_hotplug.is_enabled;
 366}
 367
 368static void ich9_pm_set_memory_hotplug_support(Object *obj, bool value,
 369                                               Error **errp)
 370{
 371    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 372
 373    s->pm.acpi_memory_hotplug.is_enabled = value;
 374}
 375
 376static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp)
 377{
 378    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 379
 380    return s->pm.cpu_hotplug_legacy;
 381}
 382
 383static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
 384                                           Error **errp)
 385{
 386    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 387
 388    assert(!value);
 389    if (s->pm.cpu_hotplug_legacy && value == false) {
 390        acpi_switch_to_modern_cphp(&s->pm.gpe_cpu, &s->pm.cpuhp_state,
 391                                   ICH9_CPU_HOTPLUG_IO_BASE);
 392    }
 393    s->pm.cpu_hotplug_legacy = value;
 394}
 395
 396static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
 397{
 398    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 399    return s->pm.enable_tco;
 400}
 401
 402static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
 403{
 404    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 405    s->pm.enable_tco = value;
 406}
 407
 408static bool ich9_pm_get_acpi_pci_hotplug(Object *obj, Error **errp)
 409{
 410    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 411
 412    return s->pm.use_acpi_hotplug_bridge;
 413}
 414
 415static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp)
 416{
 417    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
 418
 419    s->pm.use_acpi_hotplug_bridge = value;
 420}
 421
 422void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
 423{
 424    static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
 425    pm->acpi_memory_hotplug.is_enabled = true;
 426    pm->cpu_hotplug_legacy = true;
 427    pm->disable_s3 = 0;
 428    pm->disable_s4 = 0;
 429    pm->s4_val = 2;
 430    pm->use_acpi_hotplug_bridge = true;
 431
 432    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
 433                                   &pm->pm_io_base, OBJ_PROP_FLAG_READ);
 434    object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
 435                        ich9_pm_get_gpe0_blk,
 436                        NULL, NULL, pm);
 437    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
 438                                   &gpe0_len, OBJ_PROP_FLAG_READ);
 439    object_property_add_bool(obj, "memory-hotplug-support",
 440                             ich9_pm_get_memory_hotplug_support,
 441                             ich9_pm_set_memory_hotplug_support);
 442    object_property_add_bool(obj, "cpu-hotplug-legacy",
 443                             ich9_pm_get_cpu_hotplug_legacy,
 444                             ich9_pm_set_cpu_hotplug_legacy);
 445    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
 446                                  &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
 447    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
 448                                  &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
 449    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
 450                                  &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
 451    object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
 452                             ich9_pm_get_enable_tco,
 453                             ich9_pm_set_enable_tco);
 454    object_property_add_bool(obj, "acpi-pci-hotplug-with-bridge-support",
 455                             ich9_pm_get_acpi_pci_hotplug,
 456                             ich9_pm_set_acpi_pci_hotplug);
 457}
 458
 459void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 460                                Error **errp)
 461{
 462    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 463
 464    if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 465        acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
 466        return;
 467    }
 468
 469    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) &&
 470        !lpc->pm.acpi_memory_hotplug.is_enabled) {
 471        error_setg(errp,
 472                   "memory hotplug is not enabled: %s.memory-hotplug-support "
 473                   "is not set", object_get_typename(OBJECT(lpc)));
 474    } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 475        uint64_t negotiated = lpc->smi_negotiated_features;
 476
 477        if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
 478            !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT))) {
 479            error_setg(errp, "cpu hotplug with SMI wasn't enabled by firmware");
 480            error_append_hint(errp, "update machine type to newer than 5.1 "
 481                "and firmware that suppors CPU hotplug with SMM");
 482        }
 483    }
 484}
 485
 486void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 487                            Error **errp)
 488{
 489    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 490
 491    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 492        if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
 493            nvdimm_acpi_plug_cb(hotplug_dev, dev);
 494        } else {
 495            acpi_memory_plug_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug,
 496                                dev, errp);
 497        }
 498    } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
 499        if (lpc->pm.cpu_hotplug_legacy) {
 500            legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, errp);
 501        } else {
 502            acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp);
 503        }
 504    } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 505        acpi_pcihp_device_plug_cb(hotplug_dev, &lpc->pm.acpi_pci_hotplug,
 506                                  dev, errp);
 507    } else {
 508        error_setg(errp, "acpi: device plug request for not supported device"
 509                   " type: %s", object_get_typename(OBJECT(dev)));
 510    }
 511}
 512
 513void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
 514                                      DeviceState *dev, Error **errp)
 515{
 516    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 517
 518    if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 519        object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 520        acpi_memory_unplug_request_cb(hotplug_dev,
 521                                      &lpc->pm.acpi_memory_hotplug, dev,
 522                                      errp);
 523    } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 524               !lpc->pm.cpu_hotplug_legacy) {
 525        uint64_t negotiated = lpc->smi_negotiated_features;
 526
 527        if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
 528            !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT))) {
 529            error_setg(errp, "cpu hot-unplug with SMI wasn't enabled "
 530                             "by firmware");
 531            error_append_hint(errp, "update machine type to a version having "
 532                                    "x-smi-cpu-hotunplug=on and firmware that "
 533                                    "supports CPU hot-unplug with SMM");
 534            return;
 535        }
 536
 537        acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
 538                                   dev, errp);
 539    } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 540        acpi_pcihp_device_unplug_request_cb(hotplug_dev,
 541                                            &lpc->pm.acpi_pci_hotplug,
 542                                            dev, errp);
 543    } else {
 544        error_setg(errp, "acpi: device unplug request for not supported device"
 545                   " type: %s", object_get_typename(OBJECT(dev)));
 546    }
 547}
 548
 549void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 550                              Error **errp)
 551{
 552    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
 553
 554    if (lpc->pm.acpi_memory_hotplug.is_enabled &&
 555        object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
 556        acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp);
 557    } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
 558               !lpc->pm.cpu_hotplug_legacy) {
 559        acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp);
 560    } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
 561        acpi_pcihp_device_unplug_cb(hotplug_dev, &lpc->pm.acpi_pci_hotplug,
 562                                    dev, errp);
 563    } else {
 564        error_setg(errp, "acpi: device unplug for not supported device"
 565                   " type: %s", object_get_typename(OBJECT(dev)));
 566    }
 567}
 568
 569void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
 570{
 571    ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
 572
 573    acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
 574    if (!s->pm.cpu_hotplug_legacy) {
 575        acpi_cpu_ospm_status(&s->pm.cpuhp_state, list);
 576    }
 577}
 578