1
2
3
4
5
6
7
8
9
10
11
12#include "qemu/osdep.h"
13#include "qemu/units.h"
14#include "e500.h"
15#include "hw/net/fsl_etsec/etsec.h"
16#include "sysemu/device_tree.h"
17#include "sysemu/kvm.h"
18#include "hw/sysbus.h"
19#include "hw/pci/pci.h"
20#include "hw/ppc/openpic.h"
21#include "kvm_ppc.h"
22
23static void e500plat_fixup_devtree(void *fdt)
24{
25 const char model[] = "QEMU ppce500";
26 const char compatible[] = "fsl,qemu-e500";
27
28 qemu_fdt_setprop(fdt, "/", "model", model, sizeof(model));
29 qemu_fdt_setprop(fdt, "/", "compatible", compatible,
30 sizeof(compatible));
31}
32
33static void e500plat_init(MachineState *machine)
34{
35 PPCE500MachineClass *pmc = PPCE500_MACHINE_GET_CLASS(machine);
36
37
38 if (kvm_enabled() && !kvmppc_has_cap_epr()) {
39 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_20;
40 }
41
42 ppce500_init(machine);
43}
44
45static void e500plat_machine_device_plug_cb(HotplugHandler *hotplug_dev,
46 DeviceState *dev, Error **errp)
47{
48 PPCE500MachineState *pms = PPCE500_MACHINE(hotplug_dev);
49
50 if (pms->pbus_dev) {
51 MachineClass *mc = MACHINE_GET_CLASS(pms);
52
53 if (device_is_dynamic_sysbus(mc, dev)) {
54 platform_bus_link_device(pms->pbus_dev, SYS_BUS_DEVICE(dev));
55 }
56 }
57}
58
59static
60HotplugHandler *e500plat_machine_get_hotpug_handler(MachineState *machine,
61 DeviceState *dev)
62{
63 MachineClass *mc = MACHINE_GET_CLASS(machine);
64
65 if (device_is_dynamic_sysbus(mc, dev)) {
66 return HOTPLUG_HANDLER(machine);
67 }
68
69 return NULL;
70}
71
72#define TYPE_E500PLAT_MACHINE MACHINE_TYPE_NAME("ppce500")
73
74static void e500plat_machine_class_init(ObjectClass *oc, void *data)
75{
76 PPCE500MachineClass *pmc = PPCE500_MACHINE_CLASS(oc);
77 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
78 MachineClass *mc = MACHINE_CLASS(oc);
79
80 assert(!mc->get_hotplug_handler);
81 mc->get_hotplug_handler = e500plat_machine_get_hotpug_handler;
82 hc->plug = e500plat_machine_device_plug_cb;
83
84 pmc->pci_first_slot = 0x1;
85 pmc->pci_nr_slots = PCI_SLOT_MAX - 1;
86 pmc->fixup_devtree = e500plat_fixup_devtree;
87 pmc->mpic_version = OPENPIC_MODEL_FSL_MPIC_42;
88 pmc->has_mpc8xxx_gpio = true;
89 pmc->has_platform_bus = true;
90 pmc->platform_bus_base = 0xf00000000ULL;
91 pmc->platform_bus_size = 128 * MiB;
92 pmc->platform_bus_first_irq = 5;
93 pmc->platform_bus_num_irqs = 10;
94 pmc->ccsrbar_base = 0xFE0000000ULL;
95 pmc->pci_pio_base = 0xFE1000000ULL;
96 pmc->pci_mmio_base = 0xC00000000ULL;
97 pmc->pci_mmio_bus_base = 0xE0000000ULL;
98 pmc->spin_base = 0xFEF000000ULL;
99
100 mc->desc = "generic paravirt e500 platform";
101 mc->init = e500plat_init;
102 mc->max_cpus = 32;
103 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("e500v2_v30");
104 mc->default_ram_id = "mpc8544ds.ram";
105 machine_class_allow_dynamic_sysbus_dev(mc, TYPE_ETSEC_COMMON);
106 }
107
108static const TypeInfo e500plat_info = {
109 .name = TYPE_E500PLAT_MACHINE,
110 .parent = TYPE_PPCE500_MACHINE,
111 .class_init = e500plat_machine_class_init,
112 .interfaces = (InterfaceInfo[]) {
113 { TYPE_HOTPLUG_HANDLER },
114 { }
115 }
116};
117
118static void e500plat_register_types(void)
119{
120 type_register_static(&e500plat_info);
121}
122type_init(e500plat_register_types)
123