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21#include "qemu/osdep.h"
22#include "qemu/module.h"
23#include "qapi/error.h"
24#include "cpu.h"
25#include "exec/log.h"
26#include "exec/gdbstub.h"
27#include "hw/qdev-properties.h"
28
29static void nios2_cpu_set_pc(CPUState *cs, vaddr value)
30{
31 Nios2CPU *cpu = NIOS2_CPU(cs);
32 CPUNios2State *env = &cpu->env;
33
34 env->regs[R_PC] = value;
35}
36
37static bool nios2_cpu_has_work(CPUState *cs)
38{
39 return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
40}
41
42static void nios2_cpu_reset(DeviceState *dev)
43{
44 CPUState *cs = CPU(dev);
45 Nios2CPU *cpu = NIOS2_CPU(cs);
46 Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(cpu);
47 CPUNios2State *env = &cpu->env;
48
49 if (qemu_loglevel_mask(CPU_LOG_RESET)) {
50 qemu_log("CPU Reset (CPU %d)\n", cs->cpu_index);
51 log_cpu_state(cs, 0);
52 }
53
54 ncc->parent_reset(dev);
55
56 memset(env->regs, 0, sizeof(uint32_t) * NUM_CORE_REGS);
57 env->regs[R_PC] = cpu->reset_addr;
58
59#if defined(CONFIG_USER_ONLY)
60
61 env->regs[CR_STATUS] = CR_STATUS_U | CR_STATUS_PIE;
62#else
63 env->regs[CR_STATUS] = 0;
64#endif
65}
66
67#ifndef CONFIG_USER_ONLY
68static void nios2_cpu_set_irq(void *opaque, int irq, int level)
69{
70 Nios2CPU *cpu = opaque;
71 CPUNios2State *env = &cpu->env;
72 CPUState *cs = CPU(cpu);
73
74 env->regs[CR_IPENDING] = deposit32(env->regs[CR_IPENDING], irq, 1, !!level);
75
76 env->irq_pending = env->regs[CR_IPENDING] & env->regs[CR_IENABLE];
77
78 if (env->irq_pending && (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
79 env->irq_pending = 0;
80 cpu_interrupt(cs, CPU_INTERRUPT_HARD);
81 } else if (!env->irq_pending) {
82 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
83 }
84}
85#endif
86
87static void nios2_cpu_initfn(Object *obj)
88{
89 Nios2CPU *cpu = NIOS2_CPU(obj);
90
91 cpu_set_cpustate_pointers(cpu);
92
93#if !defined(CONFIG_USER_ONLY)
94 mmu_init(&cpu->env);
95
96
97
98
99
100
101
102
103 qdev_init_gpio_in_named(DEVICE(cpu), nios2_cpu_set_irq, "IRQ", 32);
104#endif
105}
106
107static ObjectClass *nios2_cpu_class_by_name(const char *cpu_model)
108{
109 return object_class_by_name(TYPE_NIOS2_CPU);
110}
111
112static void nios2_cpu_realizefn(DeviceState *dev, Error **errp)
113{
114 CPUState *cs = CPU(dev);
115 Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(dev);
116 Error *local_err = NULL;
117
118 cpu_exec_realizefn(cs, &local_err);
119 if (local_err != NULL) {
120 error_propagate(errp, local_err);
121 return;
122 }
123
124 qemu_init_vcpu(cs);
125 cpu_reset(cs);
126
127 ncc->parent_realize(dev, errp);
128}
129
130static bool nios2_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
131{
132 Nios2CPU *cpu = NIOS2_CPU(cs);
133 CPUNios2State *env = &cpu->env;
134
135 if ((interrupt_request & CPU_INTERRUPT_HARD) &&
136 (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
137 cs->exception_index = EXCP_IRQ;
138 nios2_cpu_do_interrupt(cs);
139 return true;
140 }
141 return false;
142}
143
144
145static void nios2_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
146{
147
148 info->mach = bfd_arch_nios2;
149#ifdef TARGET_WORDS_BIGENDIAN
150 info->print_insn = print_insn_big_nios2;
151#else
152 info->print_insn = print_insn_little_nios2;
153#endif
154}
155
156static int nios2_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
157{
158 Nios2CPU *cpu = NIOS2_CPU(cs);
159 CPUClass *cc = CPU_GET_CLASS(cs);
160 CPUNios2State *env = &cpu->env;
161
162 if (n > cc->gdb_num_core_regs) {
163 return 0;
164 }
165
166 if (n < 32) {
167 return gdb_get_reg32(mem_buf, env->regs[n]);
168 } else if (n == 32) {
169 return gdb_get_reg32(mem_buf, env->regs[R_PC]);
170 } else if (n < 49) {
171 return gdb_get_reg32(mem_buf, env->regs[n - 1]);
172 }
173
174
175 return 0;
176}
177
178static int nios2_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
179{
180 Nios2CPU *cpu = NIOS2_CPU(cs);
181 CPUClass *cc = CPU_GET_CLASS(cs);
182 CPUNios2State *env = &cpu->env;
183
184 if (n > cc->gdb_num_core_regs) {
185 return 0;
186 }
187
188 if (n < 32) {
189 env->regs[n] = ldl_p(mem_buf);
190 } else if (n == 32) {
191 env->regs[R_PC] = ldl_p(mem_buf);
192 } else if (n < 49) {
193 env->regs[n - 1] = ldl_p(mem_buf);
194 }
195
196 return 4;
197}
198
199static Property nios2_properties[] = {
200 DEFINE_PROP_BOOL("mmu_present", Nios2CPU, mmu_present, true),
201
202 DEFINE_PROP_UINT32("mmu_pid_num_bits", Nios2CPU, pid_num_bits, 8),
203
204 DEFINE_PROP_UINT32("mmu_tlb_num_ways", Nios2CPU, tlb_num_ways, 16),
205
206 DEFINE_PROP_UINT32("mmu_pid_num_entries", Nios2CPU, tlb_num_entries, 256),
207 DEFINE_PROP_END_OF_LIST(),
208};
209
210#ifndef CONFIG_USER_ONLY
211#include "hw/core/sysemu-cpu-ops.h"
212
213static const struct SysemuCPUOps nios2_sysemu_ops = {
214 .get_phys_page_debug = nios2_cpu_get_phys_page_debug,
215};
216#endif
217
218#include "hw/core/tcg-cpu-ops.h"
219
220static const struct TCGCPUOps nios2_tcg_ops = {
221 .initialize = nios2_tcg_init,
222 .cpu_exec_interrupt = nios2_cpu_exec_interrupt,
223 .tlb_fill = nios2_cpu_tlb_fill,
224
225#ifndef CONFIG_USER_ONLY
226 .do_interrupt = nios2_cpu_do_interrupt,
227 .do_unaligned_access = nios2_cpu_do_unaligned_access,
228#endif
229};
230
231static void nios2_cpu_class_init(ObjectClass *oc, void *data)
232{
233 DeviceClass *dc = DEVICE_CLASS(oc);
234 CPUClass *cc = CPU_CLASS(oc);
235 Nios2CPUClass *ncc = NIOS2_CPU_CLASS(oc);
236
237 device_class_set_parent_realize(dc, nios2_cpu_realizefn,
238 &ncc->parent_realize);
239 device_class_set_props(dc, nios2_properties);
240 device_class_set_parent_reset(dc, nios2_cpu_reset, &ncc->parent_reset);
241
242 cc->class_by_name = nios2_cpu_class_by_name;
243 cc->has_work = nios2_cpu_has_work;
244 cc->dump_state = nios2_cpu_dump_state;
245 cc->set_pc = nios2_cpu_set_pc;
246 cc->disas_set_info = nios2_cpu_disas_set_info;
247#ifndef CONFIG_USER_ONLY
248 cc->sysemu_ops = &nios2_sysemu_ops;
249#endif
250 cc->gdb_read_register = nios2_cpu_gdb_read_register;
251 cc->gdb_write_register = nios2_cpu_gdb_write_register;
252 cc->gdb_num_core_regs = 49;
253 cc->tcg_ops = &nios2_tcg_ops;
254}
255
256static const TypeInfo nios2_cpu_type_info = {
257 .name = TYPE_NIOS2_CPU,
258 .parent = TYPE_CPU,
259 .instance_size = sizeof(Nios2CPU),
260 .instance_init = nios2_cpu_initfn,
261 .class_size = sizeof(Nios2CPUClass),
262 .class_init = nios2_cpu_class_init,
263};
264
265static void nios2_cpu_register_types(void)
266{
267 type_register_static(&nios2_cpu_type_info);
268}
269
270type_init(nios2_cpu_register_types)
271