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13#include "qemu/osdep.h"
14#include "qemu/option.h"
15#include "qapi/qmp/qerror.h"
16#include "sysemu/replay.h"
17#include "qemu/units.h"
18#include "hw/boards.h"
19#include "hw/loader.h"
20#include "qapi/error.h"
21#include "qapi/qapi-visit-common.h"
22#include "qapi/qapi-visit-machine.h"
23#include "qapi/visitor.h"
24#include "hw/sysbus.h"
25#include "sysemu/cpus.h"
26#include "sysemu/sysemu.h"
27#include "sysemu/reset.h"
28#include "sysemu/runstate.h"
29#include "sysemu/numa.h"
30#include "qemu/error-report.h"
31#include "sysemu/qtest.h"
32#include "hw/pci/pci.h"
33#include "hw/mem/nvdimm.h"
34#include "migration/global_state.h"
35#include "migration/vmstate.h"
36#include "exec/confidential-guest-support.h"
37#include "hw/virtio/virtio.h"
38#include "hw/virtio/virtio-pci.h"
39
40GlobalProperty hw_compat_6_0[] = {
41 { "gpex-pcihost", "allow-unmapped-accesses", "false" },
42 { "i8042", "extended-state", "false"},
43 { "nvme-ns", "eui64-default", "off"},
44 { "e1000", "init-vet", "off" },
45 { "e1000e", "init-vet", "off" },
46 { "vhost-vsock-device", "seqpacket", "off" },
47};
48const size_t hw_compat_6_0_len = G_N_ELEMENTS(hw_compat_6_0);
49
50GlobalProperty hw_compat_5_2[] = {
51 { "ICH9-LPC", "smm-compat", "on"},
52 { "PIIX4_PM", "smm-compat", "on"},
53 { "virtio-blk-device", "report-discard-granularity", "off" },
54 { "virtio-net-pci", "vectors", "3"},
55};
56const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2);
57
58GlobalProperty hw_compat_5_1[] = {
59 { "vhost-scsi", "num_queues", "1"},
60 { "vhost-user-blk", "num-queues", "1"},
61 { "vhost-user-scsi", "num_queues", "1"},
62 { "virtio-blk-device", "num-queues", "1"},
63 { "virtio-scsi-device", "num_queues", "1"},
64 { "nvme", "use-intel-id", "on"},
65 { "pvpanic", "events", "1"},
66 { "pl011", "migrate-clk", "off" },
67 { "virtio-pci", "x-ats-page-aligned", "off"},
68};
69const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1);
70
71GlobalProperty hw_compat_5_0[] = {
72 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
73 { "virtio-balloon-device", "page-poison", "false" },
74 { "vmport", "x-read-set-eax", "off" },
75 { "vmport", "x-signal-unsupported-cmd", "off" },
76 { "vmport", "x-report-vmx-type", "off" },
77 { "vmport", "x-cmds-v2", "off" },
78 { "virtio-device", "x-disable-legacy-check", "true" },
79};
80const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0);
81
82GlobalProperty hw_compat_4_2[] = {
83 { "virtio-blk-device", "queue-size", "128"},
84 { "virtio-scsi-device", "virtqueue_size", "128"},
85 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
86 { "virtio-blk-device", "seg-max-adjust", "off"},
87 { "virtio-scsi-device", "seg_max_adjust", "off"},
88 { "vhost-blk-device", "seg_max_adjust", "off"},
89 { "usb-host", "suppress-remote-wake", "off" },
90 { "usb-redir", "suppress-remote-wake", "off" },
91 { "qxl", "revision", "4" },
92 { "qxl-vga", "revision", "4" },
93 { "fw_cfg", "acpi-mr-restore", "false" },
94 { "virtio-device", "use-disabled-flag", "false" },
95};
96const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2);
97
98GlobalProperty hw_compat_4_1[] = {
99 { "virtio-pci", "x-pcie-flr-init", "off" },
100};
101const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1);
102
103GlobalProperty hw_compat_4_0[] = {
104 { "VGA", "edid", "false" },
105 { "secondary-vga", "edid", "false" },
106 { "bochs-display", "edid", "false" },
107 { "virtio-vga", "edid", "false" },
108 { "virtio-gpu-device", "edid", "false" },
109 { "virtio-device", "use-started", "false" },
110 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
111 { "pl031", "migrate-tick-offset", "false" },
112};
113const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0);
114
115GlobalProperty hw_compat_3_1[] = {
116 { "pcie-root-port", "x-speed", "2_5" },
117 { "pcie-root-port", "x-width", "1" },
118 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
119 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
120 { "tpm-crb", "ppi", "false" },
121 { "tpm-tis", "ppi", "false" },
122 { "usb-kbd", "serial", "42" },
123 { "usb-mouse", "serial", "42" },
124 { "usb-tablet", "serial", "42" },
125 { "virtio-blk-device", "discard", "false" },
126 { "virtio-blk-device", "write-zeroes", "false" },
127 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
128 { "pcie-root-port-base", "disable-acs", "true" },
129};
130const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1);
131
132GlobalProperty hw_compat_3_0[] = {};
133const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0);
134
135GlobalProperty hw_compat_2_12[] = {
136 { "migration", "decompress-error-check", "off" },
137 { "hda-audio", "use-timer", "false" },
138 { "cirrus-vga", "global-vmstate", "true" },
139 { "VGA", "global-vmstate", "true" },
140 { "vmware-svga", "global-vmstate", "true" },
141 { "qxl-vga", "global-vmstate", "true" },
142};
143const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12);
144
145GlobalProperty hw_compat_2_11[] = {
146 { "hpet", "hpet-offset-saved", "false" },
147 { "virtio-blk-pci", "vectors", "2" },
148 { "vhost-user-blk-pci", "vectors", "2" },
149 { "e1000", "migrate_tso_props", "off" },
150};
151const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11);
152
153GlobalProperty hw_compat_2_10[] = {
154 { "virtio-mouse-device", "wheel-axis", "false" },
155 { "virtio-tablet-device", "wheel-axis", "false" },
156};
157const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10);
158
159GlobalProperty hw_compat_2_9[] = {
160 { "pci-bridge", "shpc", "off" },
161 { "intel-iommu", "pt", "off" },
162 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
163 { "pcie-root-port", "x-migrate-msix", "false" },
164};
165const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9);
166
167GlobalProperty hw_compat_2_8[] = {
168 { "fw_cfg_mem", "x-file-slots", "0x10" },
169 { "fw_cfg_io", "x-file-slots", "0x10" },
170 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
171 { "pci-bridge", "shpc", "on" },
172 { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" },
173 { "virtio-pci", "x-pcie-deverr-init", "off" },
174 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
175 { "virtio-pci", "x-pcie-pm-init", "off" },
176 { "cirrus-vga", "vgamem_mb", "8" },
177 { "isa-cirrus-vga", "vgamem_mb", "8" },
178};
179const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8);
180
181GlobalProperty hw_compat_2_7[] = {
182 { "virtio-pci", "page-per-vq", "on" },
183 { "virtio-serial-device", "emergency-write", "off" },
184 { "ioapic", "version", "0x11" },
185 { "intel-iommu", "x-buggy-eim", "true" },
186 { "virtio-pci", "x-ignore-backend-features", "on" },
187};
188const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7);
189
190GlobalProperty hw_compat_2_6[] = {
191 { "virtio-mmio", "format_transport_address", "off" },
192
193 { "virtio-pci", "disable-modern", "on", .optional = true },
194 { "virtio-pci", "disable-legacy", "off", .optional = true },
195};
196const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6);
197
198GlobalProperty hw_compat_2_5[] = {
199 { "isa-fdc", "fallback", "144" },
200 { "pvscsi", "x-old-pci-configuration", "on" },
201 { "pvscsi", "x-disable-pcie", "on" },
202 { "vmxnet3", "x-old-msi-offsets", "on" },
203 { "vmxnet3", "x-disable-pcie", "on" },
204};
205const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5);
206
207GlobalProperty hw_compat_2_4[] = {
208
209 { "virtio-blk-device", "scsi", "true", .optional = true },
210 { "e1000", "extra_mac_registers", "off" },
211 { "virtio-pci", "x-disable-pcie", "on" },
212 { "virtio-pci", "migrate-extra", "off" },
213 { "fw_cfg_mem", "dma_enabled", "off" },
214 { "fw_cfg_io", "dma_enabled", "off" }
215};
216const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4);
217
218GlobalProperty hw_compat_2_3[] = {
219 { "virtio-blk-pci", "any_layout", "off" },
220 { "virtio-balloon-pci", "any_layout", "off" },
221 { "virtio-serial-pci", "any_layout", "off" },
222 { "virtio-9p-pci", "any_layout", "off" },
223 { "virtio-rng-pci", "any_layout", "off" },
224 { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" },
225 { "migration", "send-configuration", "off" },
226 { "migration", "send-section-footer", "off" },
227 { "migration", "store-global-state", "off" },
228};
229const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3);
230
231GlobalProperty hw_compat_2_2[] = {};
232const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2);
233
234GlobalProperty hw_compat_2_1[] = {
235 { "intel-hda", "old_msi_addr", "on" },
236 { "VGA", "qemu-extended-regs", "off" },
237 { "secondary-vga", "qemu-extended-regs", "off" },
238 { "virtio-scsi-pci", "any_layout", "off" },
239 { "usb-mouse", "usb_version", "1" },
240 { "usb-kbd", "usb_version", "1" },
241 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
242};
243const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1);
244
245MachineState *current_machine;
246
247static char *machine_get_kernel(Object *obj, Error **errp)
248{
249 MachineState *ms = MACHINE(obj);
250
251 return g_strdup(ms->kernel_filename);
252}
253
254static void machine_set_kernel(Object *obj, const char *value, Error **errp)
255{
256 MachineState *ms = MACHINE(obj);
257
258 g_free(ms->kernel_filename);
259 ms->kernel_filename = g_strdup(value);
260}
261
262static char *machine_get_initrd(Object *obj, Error **errp)
263{
264 MachineState *ms = MACHINE(obj);
265
266 return g_strdup(ms->initrd_filename);
267}
268
269static void machine_set_initrd(Object *obj, const char *value, Error **errp)
270{
271 MachineState *ms = MACHINE(obj);
272
273 g_free(ms->initrd_filename);
274 ms->initrd_filename = g_strdup(value);
275}
276
277static char *machine_get_append(Object *obj, Error **errp)
278{
279 MachineState *ms = MACHINE(obj);
280
281 return g_strdup(ms->kernel_cmdline);
282}
283
284static void machine_set_append(Object *obj, const char *value, Error **errp)
285{
286 MachineState *ms = MACHINE(obj);
287
288 g_free(ms->kernel_cmdline);
289 ms->kernel_cmdline = g_strdup(value);
290}
291
292static char *machine_get_dtb(Object *obj, Error **errp)
293{
294 MachineState *ms = MACHINE(obj);
295
296 return g_strdup(ms->dtb);
297}
298
299static void machine_set_dtb(Object *obj, const char *value, Error **errp)
300{
301 MachineState *ms = MACHINE(obj);
302
303 g_free(ms->dtb);
304 ms->dtb = g_strdup(value);
305}
306
307static char *machine_get_dumpdtb(Object *obj, Error **errp)
308{
309 MachineState *ms = MACHINE(obj);
310
311 return g_strdup(ms->dumpdtb);
312}
313
314static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp)
315{
316 MachineState *ms = MACHINE(obj);
317
318 g_free(ms->dumpdtb);
319 ms->dumpdtb = g_strdup(value);
320}
321
322static void machine_get_phandle_start(Object *obj, Visitor *v,
323 const char *name, void *opaque,
324 Error **errp)
325{
326 MachineState *ms = MACHINE(obj);
327 int64_t value = ms->phandle_start;
328
329 visit_type_int(v, name, &value, errp);
330}
331
332static void machine_set_phandle_start(Object *obj, Visitor *v,
333 const char *name, void *opaque,
334 Error **errp)
335{
336 MachineState *ms = MACHINE(obj);
337 int64_t value;
338
339 if (!visit_type_int(v, name, &value, errp)) {
340 return;
341 }
342
343 ms->phandle_start = value;
344}
345
346static char *machine_get_dt_compatible(Object *obj, Error **errp)
347{
348 MachineState *ms = MACHINE(obj);
349
350 return g_strdup(ms->dt_compatible);
351}
352
353static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp)
354{
355 MachineState *ms = MACHINE(obj);
356
357 g_free(ms->dt_compatible);
358 ms->dt_compatible = g_strdup(value);
359}
360
361static bool machine_get_dump_guest_core(Object *obj, Error **errp)
362{
363 MachineState *ms = MACHINE(obj);
364
365 return ms->dump_guest_core;
366}
367
368static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp)
369{
370 MachineState *ms = MACHINE(obj);
371
372 ms->dump_guest_core = value;
373}
374
375static bool machine_get_mem_merge(Object *obj, Error **errp)
376{
377 MachineState *ms = MACHINE(obj);
378
379 return ms->mem_merge;
380}
381
382static void machine_set_mem_merge(Object *obj, bool value, Error **errp)
383{
384 MachineState *ms = MACHINE(obj);
385
386 ms->mem_merge = value;
387}
388
389static bool machine_get_usb(Object *obj, Error **errp)
390{
391 MachineState *ms = MACHINE(obj);
392
393 return ms->usb;
394}
395
396static void machine_set_usb(Object *obj, bool value, Error **errp)
397{
398 MachineState *ms = MACHINE(obj);
399
400 ms->usb = value;
401 ms->usb_disabled = !value;
402}
403
404static bool machine_get_graphics(Object *obj, Error **errp)
405{
406 MachineState *ms = MACHINE(obj);
407
408 return ms->enable_graphics;
409}
410
411static void machine_set_graphics(Object *obj, bool value, Error **errp)
412{
413 MachineState *ms = MACHINE(obj);
414
415 ms->enable_graphics = value;
416}
417
418static char *machine_get_firmware(Object *obj, Error **errp)
419{
420 MachineState *ms = MACHINE(obj);
421
422 return g_strdup(ms->firmware);
423}
424
425static void machine_set_firmware(Object *obj, const char *value, Error **errp)
426{
427 MachineState *ms = MACHINE(obj);
428
429 g_free(ms->firmware);
430 ms->firmware = g_strdup(value);
431}
432
433static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp)
434{
435 MachineState *ms = MACHINE(obj);
436
437 ms->suppress_vmdesc = value;
438}
439
440static bool machine_get_suppress_vmdesc(Object *obj, Error **errp)
441{
442 MachineState *ms = MACHINE(obj);
443
444 return ms->suppress_vmdesc;
445}
446
447static char *machine_get_memory_encryption(Object *obj, Error **errp)
448{
449 MachineState *ms = MACHINE(obj);
450
451 if (ms->cgs) {
452 return g_strdup(object_get_canonical_path_component(OBJECT(ms->cgs)));
453 }
454
455 return NULL;
456}
457
458static void machine_set_memory_encryption(Object *obj, const char *value,
459 Error **errp)
460{
461 Object *cgs =
462 object_resolve_path_component(object_get_objects_root(), value);
463
464 if (!cgs) {
465 error_setg(errp, "No such memory encryption object '%s'", value);
466 return;
467 }
468
469 object_property_set_link(obj, "confidential-guest-support", cgs, errp);
470}
471
472static void machine_check_confidential_guest_support(const Object *obj,
473 const char *name,
474 Object *new_target,
475 Error **errp)
476{
477
478
479
480
481
482}
483
484static bool machine_get_nvdimm(Object *obj, Error **errp)
485{
486 MachineState *ms = MACHINE(obj);
487
488 return ms->nvdimms_state->is_enabled;
489}
490
491static void machine_set_nvdimm(Object *obj, bool value, Error **errp)
492{
493 MachineState *ms = MACHINE(obj);
494
495 ms->nvdimms_state->is_enabled = value;
496}
497
498static bool machine_get_hmat(Object *obj, Error **errp)
499{
500 MachineState *ms = MACHINE(obj);
501
502 return ms->numa_state->hmat_enabled;
503}
504
505static void machine_set_hmat(Object *obj, bool value, Error **errp)
506{
507 MachineState *ms = MACHINE(obj);
508
509 ms->numa_state->hmat_enabled = value;
510}
511
512static char *machine_get_nvdimm_persistence(Object *obj, Error **errp)
513{
514 MachineState *ms = MACHINE(obj);
515
516 return g_strdup(ms->nvdimms_state->persistence_string);
517}
518
519static void machine_set_nvdimm_persistence(Object *obj, const char *value,
520 Error **errp)
521{
522 MachineState *ms = MACHINE(obj);
523 NVDIMMState *nvdimms_state = ms->nvdimms_state;
524
525 if (strcmp(value, "cpu") == 0) {
526 nvdimms_state->persistence = 3;
527 } else if (strcmp(value, "mem-ctrl") == 0) {
528 nvdimms_state->persistence = 2;
529 } else {
530 error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option",
531 value);
532 return;
533 }
534
535 g_free(nvdimms_state->persistence_string);
536 nvdimms_state->persistence_string = g_strdup(value);
537}
538
539void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
540{
541 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
542}
543
544bool device_is_dynamic_sysbus(MachineClass *mc, DeviceState *dev)
545{
546 bool allowed = false;
547 strList *wl;
548 Object *obj = OBJECT(dev);
549
550 if (!object_dynamic_cast(obj, TYPE_SYS_BUS_DEVICE)) {
551 return false;
552 }
553
554 for (wl = mc->allowed_dynamic_sysbus_devices;
555 !allowed && wl;
556 wl = wl->next) {
557 allowed |= !!object_dynamic_cast(obj, wl->value);
558 }
559
560 return allowed;
561}
562
563static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque)
564{
565 MachineState *machine = opaque;
566 MachineClass *mc = MACHINE_GET_CLASS(machine);
567
568 if (!device_is_dynamic_sysbus(mc, DEVICE(sbdev))) {
569 error_report("Option '-device %s' cannot be handled by this machine",
570 object_class_get_name(object_get_class(OBJECT(sbdev))));
571 exit(1);
572 }
573}
574
575static char *machine_get_memdev(Object *obj, Error **errp)
576{
577 MachineState *ms = MACHINE(obj);
578
579 return g_strdup(ms->ram_memdev_id);
580}
581
582static void machine_set_memdev(Object *obj, const char *value, Error **errp)
583{
584 MachineState *ms = MACHINE(obj);
585
586 g_free(ms->ram_memdev_id);
587 ms->ram_memdev_id = g_strdup(value);
588}
589
590static void machine_init_notify(Notifier *notifier, void *data)
591{
592 MachineState *machine = MACHINE(qdev_get_machine());
593
594
595
596
597
598 foreach_dynamic_sysbus_device(validate_sysbus_device, machine);
599}
600
601HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine)
602{
603 int i;
604 HotpluggableCPUList *head = NULL;
605 MachineClass *mc = MACHINE_GET_CLASS(machine);
606
607
608 mc->possible_cpu_arch_ids(machine);
609
610 for (i = 0; i < machine->possible_cpus->len; i++) {
611 Object *cpu;
612 HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1);
613
614 cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type);
615 cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count;
616 cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props,
617 sizeof(*cpu_item->props));
618
619 cpu = machine->possible_cpus->cpus[i].cpu;
620 if (cpu) {
621 cpu_item->has_qom_path = true;
622 cpu_item->qom_path = object_get_canonical_path(cpu);
623 }
624 QAPI_LIST_PREPEND(head, cpu_item);
625 }
626 return head;
627}
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654void machine_set_cpu_numa_node(MachineState *machine,
655 const CpuInstanceProperties *props, Error **errp)
656{
657 MachineClass *mc = MACHINE_GET_CLASS(machine);
658 NodeInfo *numa_info = machine->numa_state->nodes;
659 bool match = false;
660 int i;
661
662 if (!mc->possible_cpu_arch_ids) {
663 error_setg(errp, "mapping of CPUs to NUMA node is not supported");
664 return;
665 }
666
667
668 assert(props->has_node_id);
669
670
671 mc->possible_cpu_arch_ids(machine);
672
673 for (i = 0; i < machine->possible_cpus->len; i++) {
674 CPUArchId *slot = &machine->possible_cpus->cpus[i];
675
676
677 if (props->has_thread_id && !slot->props.has_thread_id) {
678 error_setg(errp, "thread-id is not supported");
679 return;
680 }
681
682 if (props->has_core_id && !slot->props.has_core_id) {
683 error_setg(errp, "core-id is not supported");
684 return;
685 }
686
687 if (props->has_socket_id && !slot->props.has_socket_id) {
688 error_setg(errp, "socket-id is not supported");
689 return;
690 }
691
692 if (props->has_die_id && !slot->props.has_die_id) {
693 error_setg(errp, "die-id is not supported");
694 return;
695 }
696
697
698 if (props->has_thread_id && props->thread_id != slot->props.thread_id) {
699 continue;
700 }
701
702 if (props->has_core_id && props->core_id != slot->props.core_id) {
703 continue;
704 }
705
706 if (props->has_die_id && props->die_id != slot->props.die_id) {
707 continue;
708 }
709
710 if (props->has_socket_id && props->socket_id != slot->props.socket_id) {
711 continue;
712 }
713
714
715
716
717 if (slot->props.has_node_id &&
718 slot->props.node_id != props->node_id) {
719 error_setg(errp, "CPU is already assigned to node-id: %" PRId64,
720 slot->props.node_id);
721 return;
722 }
723
724
725 match = true;
726 slot->props.node_id = props->node_id;
727 slot->props.has_node_id = props->has_node_id;
728
729 if (machine->numa_state->hmat_enabled) {
730 if ((numa_info[props->node_id].initiator < MAX_NODES) &&
731 (props->node_id != numa_info[props->node_id].initiator)) {
732 error_setg(errp, "The initiator of CPU NUMA node %" PRId64
733 " should be itself (got %" PRIu16 ")",
734 props->node_id, numa_info[props->node_id].initiator);
735 return;
736 }
737 numa_info[props->node_id].has_cpu = true;
738 numa_info[props->node_id].initiator = props->node_id;
739 }
740 }
741
742 if (!match) {
743 error_setg(errp, "no match found");
744 }
745}
746
747static void smp_parse(MachineState *ms, SMPConfiguration *config, Error **errp)
748{
749 unsigned cpus = config->has_cpus ? config->cpus : 0;
750 unsigned sockets = config->has_sockets ? config->sockets : 0;
751 unsigned cores = config->has_cores ? config->cores : 0;
752 unsigned threads = config->has_threads ? config->threads : 0;
753
754 if (config->has_dies && config->dies != 0 && config->dies != 1) {
755 error_setg(errp, "dies not supported by this machine's CPU topology");
756 return;
757 }
758
759
760 if (cpus == 0 || sockets == 0) {
761 cores = cores > 0 ? cores : 1;
762 threads = threads > 0 ? threads : 1;
763 if (cpus == 0) {
764 sockets = sockets > 0 ? sockets : 1;
765 cpus = cores * threads * sockets;
766 } else {
767 ms->smp.max_cpus = config->has_maxcpus ? config->maxcpus : cpus;
768 sockets = ms->smp.max_cpus / (cores * threads);
769 }
770 } else if (cores == 0) {
771 threads = threads > 0 ? threads : 1;
772 cores = cpus / (sockets * threads);
773 cores = cores > 0 ? cores : 1;
774 } else if (threads == 0) {
775 threads = cpus / (cores * sockets);
776 threads = threads > 0 ? threads : 1;
777 } else if (sockets * cores * threads < cpus) {
778 error_setg(errp, "cpu topology: "
779 "sockets (%u) * cores (%u) * threads (%u) < "
780 "smp_cpus (%u)",
781 sockets, cores, threads, cpus);
782 return;
783 }
784
785 ms->smp.max_cpus = config->has_maxcpus ? config->maxcpus : cpus;
786
787 if (ms->smp.max_cpus < cpus) {
788 error_setg(errp, "maxcpus must be equal to or greater than smp");
789 return;
790 }
791
792 if (sockets * cores * threads != ms->smp.max_cpus) {
793 error_setg(errp, "Invalid CPU topology: "
794 "sockets (%u) * cores (%u) * threads (%u) "
795 "!= maxcpus (%u)",
796 sockets, cores, threads,
797 ms->smp.max_cpus);
798 return;
799 }
800
801 ms->smp.cpus = cpus;
802 ms->smp.cores = cores;
803 ms->smp.threads = threads;
804 ms->smp.sockets = sockets;
805}
806
807static void machine_get_smp(Object *obj, Visitor *v, const char *name,
808 void *opaque, Error **errp)
809{
810 MachineState *ms = MACHINE(obj);
811 SMPConfiguration *config = &(SMPConfiguration){
812 .has_cores = true, .cores = ms->smp.cores,
813 .has_sockets = true, .sockets = ms->smp.sockets,
814 .has_dies = true, .dies = ms->smp.dies,
815 .has_threads = true, .threads = ms->smp.threads,
816 .has_cpus = true, .cpus = ms->smp.cpus,
817 .has_maxcpus = true, .maxcpus = ms->smp.max_cpus,
818 };
819 if (!visit_type_SMPConfiguration(v, name, &config, &error_abort)) {
820 return;
821 }
822}
823
824static void machine_set_smp(Object *obj, Visitor *v, const char *name,
825 void *opaque, Error **errp)
826{
827 MachineClass *mc = MACHINE_GET_CLASS(obj);
828 MachineState *ms = MACHINE(obj);
829 SMPConfiguration *config;
830 ERRP_GUARD();
831
832 if (!visit_type_SMPConfiguration(v, name, &config, errp)) {
833 return;
834 }
835
836 mc->smp_parse(ms, config, errp);
837 if (*errp) {
838 goto out_free;
839 }
840
841
842 if (ms->smp.cpus < mc->min_cpus) {
843 error_setg(errp, "Invalid SMP CPUs %d. The min CPUs "
844 "supported by machine '%s' is %d",
845 ms->smp.cpus,
846 mc->name, mc->min_cpus);
847 } else if (ms->smp.max_cpus > mc->max_cpus) {
848 error_setg(errp, "Invalid SMP CPUs %d. The max CPUs "
849 "supported by machine '%s' is %d",
850 current_machine->smp.max_cpus,
851 mc->name, mc->max_cpus);
852 }
853
854out_free:
855 qapi_free_SMPConfiguration(config);
856}
857
858static void machine_class_init(ObjectClass *oc, void *data)
859{
860 MachineClass *mc = MACHINE_CLASS(oc);
861
862
863 mc->default_ram_size = 128 * MiB;
864 mc->rom_file_has_mr = true;
865 mc->smp_parse = smp_parse;
866
867
868
869
870 mc->numa_mem_align_shift = 23;
871
872 object_class_property_add_str(oc, "kernel",
873 machine_get_kernel, machine_set_kernel);
874 object_class_property_set_description(oc, "kernel",
875 "Linux kernel image file");
876
877 object_class_property_add_str(oc, "initrd",
878 machine_get_initrd, machine_set_initrd);
879 object_class_property_set_description(oc, "initrd",
880 "Linux initial ramdisk file");
881
882 object_class_property_add_str(oc, "append",
883 machine_get_append, machine_set_append);
884 object_class_property_set_description(oc, "append",
885 "Linux kernel command line");
886
887 object_class_property_add_str(oc, "dtb",
888 machine_get_dtb, machine_set_dtb);
889 object_class_property_set_description(oc, "dtb",
890 "Linux kernel device tree file");
891
892 object_class_property_add_str(oc, "dumpdtb",
893 machine_get_dumpdtb, machine_set_dumpdtb);
894 object_class_property_set_description(oc, "dumpdtb",
895 "Dump current dtb to a file and quit");
896
897 object_class_property_add(oc, "smp", "SMPConfiguration",
898 machine_get_smp, machine_set_smp,
899 NULL, NULL);
900 object_class_property_set_description(oc, "smp",
901 "CPU topology");
902
903 object_class_property_add(oc, "phandle-start", "int",
904 machine_get_phandle_start, machine_set_phandle_start,
905 NULL, NULL);
906 object_class_property_set_description(oc, "phandle-start",
907 "The first phandle ID we may generate dynamically");
908
909 object_class_property_add_str(oc, "dt-compatible",
910 machine_get_dt_compatible, machine_set_dt_compatible);
911 object_class_property_set_description(oc, "dt-compatible",
912 "Overrides the \"compatible\" property of the dt root node");
913
914 object_class_property_add_bool(oc, "dump-guest-core",
915 machine_get_dump_guest_core, machine_set_dump_guest_core);
916 object_class_property_set_description(oc, "dump-guest-core",
917 "Include guest memory in a core dump");
918
919 object_class_property_add_bool(oc, "mem-merge",
920 machine_get_mem_merge, machine_set_mem_merge);
921 object_class_property_set_description(oc, "mem-merge",
922 "Enable/disable memory merge support");
923
924 object_class_property_add_bool(oc, "usb",
925 machine_get_usb, machine_set_usb);
926 object_class_property_set_description(oc, "usb",
927 "Set on/off to enable/disable usb");
928
929 object_class_property_add_bool(oc, "graphics",
930 machine_get_graphics, machine_set_graphics);
931 object_class_property_set_description(oc, "graphics",
932 "Set on/off to enable/disable graphics emulation");
933
934 object_class_property_add_str(oc, "firmware",
935 machine_get_firmware, machine_set_firmware);
936 object_class_property_set_description(oc, "firmware",
937 "Firmware image");
938
939 object_class_property_add_bool(oc, "suppress-vmdesc",
940 machine_get_suppress_vmdesc, machine_set_suppress_vmdesc);
941 object_class_property_set_description(oc, "suppress-vmdesc",
942 "Set on to disable self-describing migration");
943
944 object_class_property_add_link(oc, "confidential-guest-support",
945 TYPE_CONFIDENTIAL_GUEST_SUPPORT,
946 offsetof(MachineState, cgs),
947 machine_check_confidential_guest_support,
948 OBJ_PROP_LINK_STRONG);
949 object_class_property_set_description(oc, "confidential-guest-support",
950 "Set confidential guest scheme to support");
951
952
953 object_class_property_add_str(oc, "memory-encryption",
954 machine_get_memory_encryption, machine_set_memory_encryption);
955 object_class_property_set_description(oc, "memory-encryption",
956 "Set memory encryption object to use");
957
958 object_class_property_add_str(oc, "memory-backend",
959 machine_get_memdev, machine_set_memdev);
960 object_class_property_set_description(oc, "memory-backend",
961 "Set RAM backend"
962 "Valid value is ID of hostmem based backend");
963}
964
965static void machine_class_base_init(ObjectClass *oc, void *data)
966{
967 MachineClass *mc = MACHINE_CLASS(oc);
968 mc->max_cpus = mc->max_cpus ?: 1;
969 mc->min_cpus = mc->min_cpus ?: 1;
970 mc->default_cpus = mc->default_cpus ?: 1;
971
972 if (!object_class_is_abstract(oc)) {
973 const char *cname = object_class_get_name(oc);
974 assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX));
975 mc->name = g_strndup(cname,
976 strlen(cname) - strlen(TYPE_MACHINE_SUFFIX));
977 mc->compat_props = g_ptr_array_new();
978 }
979}
980
981static void machine_initfn(Object *obj)
982{
983 MachineState *ms = MACHINE(obj);
984 MachineClass *mc = MACHINE_GET_CLASS(obj);
985
986 container_get(obj, "/peripheral");
987 container_get(obj, "/peripheral-anon");
988
989 ms->dump_guest_core = true;
990 ms->mem_merge = true;
991 ms->enable_graphics = true;
992 ms->kernel_cmdline = g_strdup("");
993
994 if (mc->nvdimm_supported) {
995 Object *obj = OBJECT(ms);
996
997 ms->nvdimms_state = g_new0(NVDIMMState, 1);
998 object_property_add_bool(obj, "nvdimm",
999 machine_get_nvdimm, machine_set_nvdimm);
1000 object_property_set_description(obj, "nvdimm",
1001 "Set on/off to enable/disable "
1002 "NVDIMM instantiation");
1003
1004 object_property_add_str(obj, "nvdimm-persistence",
1005 machine_get_nvdimm_persistence,
1006 machine_set_nvdimm_persistence);
1007 object_property_set_description(obj, "nvdimm-persistence",
1008 "Set NVDIMM persistence"
1009 "Valid values are cpu, mem-ctrl");
1010 }
1011
1012 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
1013 ms->numa_state = g_new0(NumaState, 1);
1014 object_property_add_bool(obj, "hmat",
1015 machine_get_hmat, machine_set_hmat);
1016 object_property_set_description(obj, "hmat",
1017 "Set on/off to enable/disable "
1018 "ACPI Heterogeneous Memory Attribute "
1019 "Table (HMAT)");
1020 }
1021
1022
1023 ms->sysbus_notifier.notify = machine_init_notify;
1024 qemu_add_machine_init_done_notifier(&ms->sysbus_notifier);
1025
1026
1027 ms->smp.cpus = mc->default_cpus;
1028 ms->smp.max_cpus = mc->default_cpus;
1029 ms->smp.cores = 1;
1030 ms->smp.dies = 1;
1031 ms->smp.threads = 1;
1032 ms->smp.sockets = 1;
1033}
1034
1035static void machine_finalize(Object *obj)
1036{
1037 MachineState *ms = MACHINE(obj);
1038
1039 g_free(ms->kernel_filename);
1040 g_free(ms->initrd_filename);
1041 g_free(ms->kernel_cmdline);
1042 g_free(ms->dtb);
1043 g_free(ms->dumpdtb);
1044 g_free(ms->dt_compatible);
1045 g_free(ms->firmware);
1046 g_free(ms->device_memory);
1047 g_free(ms->nvdimms_state);
1048 g_free(ms->numa_state);
1049}
1050
1051bool machine_usb(MachineState *machine)
1052{
1053 return machine->usb;
1054}
1055
1056int machine_phandle_start(MachineState *machine)
1057{
1058 return machine->phandle_start;
1059}
1060
1061bool machine_dump_guest_core(MachineState *machine)
1062{
1063 return machine->dump_guest_core;
1064}
1065
1066bool machine_mem_merge(MachineState *machine)
1067{
1068 return machine->mem_merge;
1069}
1070
1071static char *cpu_slot_to_string(const CPUArchId *cpu)
1072{
1073 GString *s = g_string_new(NULL);
1074 if (cpu->props.has_socket_id) {
1075 g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id);
1076 }
1077 if (cpu->props.has_die_id) {
1078 g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id);
1079 }
1080 if (cpu->props.has_core_id) {
1081 if (s->len) {
1082 g_string_append_printf(s, ", ");
1083 }
1084 g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id);
1085 }
1086 if (cpu->props.has_thread_id) {
1087 if (s->len) {
1088 g_string_append_printf(s, ", ");
1089 }
1090 g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id);
1091 }
1092 return g_string_free(s, false);
1093}
1094
1095static void numa_validate_initiator(NumaState *numa_state)
1096{
1097 int i;
1098 NodeInfo *numa_info = numa_state->nodes;
1099
1100 for (i = 0; i < numa_state->num_nodes; i++) {
1101 if (numa_info[i].initiator == MAX_NODES) {
1102 error_report("The initiator of NUMA node %d is missing, use "
1103 "'-numa node,initiator' option to declare it", i);
1104 exit(1);
1105 }
1106
1107 if (!numa_info[numa_info[i].initiator].present) {
1108 error_report("NUMA node %" PRIu16 " is missing, use "
1109 "'-numa node' option to declare it first",
1110 numa_info[i].initiator);
1111 exit(1);
1112 }
1113
1114 if (!numa_info[numa_info[i].initiator].has_cpu) {
1115 error_report("The initiator of NUMA node %d is invalid", i);
1116 exit(1);
1117 }
1118 }
1119}
1120
1121static void machine_numa_finish_cpu_init(MachineState *machine)
1122{
1123 int i;
1124 bool default_mapping;
1125 GString *s = g_string_new(NULL);
1126 MachineClass *mc = MACHINE_GET_CLASS(machine);
1127 const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine);
1128
1129 assert(machine->numa_state->num_nodes);
1130 for (i = 0; i < possible_cpus->len; i++) {
1131 if (possible_cpus->cpus[i].props.has_node_id) {
1132 break;
1133 }
1134 }
1135 default_mapping = (i == possible_cpus->len);
1136
1137 for (i = 0; i < possible_cpus->len; i++) {
1138 const CPUArchId *cpu_slot = &possible_cpus->cpus[i];
1139
1140 if (!cpu_slot->props.has_node_id) {
1141
1142 CpuInstanceProperties props = cpu_slot->props;
1143
1144 props.node_id = mc->get_default_cpu_node_id(machine, i);
1145 if (!default_mapping) {
1146
1147
1148 char *cpu_str = cpu_slot_to_string(cpu_slot);
1149 g_string_append_printf(s, "%sCPU %d [%s]",
1150 s->len ? ", " : "", i, cpu_str);
1151 g_free(cpu_str);
1152
1153
1154 props.node_id = 0;
1155 }
1156
1157 props.has_node_id = true;
1158 machine_set_cpu_numa_node(machine, &props, &error_fatal);
1159 }
1160 }
1161
1162 if (machine->numa_state->hmat_enabled) {
1163 numa_validate_initiator(machine->numa_state);
1164 }
1165
1166 if (s->len && !qtest_enabled()) {
1167 warn_report("CPU(s) not present in any NUMA nodes: %s",
1168 s->str);
1169 warn_report("All CPU(s) up to maxcpus should be described "
1170 "in NUMA config, ability to start up with partial NUMA "
1171 "mappings is obsoleted and will be removed in future");
1172 }
1173 g_string_free(s, true);
1174}
1175
1176MemoryRegion *machine_consume_memdev(MachineState *machine,
1177 HostMemoryBackend *backend)
1178{
1179 MemoryRegion *ret = host_memory_backend_get_memory(backend);
1180
1181 if (memory_region_is_mapped(ret)) {
1182 error_report("memory backend %s can't be used multiple times.",
1183 object_get_canonical_path_component(OBJECT(backend)));
1184 exit(EXIT_FAILURE);
1185 }
1186 host_memory_backend_set_mapped(backend, true);
1187 vmstate_register_ram_global(ret);
1188 return ret;
1189}
1190
1191void machine_run_board_init(MachineState *machine)
1192{
1193 MachineClass *machine_class = MACHINE_GET_CLASS(machine);
1194 ObjectClass *oc = object_class_by_name(machine->cpu_type);
1195 CPUClass *cc;
1196
1197
1198
1199
1200 replay_checkpoint(CHECKPOINT_INIT);
1201
1202 if (machine->ram_memdev_id) {
1203 Object *o;
1204 o = object_resolve_path_type(machine->ram_memdev_id,
1205 TYPE_MEMORY_BACKEND, NULL);
1206 machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o));
1207 }
1208
1209 if (machine->numa_state) {
1210 numa_complete_configuration(machine);
1211 if (machine->numa_state->num_nodes) {
1212 machine_numa_finish_cpu_init(machine);
1213 }
1214 }
1215
1216
1217
1218
1219 if (machine_class->valid_cpu_types && machine->cpu_type) {
1220 int i;
1221
1222 for (i = 0; machine_class->valid_cpu_types[i]; i++) {
1223 if (object_class_dynamic_cast(oc,
1224 machine_class->valid_cpu_types[i])) {
1225
1226
1227
1228 break;
1229 }
1230 }
1231
1232 if (!machine_class->valid_cpu_types[i]) {
1233
1234 error_report("Invalid CPU type: %s", machine->cpu_type);
1235 error_printf("The valid types are: %s",
1236 machine_class->valid_cpu_types[0]);
1237 for (i = 1; machine_class->valid_cpu_types[i]; i++) {
1238 error_printf(", %s", machine_class->valid_cpu_types[i]);
1239 }
1240 error_printf("\n");
1241
1242 exit(1);
1243 }
1244 }
1245
1246
1247 cc = CPU_CLASS(oc);
1248 if (cc && cc->deprecation_note) {
1249 warn_report("CPU model %s is deprecated -- %s", machine->cpu_type,
1250 cc->deprecation_note);
1251 }
1252
1253 if (machine->cgs) {
1254
1255
1256
1257
1258
1259 machine_set_mem_merge(OBJECT(machine), false, &error_abort);
1260
1261
1262
1263
1264
1265
1266
1267 object_register_sugar_prop(TYPE_VIRTIO_PCI, "disable-legacy",
1268 "on", true);
1269 object_register_sugar_prop(TYPE_VIRTIO_DEVICE, "iommu_platform",
1270 "on", false);
1271 }
1272
1273 accel_init_interfaces(ACCEL_GET_CLASS(machine->accelerator));
1274 machine_class->init(machine);
1275 phase_advance(PHASE_MACHINE_INITIALIZED);
1276}
1277
1278static NotifierList machine_init_done_notifiers =
1279 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers);
1280
1281void qemu_add_machine_init_done_notifier(Notifier *notify)
1282{
1283 notifier_list_add(&machine_init_done_notifiers, notify);
1284 if (phase_check(PHASE_MACHINE_READY)) {
1285 notify->notify(notify, NULL);
1286 }
1287}
1288
1289void qemu_remove_machine_init_done_notifier(Notifier *notify)
1290{
1291 notifier_remove(notify);
1292}
1293
1294void qdev_machine_creation_done(void)
1295{
1296 cpu_synchronize_all_post_init();
1297
1298 if (current_machine->boot_once) {
1299 qemu_boot_set(current_machine->boot_once, &error_fatal);
1300 qemu_register_reset(restore_boot_order, g_strdup(current_machine->boot_order));
1301 }
1302
1303
1304
1305
1306
1307 phase_advance(PHASE_MACHINE_READY);
1308 qdev_assert_realized_properly();
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320 qemu_register_reset(resettable_cold_reset_fn, sysbus_get_default());
1321
1322 notifier_list_notify(&machine_init_done_notifiers, NULL);
1323
1324 if (rom_check_and_register_reset() != 0) {
1325 exit(1);
1326 }
1327
1328 replay_start();
1329
1330
1331
1332
1333 replay_checkpoint(CHECKPOINT_RESET);
1334 qemu_system_reset(SHUTDOWN_CAUSE_NONE);
1335 register_global_state();
1336}
1337
1338static const TypeInfo machine_info = {
1339 .name = TYPE_MACHINE,
1340 .parent = TYPE_OBJECT,
1341 .abstract = true,
1342 .class_size = sizeof(MachineClass),
1343 .class_init = machine_class_init,
1344 .class_base_init = machine_class_base_init,
1345 .instance_size = sizeof(MachineState),
1346 .instance_init = machine_initfn,
1347 .instance_finalize = machine_finalize,
1348};
1349
1350static void machine_register_types(void)
1351{
1352 type_register_static(&machine_info);
1353}
1354
1355type_init(machine_register_types)
1356