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20#include "qemu/osdep.h"
21#include <linux/vfio.h>
22#include "hw/ppc/spapr.h"
23#include "hw/pci-host/spapr.h"
24#include "hw/pci/msix.h"
25#include "hw/vfio/vfio.h"
26#include "qemu/error-report.h"
27
28bool spapr_phb_eeh_available(SpaprPhbState *sphb)
29{
30 return vfio_eeh_as_ok(&sphb->iommu_as);
31}
32
33static void spapr_phb_vfio_eeh_reenable(SpaprPhbState *sphb)
34{
35 vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE);
36}
37
38void spapr_phb_vfio_reset(DeviceState *qdev)
39{
40
41
42
43
44
45
46 spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev));
47}
48
49static void spapr_eeh_pci_find_device(PCIBus *bus, PCIDevice *pdev,
50 void *opaque)
51{
52 bool *found = opaque;
53
54 if (object_dynamic_cast(OBJECT(pdev), "vfio-pci")) {
55 *found = true;
56 }
57}
58
59int spapr_phb_vfio_eeh_set_option(SpaprPhbState *sphb,
60 unsigned int addr, int option)
61{
62 uint32_t op;
63 int ret;
64
65 switch (option) {
66 case RTAS_EEH_DISABLE:
67 op = VFIO_EEH_PE_DISABLE;
68 break;
69 case RTAS_EEH_ENABLE: {
70 PCIHostState *phb;
71 bool found = false;
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93 phb = PCI_HOST_BRIDGE(sphb);
94 pci_for_each_device(phb->bus, (addr >> 16) & 0xFF,
95 spapr_eeh_pci_find_device, &found);
96
97 if (!found) {
98 return RTAS_OUT_PARAM_ERROR;
99 }
100
101 op = VFIO_EEH_PE_ENABLE;
102 break;
103 }
104 case RTAS_EEH_THAW_IO:
105 op = VFIO_EEH_PE_UNFREEZE_IO;
106 break;
107 case RTAS_EEH_THAW_DMA:
108 op = VFIO_EEH_PE_UNFREEZE_DMA;
109 break;
110 default:
111 return RTAS_OUT_PARAM_ERROR;
112 }
113
114 ret = vfio_eeh_as_op(&sphb->iommu_as, op);
115 if (ret < 0) {
116 return RTAS_OUT_HW_ERROR;
117 }
118
119 return RTAS_OUT_SUCCESS;
120}
121
122int spapr_phb_vfio_eeh_get_state(SpaprPhbState *sphb, int *state)
123{
124 int ret;
125
126 ret = vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_GET_STATE);
127 if (ret < 0) {
128 return RTAS_OUT_PARAM_ERROR;
129 }
130
131 *state = ret;
132 return RTAS_OUT_SUCCESS;
133}
134
135static void spapr_phb_vfio_eeh_clear_dev_msix(PCIBus *bus,
136 PCIDevice *pdev,
137 void *opaque)
138{
139
140 if (!object_dynamic_cast(OBJECT(pdev), "vfio-pci")) {
141 return;
142 }
143
144
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147
148
149
150 if (msix_enabled(pdev)) {
151 uint16_t flags;
152
153 flags = pci_host_config_read_common(pdev,
154 pdev->msix_cap + PCI_MSIX_FLAGS,
155 pci_config_size(pdev), 2);
156 flags &= ~PCI_MSIX_FLAGS_ENABLE;
157 pci_host_config_write_common(pdev,
158 pdev->msix_cap + PCI_MSIX_FLAGS,
159 pci_config_size(pdev), flags, 2);
160 }
161
162 msix_reset(pdev);
163}
164
165static void spapr_phb_vfio_eeh_clear_bus_msix(PCIBus *bus, void *opaque)
166{
167 pci_for_each_device(bus, pci_bus_num(bus),
168 spapr_phb_vfio_eeh_clear_dev_msix, NULL);
169}
170
171static void spapr_phb_vfio_eeh_pre_reset(SpaprPhbState *sphb)
172{
173 PCIHostState *phb = PCI_HOST_BRIDGE(sphb);
174
175 pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL);
176}
177
178int spapr_phb_vfio_eeh_reset(SpaprPhbState *sphb, int option)
179{
180 uint32_t op;
181 int ret;
182
183 switch (option) {
184 case RTAS_SLOT_RESET_DEACTIVATE:
185 op = VFIO_EEH_PE_RESET_DEACTIVATE;
186 break;
187 case RTAS_SLOT_RESET_HOT:
188 spapr_phb_vfio_eeh_pre_reset(sphb);
189 op = VFIO_EEH_PE_RESET_HOT;
190 break;
191 case RTAS_SLOT_RESET_FUNDAMENTAL:
192 spapr_phb_vfio_eeh_pre_reset(sphb);
193 op = VFIO_EEH_PE_RESET_FUNDAMENTAL;
194 break;
195 default:
196 return RTAS_OUT_PARAM_ERROR;
197 }
198
199 ret = vfio_eeh_as_op(&sphb->iommu_as, op);
200 if (ret < 0) {
201 return RTAS_OUT_HW_ERROR;
202 }
203
204 return RTAS_OUT_SUCCESS;
205}
206
207int spapr_phb_vfio_eeh_configure(SpaprPhbState *sphb)
208{
209 int ret;
210
211 ret = vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_CONFIGURE);
212 if (ret < 0) {
213 return RTAS_OUT_PARAM_ERROR;
214 }
215
216 return RTAS_OUT_SUCCESS;
217}
218