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140#ifndef PPC_XIVE_H
141#define PPC_XIVE_H
142
143#include "sysemu/kvm.h"
144#include "hw/sysbus.h"
145#include "hw/ppc/xive_regs.h"
146#include "qom/object.h"
147
148
149
150
151
152typedef struct XiveNotifier XiveNotifier;
153
154#define TYPE_XIVE_NOTIFIER "xive-notifier"
155#define XIVE_NOTIFIER(obj) \
156 INTERFACE_CHECK(XiveNotifier, (obj), TYPE_XIVE_NOTIFIER)
157typedef struct XiveNotifierClass XiveNotifierClass;
158DECLARE_CLASS_CHECKERS(XiveNotifierClass, XIVE_NOTIFIER,
159 TYPE_XIVE_NOTIFIER)
160
161struct XiveNotifierClass {
162 InterfaceClass parent;
163 void (*notify)(XiveNotifier *xn, uint32_t lisn);
164};
165
166
167
168
169
170#define TYPE_XIVE_SOURCE "xive-source"
171OBJECT_DECLARE_SIMPLE_TYPE(XiveSource, XIVE_SOURCE)
172
173
174
175
176
177#define XIVE_SRC_H_INT_ESB 0x1
178#define XIVE_SRC_STORE_EOI 0x2
179
180struct XiveSource {
181 DeviceState parent;
182
183
184 uint32_t nr_irqs;
185 unsigned long *lsi_map;
186
187
188 uint8_t *status;
189
190
191 uint64_t esb_flags;
192 uint32_t esb_shift;
193 MemoryRegion esb_mmio;
194 MemoryRegion esb_mmio_emulated;
195
196
197 void *esb_mmap;
198 MemoryRegion esb_mmio_kvm;
199
200 XiveNotifier *xive;
201};
202
203
204
205
206
207
208#define XIVE_ESB_4K 12
209#define XIVE_ESB_4K_2PAGE 13
210#define XIVE_ESB_64K 16
211#define XIVE_ESB_64K_2PAGE 17
212
213static inline bool xive_source_esb_has_2page(XiveSource *xsrc)
214{
215 return xsrc->esb_shift == XIVE_ESB_64K_2PAGE ||
216 xsrc->esb_shift == XIVE_ESB_4K_2PAGE;
217}
218
219static inline size_t xive_source_esb_len(XiveSource *xsrc)
220{
221 return (1ull << xsrc->esb_shift) * xsrc->nr_irqs;
222}
223
224
225static inline hwaddr xive_source_esb_page(XiveSource *xsrc, uint32_t srcno)
226{
227 assert(srcno < xsrc->nr_irqs);
228 return (1ull << xsrc->esb_shift) * srcno;
229}
230
231
232static inline hwaddr xive_source_esb_mgmt(XiveSource *xsrc, int srcno)
233{
234 hwaddr addr = xive_source_esb_page(xsrc, srcno);
235
236 if (xive_source_esb_has_2page(xsrc)) {
237 addr += (1 << (xsrc->esb_shift - 1));
238 }
239
240 return addr;
241}
242
243
244
245
246
247
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250
251
252
253
254
255#define XIVE_STATUS_ASSERTED 0x4
256#define XIVE_ESB_VAL_P 0x2
257#define XIVE_ESB_VAL_Q 0x1
258
259#define XIVE_ESB_RESET 0x0
260#define XIVE_ESB_PENDING XIVE_ESB_VAL_P
261#define XIVE_ESB_QUEUED (XIVE_ESB_VAL_P | XIVE_ESB_VAL_Q)
262#define XIVE_ESB_OFF XIVE_ESB_VAL_Q
263
264
265
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267
268
269
270
271
272
273
274#define XIVE_ESB_STORE_EOI 0x400
275#define XIVE_ESB_LOAD_EOI 0x000
276#define XIVE_ESB_GET 0x800
277#define XIVE_ESB_SET_PQ_00 0xc00
278#define XIVE_ESB_SET_PQ_01 0xd00
279#define XIVE_ESB_SET_PQ_10 0xe00
280#define XIVE_ESB_SET_PQ_11 0xf00
281
282uint8_t xive_source_esb_get(XiveSource *xsrc, uint32_t srcno);
283uint8_t xive_source_esb_set(XiveSource *xsrc, uint32_t srcno, uint8_t pq);
284
285void xive_source_pic_print_info(XiveSource *xsrc, uint32_t offset,
286 Monitor *mon);
287
288static inline bool xive_source_irq_is_lsi(XiveSource *xsrc, uint32_t srcno)
289{
290 assert(srcno < xsrc->nr_irqs);
291 return test_bit(srcno, xsrc->lsi_map);
292}
293
294static inline void xive_source_irq_set_lsi(XiveSource *xsrc, uint32_t srcno)
295{
296 assert(srcno < xsrc->nr_irqs);
297 bitmap_set(xsrc->lsi_map, srcno, 1);
298}
299
300void xive_source_set_irq(void *opaque, int srcno, int val);
301
302
303
304
305
306#define TYPE_XIVE_TCTX "xive-tctx"
307OBJECT_DECLARE_SIMPLE_TYPE(XiveTCTX, XIVE_TCTX)
308
309
310
311
312
313
314
315
316
317#define XIVE_TM_RING_COUNT 4
318#define XIVE_TM_RING_SIZE 0x10
319
320typedef struct XivePresenter XivePresenter;
321
322struct XiveTCTX {
323 DeviceState parent_obj;
324
325 CPUState *cs;
326 qemu_irq hv_output;
327 qemu_irq os_output;
328
329 uint8_t regs[XIVE_TM_RING_COUNT * XIVE_TM_RING_SIZE];
330
331 XivePresenter *xptr;
332};
333
334
335
336
337typedef struct XiveFabric XiveFabric;
338
339struct XiveRouter {
340 SysBusDevice parent;
341
342 XiveFabric *xfb;
343};
344
345#define TYPE_XIVE_ROUTER "xive-router"
346OBJECT_DECLARE_TYPE(XiveRouter, XiveRouterClass,
347 XIVE_ROUTER)
348
349struct XiveRouterClass {
350 SysBusDeviceClass parent;
351
352
353 int (*get_eas)(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx,
354 XiveEAS *eas);
355 int (*get_end)(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
356 XiveEND *end);
357 int (*write_end)(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
358 XiveEND *end, uint8_t word_number);
359 int (*get_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
360 XiveNVT *nvt);
361 int (*write_nvt)(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
362 XiveNVT *nvt, uint8_t word_number);
363 uint8_t (*get_block_id)(XiveRouter *xrtr);
364};
365
366int xive_router_get_eas(XiveRouter *xrtr, uint8_t eas_blk, uint32_t eas_idx,
367 XiveEAS *eas);
368int xive_router_get_end(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
369 XiveEND *end);
370int xive_router_write_end(XiveRouter *xrtr, uint8_t end_blk, uint32_t end_idx,
371 XiveEND *end, uint8_t word_number);
372int xive_router_get_nvt(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
373 XiveNVT *nvt);
374int xive_router_write_nvt(XiveRouter *xrtr, uint8_t nvt_blk, uint32_t nvt_idx,
375 XiveNVT *nvt, uint8_t word_number);
376void xive_router_notify(XiveNotifier *xn, uint32_t lisn);
377
378
379
380
381
382typedef struct XiveTCTXMatch {
383 XiveTCTX *tctx;
384 uint8_t ring;
385} XiveTCTXMatch;
386
387#define TYPE_XIVE_PRESENTER "xive-presenter"
388#define XIVE_PRESENTER(obj) \
389 INTERFACE_CHECK(XivePresenter, (obj), TYPE_XIVE_PRESENTER)
390typedef struct XivePresenterClass XivePresenterClass;
391DECLARE_CLASS_CHECKERS(XivePresenterClass, XIVE_PRESENTER,
392 TYPE_XIVE_PRESENTER)
393
394struct XivePresenterClass {
395 InterfaceClass parent;
396 int (*match_nvt)(XivePresenter *xptr, uint8_t format,
397 uint8_t nvt_blk, uint32_t nvt_idx,
398 bool cam_ignore, uint8_t priority,
399 uint32_t logic_serv, XiveTCTXMatch *match);
400 bool (*in_kernel)(const XivePresenter *xptr);
401};
402
403int xive_presenter_tctx_match(XivePresenter *xptr, XiveTCTX *tctx,
404 uint8_t format,
405 uint8_t nvt_blk, uint32_t nvt_idx,
406 bool cam_ignore, uint32_t logic_serv);
407
408
409
410
411
412#define TYPE_XIVE_FABRIC "xive-fabric"
413#define XIVE_FABRIC(obj) \
414 INTERFACE_CHECK(XiveFabric, (obj), TYPE_XIVE_FABRIC)
415typedef struct XiveFabricClass XiveFabricClass;
416DECLARE_CLASS_CHECKERS(XiveFabricClass, XIVE_FABRIC,
417 TYPE_XIVE_FABRIC)
418
419struct XiveFabricClass {
420 InterfaceClass parent;
421 int (*match_nvt)(XiveFabric *xfb, uint8_t format,
422 uint8_t nvt_blk, uint32_t nvt_idx,
423 bool cam_ignore, uint8_t priority,
424 uint32_t logic_serv, XiveTCTXMatch *match);
425};
426
427
428
429
430
431#define TYPE_XIVE_END_SOURCE "xive-end-source"
432OBJECT_DECLARE_SIMPLE_TYPE(XiveENDSource, XIVE_END_SOURCE)
433
434struct XiveENDSource {
435 DeviceState parent;
436
437 uint32_t nr_ends;
438
439
440 uint32_t esb_shift;
441 MemoryRegion esb_mmio;
442
443 XiveRouter *xrtr;
444};
445
446
447
448
449
450
451#define XIVE_PRIORITY_MAX 7
452
453
454
455
456
457
458
459
460
461#define XIVE_TM_HW_PAGE 0x0
462#define XIVE_TM_HV_PAGE 0x1
463#define XIVE_TM_OS_PAGE 0x2
464#define XIVE_TM_USER_PAGE 0x3
465
466void xive_tctx_tm_write(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset,
467 uint64_t value, unsigned size);
468uint64_t xive_tctx_tm_read(XivePresenter *xptr, XiveTCTX *tctx, hwaddr offset,
469 unsigned size);
470
471void xive_tctx_pic_print_info(XiveTCTX *tctx, Monitor *mon);
472Object *xive_tctx_create(Object *cpu, XivePresenter *xptr, Error **errp);
473void xive_tctx_reset(XiveTCTX *tctx);
474void xive_tctx_destroy(XiveTCTX *tctx);
475void xive_tctx_ipb_update(XiveTCTX *tctx, uint8_t ring, uint8_t ipb);
476
477
478
479
480
481int kvmppc_xive_source_reset_one(XiveSource *xsrc, int srcno, Error **errp);
482void kvmppc_xive_source_set_irq(void *opaque, int srcno, int val);
483int kvmppc_xive_cpu_connect(XiveTCTX *tctx, Error **errp);
484int kvmppc_xive_cpu_synchronize_state(XiveTCTX *tctx, Error **errp);
485int kvmppc_xive_cpu_get_state(XiveTCTX *tctx, Error **errp);
486int kvmppc_xive_cpu_set_state(XiveTCTX *tctx, Error **errp);
487
488#endif
489