qemu/target/sparc/fop_helper.c
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   1/*
   2 * FPU op helpers
   3 *
   4 *  Copyright (c) 2003-2005 Fabrice Bellard
   5 *
   6 * This library is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU Lesser General Public
   8 * License as published by the Free Software Foundation; either
   9 * version 2.1 of the License, or (at your option) any later version.
  10 *
  11 * This library is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14 * Lesser General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU Lesser General Public
  17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18 */
  19
  20#include "qemu/osdep.h"
  21#include "cpu.h"
  22#include "exec/exec-all.h"
  23#include "exec/helper-proto.h"
  24#include "fpu/softfloat.h"
  25
  26#define QT0 (env->qt0)
  27#define QT1 (env->qt1)
  28
  29static target_ulong do_check_ieee_exceptions(CPUSPARCState *env, uintptr_t ra)
  30{
  31    target_ulong status = get_float_exception_flags(&env->fp_status);
  32    target_ulong fsr = env->fsr;
  33
  34    if (unlikely(status)) {
  35        /* Keep exception flags clear for next time.  */
  36        set_float_exception_flags(0, &env->fp_status);
  37
  38        /* Copy IEEE 754 flags into FSR */
  39        if (status & float_flag_invalid) {
  40            fsr |= FSR_NVC;
  41        }
  42        if (status & float_flag_overflow) {
  43            fsr |= FSR_OFC;
  44        }
  45        if (status & float_flag_underflow) {
  46            fsr |= FSR_UFC;
  47        }
  48        if (status & float_flag_divbyzero) {
  49            fsr |= FSR_DZC;
  50        }
  51        if (status & float_flag_inexact) {
  52            fsr |= FSR_NXC;
  53        }
  54
  55        if ((fsr & FSR_CEXC_MASK) & ((fsr & FSR_TEM_MASK) >> 23)) {
  56            CPUState *cs = env_cpu(env);
  57
  58            /* Unmasked exception, generate a trap.  Note that while
  59               the helper is marked as NO_WG, we can get away with
  60               writing to cpu state along the exception path, since
  61               TCG generated code will never see the write.  */
  62            env->fsr = fsr | FSR_FTT_IEEE_EXCP;
  63            cs->exception_index = TT_FP_EXCP;
  64            cpu_loop_exit_restore(cs, ra);
  65        } else {
  66            /* Accumulate exceptions */
  67            fsr |= (fsr & FSR_CEXC_MASK) << 5;
  68        }
  69    }
  70
  71    return fsr;
  72}
  73
  74target_ulong helper_check_ieee_exceptions(CPUSPARCState *env)
  75{
  76    return do_check_ieee_exceptions(env, GETPC());
  77}
  78
  79#define F_HELPER(name, p) void helper_f##name##p(CPUSPARCState *env)
  80
  81#define F_BINOP(name)                                           \
  82    float32 helper_f ## name ## s (CPUSPARCState *env, float32 src1, \
  83                                   float32 src2)                \
  84    {                                                           \
  85        return float32_ ## name (src1, src2, &env->fp_status);  \
  86    }                                                           \
  87    float64 helper_f ## name ## d (CPUSPARCState * env, float64 src1,\
  88                                   float64 src2)                \
  89    {                                                           \
  90        return float64_ ## name (src1, src2, &env->fp_status);  \
  91    }                                                           \
  92    F_HELPER(name, q)                                           \
  93    {                                                           \
  94        QT0 = float128_ ## name (QT0, QT1, &env->fp_status);    \
  95    }
  96
  97F_BINOP(add);
  98F_BINOP(sub);
  99F_BINOP(mul);
 100F_BINOP(div);
 101#undef F_BINOP
 102
 103float64 helper_fsmuld(CPUSPARCState *env, float32 src1, float32 src2)
 104{
 105    return float64_mul(float32_to_float64(src1, &env->fp_status),
 106                       float32_to_float64(src2, &env->fp_status),
 107                       &env->fp_status);
 108}
 109
 110void helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2)
 111{
 112    QT0 = float128_mul(float64_to_float128(src1, &env->fp_status),
 113                       float64_to_float128(src2, &env->fp_status),
 114                       &env->fp_status);
 115}
 116
 117float32 helper_fnegs(float32 src)
 118{
 119    return float32_chs(src);
 120}
 121
 122#ifdef TARGET_SPARC64
 123float64 helper_fnegd(float64 src)
 124{
 125    return float64_chs(src);
 126}
 127
 128F_HELPER(neg, q)
 129{
 130    QT0 = float128_chs(QT1);
 131}
 132#endif
 133
 134/* Integer to float conversion.  */
 135float32 helper_fitos(CPUSPARCState *env, int32_t src)
 136{
 137    return int32_to_float32(src, &env->fp_status);
 138}
 139
 140float64 helper_fitod(CPUSPARCState *env, int32_t src)
 141{
 142    return int32_to_float64(src, &env->fp_status);
 143}
 144
 145void helper_fitoq(CPUSPARCState *env, int32_t src)
 146{
 147    QT0 = int32_to_float128(src, &env->fp_status);
 148}
 149
 150#ifdef TARGET_SPARC64
 151float32 helper_fxtos(CPUSPARCState *env, int64_t src)
 152{
 153    return int64_to_float32(src, &env->fp_status);
 154}
 155
 156float64 helper_fxtod(CPUSPARCState *env, int64_t src)
 157{
 158    return int64_to_float64(src, &env->fp_status);
 159}
 160
 161void helper_fxtoq(CPUSPARCState *env, int64_t src)
 162{
 163    QT0 = int64_to_float128(src, &env->fp_status);
 164}
 165#endif
 166#undef F_HELPER
 167
 168/* floating point conversion */
 169float32 helper_fdtos(CPUSPARCState *env, float64 src)
 170{
 171    return float64_to_float32(src, &env->fp_status);
 172}
 173
 174float64 helper_fstod(CPUSPARCState *env, float32 src)
 175{
 176    return float32_to_float64(src, &env->fp_status);
 177}
 178
 179float32 helper_fqtos(CPUSPARCState *env)
 180{
 181    return float128_to_float32(QT1, &env->fp_status);
 182}
 183
 184void helper_fstoq(CPUSPARCState *env, float32 src)
 185{
 186    QT0 = float32_to_float128(src, &env->fp_status);
 187}
 188
 189float64 helper_fqtod(CPUSPARCState *env)
 190{
 191    return float128_to_float64(QT1, &env->fp_status);
 192}
 193
 194void helper_fdtoq(CPUSPARCState *env, float64 src)
 195{
 196    QT0 = float64_to_float128(src, &env->fp_status);
 197}
 198
 199/* Float to integer conversion.  */
 200int32_t helper_fstoi(CPUSPARCState *env, float32 src)
 201{
 202    return float32_to_int32_round_to_zero(src, &env->fp_status);
 203}
 204
 205int32_t helper_fdtoi(CPUSPARCState *env, float64 src)
 206{
 207    return float64_to_int32_round_to_zero(src, &env->fp_status);
 208}
 209
 210int32_t helper_fqtoi(CPUSPARCState *env)
 211{
 212    return float128_to_int32_round_to_zero(QT1, &env->fp_status);
 213}
 214
 215#ifdef TARGET_SPARC64
 216int64_t helper_fstox(CPUSPARCState *env, float32 src)
 217{
 218    return float32_to_int64_round_to_zero(src, &env->fp_status);
 219}
 220
 221int64_t helper_fdtox(CPUSPARCState *env, float64 src)
 222{
 223    return float64_to_int64_round_to_zero(src, &env->fp_status);
 224}
 225
 226int64_t helper_fqtox(CPUSPARCState *env)
 227{
 228    return float128_to_int64_round_to_zero(QT1, &env->fp_status);
 229}
 230#endif
 231
 232float32 helper_fabss(float32 src)
 233{
 234    return float32_abs(src);
 235}
 236
 237#ifdef TARGET_SPARC64
 238float64 helper_fabsd(float64 src)
 239{
 240    return float64_abs(src);
 241}
 242
 243void helper_fabsq(CPUSPARCState *env)
 244{
 245    QT0 = float128_abs(QT1);
 246}
 247#endif
 248
 249float32 helper_fsqrts(CPUSPARCState *env, float32 src)
 250{
 251    return float32_sqrt(src, &env->fp_status);
 252}
 253
 254float64 helper_fsqrtd(CPUSPARCState *env, float64 src)
 255{
 256    return float64_sqrt(src, &env->fp_status);
 257}
 258
 259void helper_fsqrtq(CPUSPARCState *env)
 260{
 261    QT0 = float128_sqrt(QT1, &env->fp_status);
 262}
 263
 264#define GEN_FCMP(name, size, reg1, reg2, FS, E)                         \
 265    target_ulong glue(helper_, name) (CPUSPARCState *env)               \
 266    {                                                                   \
 267        FloatRelation ret;                                              \
 268        target_ulong fsr;                                               \
 269        if (E) {                                                        \
 270            ret = glue(size, _compare)(reg1, reg2, &env->fp_status);    \
 271        } else {                                                        \
 272            ret = glue(size, _compare_quiet)(reg1, reg2,                \
 273                                             &env->fp_status);          \
 274        }                                                               \
 275        fsr = do_check_ieee_exceptions(env, GETPC());                   \
 276        switch (ret) {                                                  \
 277        case float_relation_unordered:                                  \
 278            fsr |= (FSR_FCC1 | FSR_FCC0) << FS;                         \
 279            fsr |= FSR_NVA;                                             \
 280            break;                                                      \
 281        case float_relation_less:                                       \
 282            fsr &= ~(FSR_FCC1) << FS;                                   \
 283            fsr |= FSR_FCC0 << FS;                                      \
 284            break;                                                      \
 285        case float_relation_greater:                                    \
 286            fsr &= ~(FSR_FCC0) << FS;                                   \
 287            fsr |= FSR_FCC1 << FS;                                      \
 288            break;                                                      \
 289        default:                                                        \
 290            fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS);                      \
 291            break;                                                      \
 292        }                                                               \
 293        return fsr;                                                     \
 294    }
 295#define GEN_FCMP_T(name, size, FS, E)                                   \
 296    target_ulong glue(helper_, name)(CPUSPARCState *env, size src1, size src2)\
 297    {                                                                   \
 298        FloatRelation ret;                                              \
 299        target_ulong fsr;                                               \
 300        if (E) {                                                        \
 301            ret = glue(size, _compare)(src1, src2, &env->fp_status);    \
 302        } else {                                                        \
 303            ret = glue(size, _compare_quiet)(src1, src2,                \
 304                                             &env->fp_status);          \
 305        }                                                               \
 306        fsr = do_check_ieee_exceptions(env, GETPC());                   \
 307        switch (ret) {                                                  \
 308        case float_relation_unordered:                                  \
 309            fsr |= (FSR_FCC1 | FSR_FCC0) << FS;                         \
 310            break;                                                      \
 311        case float_relation_less:                                       \
 312            fsr &= ~(FSR_FCC1 << FS);                                   \
 313            fsr |= FSR_FCC0 << FS;                                      \
 314            break;                                                      \
 315        case float_relation_greater:                                    \
 316            fsr &= ~(FSR_FCC0 << FS);                                   \
 317            fsr |= FSR_FCC1 << FS;                                      \
 318            break;                                                      \
 319        default:                                                        \
 320            fsr &= ~((FSR_FCC1 | FSR_FCC0) << FS);                      \
 321            break;                                                      \
 322        }                                                               \
 323        return fsr;                                                     \
 324    }
 325
 326GEN_FCMP_T(fcmps, float32, 0, 0);
 327GEN_FCMP_T(fcmpd, float64, 0, 0);
 328
 329GEN_FCMP_T(fcmpes, float32, 0, 1);
 330GEN_FCMP_T(fcmped, float64, 0, 1);
 331
 332GEN_FCMP(fcmpq, float128, QT0, QT1, 0, 0);
 333GEN_FCMP(fcmpeq, float128, QT0, QT1, 0, 1);
 334
 335#ifdef TARGET_SPARC64
 336GEN_FCMP_T(fcmps_fcc1, float32, 22, 0);
 337GEN_FCMP_T(fcmpd_fcc1, float64, 22, 0);
 338GEN_FCMP(fcmpq_fcc1, float128, QT0, QT1, 22, 0);
 339
 340GEN_FCMP_T(fcmps_fcc2, float32, 24, 0);
 341GEN_FCMP_T(fcmpd_fcc2, float64, 24, 0);
 342GEN_FCMP(fcmpq_fcc2, float128, QT0, QT1, 24, 0);
 343
 344GEN_FCMP_T(fcmps_fcc3, float32, 26, 0);
 345GEN_FCMP_T(fcmpd_fcc3, float64, 26, 0);
 346GEN_FCMP(fcmpq_fcc3, float128, QT0, QT1, 26, 0);
 347
 348GEN_FCMP_T(fcmpes_fcc1, float32, 22, 1);
 349GEN_FCMP_T(fcmped_fcc1, float64, 22, 1);
 350GEN_FCMP(fcmpeq_fcc1, float128, QT0, QT1, 22, 1);
 351
 352GEN_FCMP_T(fcmpes_fcc2, float32, 24, 1);
 353GEN_FCMP_T(fcmped_fcc2, float64, 24, 1);
 354GEN_FCMP(fcmpeq_fcc2, float128, QT0, QT1, 24, 1);
 355
 356GEN_FCMP_T(fcmpes_fcc3, float32, 26, 1);
 357GEN_FCMP_T(fcmped_fcc3, float64, 26, 1);
 358GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1);
 359#endif
 360#undef GEN_FCMP_T
 361#undef GEN_FCMP
 362
 363static void set_fsr(CPUSPARCState *env, target_ulong fsr)
 364{
 365    int rnd_mode;
 366
 367    switch (fsr & FSR_RD_MASK) {
 368    case FSR_RD_NEAREST:
 369        rnd_mode = float_round_nearest_even;
 370        break;
 371    default:
 372    case FSR_RD_ZERO:
 373        rnd_mode = float_round_to_zero;
 374        break;
 375    case FSR_RD_POS:
 376        rnd_mode = float_round_up;
 377        break;
 378    case FSR_RD_NEG:
 379        rnd_mode = float_round_down;
 380        break;
 381    }
 382    set_float_rounding_mode(rnd_mode, &env->fp_status);
 383}
 384
 385target_ulong helper_ldfsr(CPUSPARCState *env, target_ulong old_fsr,
 386                          uint32_t new_fsr)
 387{
 388    old_fsr = (new_fsr & FSR_LDFSR_MASK) | (old_fsr & FSR_LDFSR_OLDMASK);
 389    set_fsr(env, old_fsr);
 390    return old_fsr;
 391}
 392
 393#ifdef TARGET_SPARC64
 394target_ulong helper_ldxfsr(CPUSPARCState *env, target_ulong old_fsr,
 395                           uint64_t new_fsr)
 396{
 397    old_fsr = (new_fsr & FSR_LDXFSR_MASK) | (old_fsr & FSR_LDXFSR_OLDMASK);
 398    set_fsr(env, old_fsr);
 399    return old_fsr;
 400}
 401#endif
 402