qemu/softmmu/memory.c
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   1/*
   2 * Physical memory management
   3 *
   4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
   5 *
   6 * Authors:
   7 *  Avi Kivity <avi@redhat.com>
   8 *
   9 * This work is licensed under the terms of the GNU GPL, version 2.  See
  10 * the COPYING file in the top-level directory.
  11 *
  12 * Contributions after 2012-01-13 are licensed under the terms of the
  13 * GNU GPL, version 2 or (at your option) any later version.
  14 */
  15
  16#include "qemu/osdep.h"
  17#include "qemu/log.h"
  18#include "qapi/error.h"
  19#include "exec/memory.h"
  20#include "qapi/visitor.h"
  21#include "qemu/bitops.h"
  22#include "qemu/error-report.h"
  23#include "qemu/main-loop.h"
  24#include "qemu/qemu-print.h"
  25#include "qom/object.h"
  26#include "trace.h"
  27
  28#include "exec/memory-internal.h"
  29#include "exec/ram_addr.h"
  30#include "sysemu/kvm.h"
  31#include "sysemu/runstate.h"
  32#include "sysemu/tcg.h"
  33#include "qemu/accel.h"
  34#include "hw/boards.h"
  35#include "migration/vmstate.h"
  36
  37//#define DEBUG_UNASSIGNED
  38
  39static unsigned memory_region_transaction_depth;
  40static bool memory_region_update_pending;
  41static bool ioeventfd_update_pending;
  42unsigned int global_dirty_tracking;
  43
  44static QTAILQ_HEAD(, MemoryListener) memory_listeners
  45    = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  46
  47static QTAILQ_HEAD(, AddressSpace) address_spaces
  48    = QTAILQ_HEAD_INITIALIZER(address_spaces);
  49
  50static GHashTable *flat_views;
  51
  52typedef struct AddrRange AddrRange;
  53
  54/*
  55 * Note that signed integers are needed for negative offsetting in aliases
  56 * (large MemoryRegion::alias_offset).
  57 */
  58struct AddrRange {
  59    Int128 start;
  60    Int128 size;
  61};
  62
  63static AddrRange addrrange_make(Int128 start, Int128 size)
  64{
  65    return (AddrRange) { start, size };
  66}
  67
  68static bool addrrange_equal(AddrRange r1, AddrRange r2)
  69{
  70    return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  71}
  72
  73static Int128 addrrange_end(AddrRange r)
  74{
  75    return int128_add(r.start, r.size);
  76}
  77
  78static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  79{
  80    int128_addto(&range.start, delta);
  81    return range;
  82}
  83
  84static bool addrrange_contains(AddrRange range, Int128 addr)
  85{
  86    return int128_ge(addr, range.start)
  87        && int128_lt(addr, addrrange_end(range));
  88}
  89
  90static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  91{
  92    return addrrange_contains(r1, r2.start)
  93        || addrrange_contains(r2, r1.start);
  94}
  95
  96static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  97{
  98    Int128 start = int128_max(r1.start, r2.start);
  99    Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
 100    return addrrange_make(start, int128_sub(end, start));
 101}
 102
 103enum ListenerDirection { Forward, Reverse };
 104
 105#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...)    \
 106    do {                                                                \
 107        MemoryListener *_listener;                                      \
 108                                                                        \
 109        switch (_direction) {                                           \
 110        case Forward:                                                   \
 111            QTAILQ_FOREACH(_listener, &memory_listeners, link) {        \
 112                if (_listener->_callback) {                             \
 113                    _listener->_callback(_listener, ##_args);           \
 114                }                                                       \
 115            }                                                           \
 116            break;                                                      \
 117        case Reverse:                                                   \
 118            QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
 119                if (_listener->_callback) {                             \
 120                    _listener->_callback(_listener, ##_args);           \
 121                }                                                       \
 122            }                                                           \
 123            break;                                                      \
 124        default:                                                        \
 125            abort();                                                    \
 126        }                                                               \
 127    } while (0)
 128
 129#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
 130    do {                                                                \
 131        MemoryListener *_listener;                                      \
 132                                                                        \
 133        switch (_direction) {                                           \
 134        case Forward:                                                   \
 135            QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) {     \
 136                if (_listener->_callback) {                             \
 137                    _listener->_callback(_listener, _section, ##_args); \
 138                }                                                       \
 139            }                                                           \
 140            break;                                                      \
 141        case Reverse:                                                   \
 142            QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
 143                if (_listener->_callback) {                             \
 144                    _listener->_callback(_listener, _section, ##_args); \
 145                }                                                       \
 146            }                                                           \
 147            break;                                                      \
 148        default:                                                        \
 149            abort();                                                    \
 150        }                                                               \
 151    } while (0)
 152
 153/* No need to ref/unref .mr, the FlatRange keeps it alive.  */
 154#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...)  \
 155    do {                                                                \
 156        MemoryRegionSection mrs = section_from_flat_range(fr,           \
 157                address_space_to_flatview(as));                         \
 158        MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args);         \
 159    } while(0)
 160
 161struct CoalescedMemoryRange {
 162    AddrRange addr;
 163    QTAILQ_ENTRY(CoalescedMemoryRange) link;
 164};
 165
 166struct MemoryRegionIoeventfd {
 167    AddrRange addr;
 168    bool match_data;
 169    uint64_t data;
 170    EventNotifier *e;
 171};
 172
 173static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
 174                                           MemoryRegionIoeventfd *b)
 175{
 176    if (int128_lt(a->addr.start, b->addr.start)) {
 177        return true;
 178    } else if (int128_gt(a->addr.start, b->addr.start)) {
 179        return false;
 180    } else if (int128_lt(a->addr.size, b->addr.size)) {
 181        return true;
 182    } else if (int128_gt(a->addr.size, b->addr.size)) {
 183        return false;
 184    } else if (a->match_data < b->match_data) {
 185        return true;
 186    } else  if (a->match_data > b->match_data) {
 187        return false;
 188    } else if (a->match_data) {
 189        if (a->data < b->data) {
 190            return true;
 191        } else if (a->data > b->data) {
 192            return false;
 193        }
 194    }
 195    if (a->e < b->e) {
 196        return true;
 197    } else if (a->e > b->e) {
 198        return false;
 199    }
 200    return false;
 201}
 202
 203static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
 204                                          MemoryRegionIoeventfd *b)
 205{
 206    if (int128_eq(a->addr.start, b->addr.start) &&
 207        (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
 208         (int128_eq(a->addr.size, b->addr.size) &&
 209          (a->match_data == b->match_data) &&
 210          ((a->match_data && (a->data == b->data)) || !a->match_data) &&
 211          (a->e == b->e))))
 212        return true;
 213
 214    return false;
 215}
 216
 217/* Range of memory in the global map.  Addresses are absolute. */
 218struct FlatRange {
 219    MemoryRegion *mr;
 220    hwaddr offset_in_region;
 221    AddrRange addr;
 222    uint8_t dirty_log_mask;
 223    bool romd_mode;
 224    bool readonly;
 225    bool nonvolatile;
 226};
 227
 228#define FOR_EACH_FLAT_RANGE(var, view)          \
 229    for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
 230
 231static inline MemoryRegionSection
 232section_from_flat_range(FlatRange *fr, FlatView *fv)
 233{
 234    return (MemoryRegionSection) {
 235        .mr = fr->mr,
 236        .fv = fv,
 237        .offset_within_region = fr->offset_in_region,
 238        .size = fr->addr.size,
 239        .offset_within_address_space = int128_get64(fr->addr.start),
 240        .readonly = fr->readonly,
 241        .nonvolatile = fr->nonvolatile,
 242    };
 243}
 244
 245static bool flatrange_equal(FlatRange *a, FlatRange *b)
 246{
 247    return a->mr == b->mr
 248        && addrrange_equal(a->addr, b->addr)
 249        && a->offset_in_region == b->offset_in_region
 250        && a->romd_mode == b->romd_mode
 251        && a->readonly == b->readonly
 252        && a->nonvolatile == b->nonvolatile;
 253}
 254
 255static FlatView *flatview_new(MemoryRegion *mr_root)
 256{
 257    FlatView *view;
 258
 259    view = g_new0(FlatView, 1);
 260    view->ref = 1;
 261    view->root = mr_root;
 262    memory_region_ref(mr_root);
 263    trace_flatview_new(view, mr_root);
 264
 265    return view;
 266}
 267
 268/* Insert a range into a given position.  Caller is responsible for maintaining
 269 * sorting order.
 270 */
 271static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
 272{
 273    if (view->nr == view->nr_allocated) {
 274        view->nr_allocated = MAX(2 * view->nr, 10);
 275        view->ranges = g_realloc(view->ranges,
 276                                    view->nr_allocated * sizeof(*view->ranges));
 277    }
 278    memmove(view->ranges + pos + 1, view->ranges + pos,
 279            (view->nr - pos) * sizeof(FlatRange));
 280    view->ranges[pos] = *range;
 281    memory_region_ref(range->mr);
 282    ++view->nr;
 283}
 284
 285static void flatview_destroy(FlatView *view)
 286{
 287    int i;
 288
 289    trace_flatview_destroy(view, view->root);
 290    if (view->dispatch) {
 291        address_space_dispatch_free(view->dispatch);
 292    }
 293    for (i = 0; i < view->nr; i++) {
 294        memory_region_unref(view->ranges[i].mr);
 295    }
 296    g_free(view->ranges);
 297    memory_region_unref(view->root);
 298    g_free(view);
 299}
 300
 301static bool flatview_ref(FlatView *view)
 302{
 303    return qatomic_fetch_inc_nonzero(&view->ref) > 0;
 304}
 305
 306void flatview_unref(FlatView *view)
 307{
 308    if (qatomic_fetch_dec(&view->ref) == 1) {
 309        trace_flatview_destroy_rcu(view, view->root);
 310        assert(view->root);
 311        call_rcu(view, flatview_destroy, rcu);
 312    }
 313}
 314
 315static bool can_merge(FlatRange *r1, FlatRange *r2)
 316{
 317    return int128_eq(addrrange_end(r1->addr), r2->addr.start)
 318        && r1->mr == r2->mr
 319        && int128_eq(int128_add(int128_make64(r1->offset_in_region),
 320                                r1->addr.size),
 321                     int128_make64(r2->offset_in_region))
 322        && r1->dirty_log_mask == r2->dirty_log_mask
 323        && r1->romd_mode == r2->romd_mode
 324        && r1->readonly == r2->readonly
 325        && r1->nonvolatile == r2->nonvolatile;
 326}
 327
 328/* Attempt to simplify a view by merging adjacent ranges */
 329static void flatview_simplify(FlatView *view)
 330{
 331    unsigned i, j, k;
 332
 333    i = 0;
 334    while (i < view->nr) {
 335        j = i + 1;
 336        while (j < view->nr
 337               && can_merge(&view->ranges[j-1], &view->ranges[j])) {
 338            int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
 339            ++j;
 340        }
 341        ++i;
 342        for (k = i; k < j; k++) {
 343            memory_region_unref(view->ranges[k].mr);
 344        }
 345        memmove(&view->ranges[i], &view->ranges[j],
 346                (view->nr - j) * sizeof(view->ranges[j]));
 347        view->nr -= j - i;
 348    }
 349}
 350
 351static bool memory_region_big_endian(MemoryRegion *mr)
 352{
 353#ifdef TARGET_WORDS_BIGENDIAN
 354    return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
 355#else
 356    return mr->ops->endianness == DEVICE_BIG_ENDIAN;
 357#endif
 358}
 359
 360static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
 361{
 362    if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
 363        switch (op & MO_SIZE) {
 364        case MO_8:
 365            break;
 366        case MO_16:
 367            *data = bswap16(*data);
 368            break;
 369        case MO_32:
 370            *data = bswap32(*data);
 371            break;
 372        case MO_64:
 373            *data = bswap64(*data);
 374            break;
 375        default:
 376            g_assert_not_reached();
 377        }
 378    }
 379}
 380
 381static inline void memory_region_shift_read_access(uint64_t *value,
 382                                                   signed shift,
 383                                                   uint64_t mask,
 384                                                   uint64_t tmp)
 385{
 386    if (shift >= 0) {
 387        *value |= (tmp & mask) << shift;
 388    } else {
 389        *value |= (tmp & mask) >> -shift;
 390    }
 391}
 392
 393static inline uint64_t memory_region_shift_write_access(uint64_t *value,
 394                                                        signed shift,
 395                                                        uint64_t mask)
 396{
 397    uint64_t tmp;
 398
 399    if (shift >= 0) {
 400        tmp = (*value >> shift) & mask;
 401    } else {
 402        tmp = (*value << -shift) & mask;
 403    }
 404
 405    return tmp;
 406}
 407
 408static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
 409{
 410    MemoryRegion *root;
 411    hwaddr abs_addr = offset;
 412
 413    abs_addr += mr->addr;
 414    for (root = mr; root->container; ) {
 415        root = root->container;
 416        abs_addr += root->addr;
 417    }
 418
 419    return abs_addr;
 420}
 421
 422static int get_cpu_index(void)
 423{
 424    if (current_cpu) {
 425        return current_cpu->cpu_index;
 426    }
 427    return -1;
 428}
 429
 430static MemTxResult  memory_region_read_accessor(MemoryRegion *mr,
 431                                                hwaddr addr,
 432                                                uint64_t *value,
 433                                                unsigned size,
 434                                                signed shift,
 435                                                uint64_t mask,
 436                                                MemTxAttrs attrs)
 437{
 438    uint64_t tmp;
 439
 440    tmp = mr->ops->read(mr->opaque, addr, size);
 441    if (mr->subpage) {
 442        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 443    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
 444        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 445        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
 446                                     memory_region_name(mr));
 447    }
 448    memory_region_shift_read_access(value, shift, mask, tmp);
 449    return MEMTX_OK;
 450}
 451
 452static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
 453                                                          hwaddr addr,
 454                                                          uint64_t *value,
 455                                                          unsigned size,
 456                                                          signed shift,
 457                                                          uint64_t mask,
 458                                                          MemTxAttrs attrs)
 459{
 460    uint64_t tmp = 0;
 461    MemTxResult r;
 462
 463    r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
 464    if (mr->subpage) {
 465        trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
 466    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
 467        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 468        trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
 469                                     memory_region_name(mr));
 470    }
 471    memory_region_shift_read_access(value, shift, mask, tmp);
 472    return r;
 473}
 474
 475static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
 476                                                hwaddr addr,
 477                                                uint64_t *value,
 478                                                unsigned size,
 479                                                signed shift,
 480                                                uint64_t mask,
 481                                                MemTxAttrs attrs)
 482{
 483    uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
 484
 485    if (mr->subpage) {
 486        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 487    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
 488        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 489        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
 490                                      memory_region_name(mr));
 491    }
 492    mr->ops->write(mr->opaque, addr, tmp, size);
 493    return MEMTX_OK;
 494}
 495
 496static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
 497                                                           hwaddr addr,
 498                                                           uint64_t *value,
 499                                                           unsigned size,
 500                                                           signed shift,
 501                                                           uint64_t mask,
 502                                                           MemTxAttrs attrs)
 503{
 504    uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
 505
 506    if (mr->subpage) {
 507        trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
 508    } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
 509        hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
 510        trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
 511                                      memory_region_name(mr));
 512    }
 513    return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
 514}
 515
 516static MemTxResult access_with_adjusted_size(hwaddr addr,
 517                                      uint64_t *value,
 518                                      unsigned size,
 519                                      unsigned access_size_min,
 520                                      unsigned access_size_max,
 521                                      MemTxResult (*access_fn)
 522                                                  (MemoryRegion *mr,
 523                                                   hwaddr addr,
 524                                                   uint64_t *value,
 525                                                   unsigned size,
 526                                                   signed shift,
 527                                                   uint64_t mask,
 528                                                   MemTxAttrs attrs),
 529                                      MemoryRegion *mr,
 530                                      MemTxAttrs attrs)
 531{
 532    uint64_t access_mask;
 533    unsigned access_size;
 534    unsigned i;
 535    MemTxResult r = MEMTX_OK;
 536
 537    if (!access_size_min) {
 538        access_size_min = 1;
 539    }
 540    if (!access_size_max) {
 541        access_size_max = 4;
 542    }
 543
 544    /* FIXME: support unaligned access? */
 545    access_size = MAX(MIN(size, access_size_max), access_size_min);
 546    access_mask = MAKE_64BIT_MASK(0, access_size * 8);
 547    if (memory_region_big_endian(mr)) {
 548        for (i = 0; i < size; i += access_size) {
 549            r |= access_fn(mr, addr + i, value, access_size,
 550                        (size - access_size - i) * 8, access_mask, attrs);
 551        }
 552    } else {
 553        for (i = 0; i < size; i += access_size) {
 554            r |= access_fn(mr, addr + i, value, access_size, i * 8,
 555                        access_mask, attrs);
 556        }
 557    }
 558    return r;
 559}
 560
 561static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
 562{
 563    AddressSpace *as;
 564
 565    while (mr->container) {
 566        mr = mr->container;
 567    }
 568    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
 569        if (mr == as->root) {
 570            return as;
 571        }
 572    }
 573    return NULL;
 574}
 575
 576/* Render a memory region into the global view.  Ranges in @view obscure
 577 * ranges in @mr.
 578 */
 579static void render_memory_region(FlatView *view,
 580                                 MemoryRegion *mr,
 581                                 Int128 base,
 582                                 AddrRange clip,
 583                                 bool readonly,
 584                                 bool nonvolatile)
 585{
 586    MemoryRegion *subregion;
 587    unsigned i;
 588    hwaddr offset_in_region;
 589    Int128 remain;
 590    Int128 now;
 591    FlatRange fr;
 592    AddrRange tmp;
 593
 594    if (!mr->enabled) {
 595        return;
 596    }
 597
 598    int128_addto(&base, int128_make64(mr->addr));
 599    readonly |= mr->readonly;
 600    nonvolatile |= mr->nonvolatile;
 601
 602    tmp = addrrange_make(base, mr->size);
 603
 604    if (!addrrange_intersects(tmp, clip)) {
 605        return;
 606    }
 607
 608    clip = addrrange_intersection(tmp, clip);
 609
 610    if (mr->alias) {
 611        int128_subfrom(&base, int128_make64(mr->alias->addr));
 612        int128_subfrom(&base, int128_make64(mr->alias_offset));
 613        render_memory_region(view, mr->alias, base, clip,
 614                             readonly, nonvolatile);
 615        return;
 616    }
 617
 618    /* Render subregions in priority order. */
 619    QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
 620        render_memory_region(view, subregion, base, clip,
 621                             readonly, nonvolatile);
 622    }
 623
 624    if (!mr->terminates) {
 625        return;
 626    }
 627
 628    offset_in_region = int128_get64(int128_sub(clip.start, base));
 629    base = clip.start;
 630    remain = clip.size;
 631
 632    fr.mr = mr;
 633    fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
 634    fr.romd_mode = mr->romd_mode;
 635    fr.readonly = readonly;
 636    fr.nonvolatile = nonvolatile;
 637
 638    /* Render the region itself into any gaps left by the current view. */
 639    for (i = 0; i < view->nr && int128_nz(remain); ++i) {
 640        if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
 641            continue;
 642        }
 643        if (int128_lt(base, view->ranges[i].addr.start)) {
 644            now = int128_min(remain,
 645                             int128_sub(view->ranges[i].addr.start, base));
 646            fr.offset_in_region = offset_in_region;
 647            fr.addr = addrrange_make(base, now);
 648            flatview_insert(view, i, &fr);
 649            ++i;
 650            int128_addto(&base, now);
 651            offset_in_region += int128_get64(now);
 652            int128_subfrom(&remain, now);
 653        }
 654        now = int128_sub(int128_min(int128_add(base, remain),
 655                                    addrrange_end(view->ranges[i].addr)),
 656                         base);
 657        int128_addto(&base, now);
 658        offset_in_region += int128_get64(now);
 659        int128_subfrom(&remain, now);
 660    }
 661    if (int128_nz(remain)) {
 662        fr.offset_in_region = offset_in_region;
 663        fr.addr = addrrange_make(base, remain);
 664        flatview_insert(view, i, &fr);
 665    }
 666}
 667
 668void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
 669{
 670    FlatRange *fr;
 671
 672    assert(fv);
 673    assert(cb);
 674
 675    FOR_EACH_FLAT_RANGE(fr, fv) {
 676        if (cb(fr->addr.start, fr->addr.size, fr->mr,
 677               fr->offset_in_region, opaque)) {
 678            break;
 679        }
 680    }
 681}
 682
 683static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
 684{
 685    while (mr->enabled) {
 686        if (mr->alias) {
 687            if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
 688                /* The alias is included in its entirety.  Use it as
 689                 * the "real" root, so that we can share more FlatViews.
 690                 */
 691                mr = mr->alias;
 692                continue;
 693            }
 694        } else if (!mr->terminates) {
 695            unsigned int found = 0;
 696            MemoryRegion *child, *next = NULL;
 697            QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
 698                if (child->enabled) {
 699                    if (++found > 1) {
 700                        next = NULL;
 701                        break;
 702                    }
 703                    if (!child->addr && int128_ge(mr->size, child->size)) {
 704                        /* A child is included in its entirety.  If it's the only
 705                         * enabled one, use it in the hope of finding an alias down the
 706                         * way. This will also let us share FlatViews.
 707                         */
 708                        next = child;
 709                    }
 710                }
 711            }
 712            if (found == 0) {
 713                return NULL;
 714            }
 715            if (next) {
 716                mr = next;
 717                continue;
 718            }
 719        }
 720
 721        return mr;
 722    }
 723
 724    return NULL;
 725}
 726
 727/* Render a memory topology into a list of disjoint absolute ranges. */
 728static FlatView *generate_memory_topology(MemoryRegion *mr)
 729{
 730    int i;
 731    FlatView *view;
 732
 733    view = flatview_new(mr);
 734
 735    if (mr) {
 736        render_memory_region(view, mr, int128_zero(),
 737                             addrrange_make(int128_zero(), int128_2_64()),
 738                             false, false);
 739    }
 740    flatview_simplify(view);
 741
 742    view->dispatch = address_space_dispatch_new(view);
 743    for (i = 0; i < view->nr; i++) {
 744        MemoryRegionSection mrs =
 745            section_from_flat_range(&view->ranges[i], view);
 746        flatview_add_to_dispatch(view, &mrs);
 747    }
 748    address_space_dispatch_compact(view->dispatch);
 749    g_hash_table_replace(flat_views, mr, view);
 750
 751    return view;
 752}
 753
 754static void address_space_add_del_ioeventfds(AddressSpace *as,
 755                                             MemoryRegionIoeventfd *fds_new,
 756                                             unsigned fds_new_nb,
 757                                             MemoryRegionIoeventfd *fds_old,
 758                                             unsigned fds_old_nb)
 759{
 760    unsigned iold, inew;
 761    MemoryRegionIoeventfd *fd;
 762    MemoryRegionSection section;
 763
 764    /* Generate a symmetric difference of the old and new fd sets, adding
 765     * and deleting as necessary.
 766     */
 767
 768    iold = inew = 0;
 769    while (iold < fds_old_nb || inew < fds_new_nb) {
 770        if (iold < fds_old_nb
 771            && (inew == fds_new_nb
 772                || memory_region_ioeventfd_before(&fds_old[iold],
 773                                                  &fds_new[inew]))) {
 774            fd = &fds_old[iold];
 775            section = (MemoryRegionSection) {
 776                .fv = address_space_to_flatview(as),
 777                .offset_within_address_space = int128_get64(fd->addr.start),
 778                .size = fd->addr.size,
 779            };
 780            MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
 781                                 fd->match_data, fd->data, fd->e);
 782            ++iold;
 783        } else if (inew < fds_new_nb
 784                   && (iold == fds_old_nb
 785                       || memory_region_ioeventfd_before(&fds_new[inew],
 786                                                         &fds_old[iold]))) {
 787            fd = &fds_new[inew];
 788            section = (MemoryRegionSection) {
 789                .fv = address_space_to_flatview(as),
 790                .offset_within_address_space = int128_get64(fd->addr.start),
 791                .size = fd->addr.size,
 792            };
 793            MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
 794                                 fd->match_data, fd->data, fd->e);
 795            ++inew;
 796        } else {
 797            ++iold;
 798            ++inew;
 799        }
 800    }
 801}
 802
 803FlatView *address_space_get_flatview(AddressSpace *as)
 804{
 805    FlatView *view;
 806
 807    RCU_READ_LOCK_GUARD();
 808    do {
 809        view = address_space_to_flatview(as);
 810        /* If somebody has replaced as->current_map concurrently,
 811         * flatview_ref returns false.
 812         */
 813    } while (!flatview_ref(view));
 814    return view;
 815}
 816
 817static void address_space_update_ioeventfds(AddressSpace *as)
 818{
 819    FlatView *view;
 820    FlatRange *fr;
 821    unsigned ioeventfd_nb = 0;
 822    unsigned ioeventfd_max;
 823    MemoryRegionIoeventfd *ioeventfds;
 824    AddrRange tmp;
 825    unsigned i;
 826
 827    /*
 828     * It is likely that the number of ioeventfds hasn't changed much, so use
 829     * the previous size as the starting value, with some headroom to avoid
 830     * gratuitous reallocations.
 831     */
 832    ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
 833    ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
 834
 835    view = address_space_get_flatview(as);
 836    FOR_EACH_FLAT_RANGE(fr, view) {
 837        for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
 838            tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
 839                                  int128_sub(fr->addr.start,
 840                                             int128_make64(fr->offset_in_region)));
 841            if (addrrange_intersects(fr->addr, tmp)) {
 842                ++ioeventfd_nb;
 843                if (ioeventfd_nb > ioeventfd_max) {
 844                    ioeventfd_max = MAX(ioeventfd_max * 2, 4);
 845                    ioeventfds = g_realloc(ioeventfds,
 846                            ioeventfd_max * sizeof(*ioeventfds));
 847                }
 848                ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
 849                ioeventfds[ioeventfd_nb-1].addr = tmp;
 850            }
 851        }
 852    }
 853
 854    address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
 855                                     as->ioeventfds, as->ioeventfd_nb);
 856
 857    g_free(as->ioeventfds);
 858    as->ioeventfds = ioeventfds;
 859    as->ioeventfd_nb = ioeventfd_nb;
 860    flatview_unref(view);
 861}
 862
 863/*
 864 * Notify the memory listeners about the coalesced IO change events of
 865 * range `cmr'.  Only the part that has intersection of the specified
 866 * FlatRange will be sent.
 867 */
 868static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
 869                                           CoalescedMemoryRange *cmr, bool add)
 870{
 871    AddrRange tmp;
 872
 873    tmp = addrrange_shift(cmr->addr,
 874                          int128_sub(fr->addr.start,
 875                                     int128_make64(fr->offset_in_region)));
 876    if (!addrrange_intersects(tmp, fr->addr)) {
 877        return;
 878    }
 879    tmp = addrrange_intersection(tmp, fr->addr);
 880
 881    if (add) {
 882        MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
 883                                      int128_get64(tmp.start),
 884                                      int128_get64(tmp.size));
 885    } else {
 886        MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
 887                                      int128_get64(tmp.start),
 888                                      int128_get64(tmp.size));
 889    }
 890}
 891
 892static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
 893{
 894    CoalescedMemoryRange *cmr;
 895
 896    QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
 897        flat_range_coalesced_io_notify(fr, as, cmr, false);
 898    }
 899}
 900
 901static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
 902{
 903    MemoryRegion *mr = fr->mr;
 904    CoalescedMemoryRange *cmr;
 905
 906    if (QTAILQ_EMPTY(&mr->coalesced)) {
 907        return;
 908    }
 909
 910    QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
 911        flat_range_coalesced_io_notify(fr, as, cmr, true);
 912    }
 913}
 914
 915static void address_space_update_topology_pass(AddressSpace *as,
 916                                               const FlatView *old_view,
 917                                               const FlatView *new_view,
 918                                               bool adding)
 919{
 920    unsigned iold, inew;
 921    FlatRange *frold, *frnew;
 922
 923    /* Generate a symmetric difference of the old and new memory maps.
 924     * Kill ranges in the old map, and instantiate ranges in the new map.
 925     */
 926    iold = inew = 0;
 927    while (iold < old_view->nr || inew < new_view->nr) {
 928        if (iold < old_view->nr) {
 929            frold = &old_view->ranges[iold];
 930        } else {
 931            frold = NULL;
 932        }
 933        if (inew < new_view->nr) {
 934            frnew = &new_view->ranges[inew];
 935        } else {
 936            frnew = NULL;
 937        }
 938
 939        if (frold
 940            && (!frnew
 941                || int128_lt(frold->addr.start, frnew->addr.start)
 942                || (int128_eq(frold->addr.start, frnew->addr.start)
 943                    && !flatrange_equal(frold, frnew)))) {
 944            /* In old but not in new, or in both but attributes changed. */
 945
 946            if (!adding) {
 947                flat_range_coalesced_io_del(frold, as);
 948                MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
 949            }
 950
 951            ++iold;
 952        } else if (frold && frnew && flatrange_equal(frold, frnew)) {
 953            /* In both and unchanged (except logging may have changed) */
 954
 955            if (adding) {
 956                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
 957                if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
 958                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
 959                                                  frold->dirty_log_mask,
 960                                                  frnew->dirty_log_mask);
 961                }
 962                if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
 963                    MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
 964                                                  frold->dirty_log_mask,
 965                                                  frnew->dirty_log_mask);
 966                }
 967            }
 968
 969            ++iold;
 970            ++inew;
 971        } else {
 972            /* In new */
 973
 974            if (adding) {
 975                MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
 976                flat_range_coalesced_io_add(frnew, as);
 977            }
 978
 979            ++inew;
 980        }
 981    }
 982}
 983
 984static void flatviews_init(void)
 985{
 986    static FlatView *empty_view;
 987
 988    if (flat_views) {
 989        return;
 990    }
 991
 992    flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
 993                                       (GDestroyNotify) flatview_unref);
 994    if (!empty_view) {
 995        empty_view = generate_memory_topology(NULL);
 996        /* We keep it alive forever in the global variable.  */
 997        flatview_ref(empty_view);
 998    } else {
 999        g_hash_table_replace(flat_views, NULL, empty_view);
1000        flatview_ref(empty_view);
1001    }
1002}
1003
1004static void flatviews_reset(void)
1005{
1006    AddressSpace *as;
1007
1008    if (flat_views) {
1009        g_hash_table_unref(flat_views);
1010        flat_views = NULL;
1011    }
1012    flatviews_init();
1013
1014    /* Render unique FVs */
1015    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1016        MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1017
1018        if (g_hash_table_lookup(flat_views, physmr)) {
1019            continue;
1020        }
1021
1022        generate_memory_topology(physmr);
1023    }
1024}
1025
1026static void address_space_set_flatview(AddressSpace *as)
1027{
1028    FlatView *old_view = address_space_to_flatview(as);
1029    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1030    FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1031
1032    assert(new_view);
1033
1034    if (old_view == new_view) {
1035        return;
1036    }
1037
1038    if (old_view) {
1039        flatview_ref(old_view);
1040    }
1041
1042    flatview_ref(new_view);
1043
1044    if (!QTAILQ_EMPTY(&as->listeners)) {
1045        FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1046
1047        if (!old_view2) {
1048            old_view2 = &tmpview;
1049        }
1050        address_space_update_topology_pass(as, old_view2, new_view, false);
1051        address_space_update_topology_pass(as, old_view2, new_view, true);
1052    }
1053
1054    /* Writes are protected by the BQL.  */
1055    qatomic_rcu_set(&as->current_map, new_view);
1056    if (old_view) {
1057        flatview_unref(old_view);
1058    }
1059
1060    /* Note that all the old MemoryRegions are still alive up to this
1061     * point.  This relieves most MemoryListeners from the need to
1062     * ref/unref the MemoryRegions they get---unless they use them
1063     * outside the iothread mutex, in which case precise reference
1064     * counting is necessary.
1065     */
1066    if (old_view) {
1067        flatview_unref(old_view);
1068    }
1069}
1070
1071static void address_space_update_topology(AddressSpace *as)
1072{
1073    MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1074
1075    flatviews_init();
1076    if (!g_hash_table_lookup(flat_views, physmr)) {
1077        generate_memory_topology(physmr);
1078    }
1079    address_space_set_flatview(as);
1080}
1081
1082void memory_region_transaction_begin(void)
1083{
1084    qemu_flush_coalesced_mmio_buffer();
1085    ++memory_region_transaction_depth;
1086}
1087
1088void memory_region_transaction_commit(void)
1089{
1090    AddressSpace *as;
1091
1092    assert(memory_region_transaction_depth);
1093    assert(qemu_mutex_iothread_locked());
1094
1095    --memory_region_transaction_depth;
1096    if (!memory_region_transaction_depth) {
1097        if (memory_region_update_pending) {
1098            flatviews_reset();
1099
1100            MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1101
1102            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1103                address_space_set_flatview(as);
1104                address_space_update_ioeventfds(as);
1105            }
1106            memory_region_update_pending = false;
1107            ioeventfd_update_pending = false;
1108            MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1109        } else if (ioeventfd_update_pending) {
1110            QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1111                address_space_update_ioeventfds(as);
1112            }
1113            ioeventfd_update_pending = false;
1114        }
1115   }
1116}
1117
1118static void memory_region_destructor_none(MemoryRegion *mr)
1119{
1120}
1121
1122static void memory_region_destructor_ram(MemoryRegion *mr)
1123{
1124    qemu_ram_free(mr->ram_block);
1125}
1126
1127static bool memory_region_need_escape(char c)
1128{
1129    return c == '/' || c == '[' || c == '\\' || c == ']';
1130}
1131
1132static char *memory_region_escape_name(const char *name)
1133{
1134    const char *p;
1135    char *escaped, *q;
1136    uint8_t c;
1137    size_t bytes = 0;
1138
1139    for (p = name; *p; p++) {
1140        bytes += memory_region_need_escape(*p) ? 4 : 1;
1141    }
1142    if (bytes == p - name) {
1143       return g_memdup(name, bytes + 1);
1144    }
1145
1146    escaped = g_malloc(bytes + 1);
1147    for (p = name, q = escaped; *p; p++) {
1148        c = *p;
1149        if (unlikely(memory_region_need_escape(c))) {
1150            *q++ = '\\';
1151            *q++ = 'x';
1152            *q++ = "0123456789abcdef"[c >> 4];
1153            c = "0123456789abcdef"[c & 15];
1154        }
1155        *q++ = c;
1156    }
1157    *q = 0;
1158    return escaped;
1159}
1160
1161static void memory_region_do_init(MemoryRegion *mr,
1162                                  Object *owner,
1163                                  const char *name,
1164                                  uint64_t size)
1165{
1166    mr->size = int128_make64(size);
1167    if (size == UINT64_MAX) {
1168        mr->size = int128_2_64();
1169    }
1170    mr->name = g_strdup(name);
1171    mr->owner = owner;
1172    mr->ram_block = NULL;
1173
1174    if (name) {
1175        char *escaped_name = memory_region_escape_name(name);
1176        char *name_array = g_strdup_printf("%s[*]", escaped_name);
1177
1178        if (!owner) {
1179            owner = container_get(qdev_get_machine(), "/unattached");
1180        }
1181
1182        object_property_add_child(owner, name_array, OBJECT(mr));
1183        object_unref(OBJECT(mr));
1184        g_free(name_array);
1185        g_free(escaped_name);
1186    }
1187}
1188
1189void memory_region_init(MemoryRegion *mr,
1190                        Object *owner,
1191                        const char *name,
1192                        uint64_t size)
1193{
1194    object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1195    memory_region_do_init(mr, owner, name, size);
1196}
1197
1198static void memory_region_get_container(Object *obj, Visitor *v,
1199                                        const char *name, void *opaque,
1200                                        Error **errp)
1201{
1202    MemoryRegion *mr = MEMORY_REGION(obj);
1203    char *path = (char *)"";
1204
1205    if (mr->container) {
1206        path = object_get_canonical_path(OBJECT(mr->container));
1207    }
1208    visit_type_str(v, name, &path, errp);
1209    if (mr->container) {
1210        g_free(path);
1211    }
1212}
1213
1214static Object *memory_region_resolve_container(Object *obj, void *opaque,
1215                                               const char *part)
1216{
1217    MemoryRegion *mr = MEMORY_REGION(obj);
1218
1219    return OBJECT(mr->container);
1220}
1221
1222static void memory_region_get_priority(Object *obj, Visitor *v,
1223                                       const char *name, void *opaque,
1224                                       Error **errp)
1225{
1226    MemoryRegion *mr = MEMORY_REGION(obj);
1227    int32_t value = mr->priority;
1228
1229    visit_type_int32(v, name, &value, errp);
1230}
1231
1232static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1233                                   void *opaque, Error **errp)
1234{
1235    MemoryRegion *mr = MEMORY_REGION(obj);
1236    uint64_t value = memory_region_size(mr);
1237
1238    visit_type_uint64(v, name, &value, errp);
1239}
1240
1241static void memory_region_initfn(Object *obj)
1242{
1243    MemoryRegion *mr = MEMORY_REGION(obj);
1244    ObjectProperty *op;
1245
1246    mr->ops = &unassigned_mem_ops;
1247    mr->enabled = true;
1248    mr->romd_mode = true;
1249    mr->destructor = memory_region_destructor_none;
1250    QTAILQ_INIT(&mr->subregions);
1251    QTAILQ_INIT(&mr->coalesced);
1252
1253    op = object_property_add(OBJECT(mr), "container",
1254                             "link<" TYPE_MEMORY_REGION ">",
1255                             memory_region_get_container,
1256                             NULL, /* memory_region_set_container */
1257                             NULL, NULL);
1258    op->resolve = memory_region_resolve_container;
1259
1260    object_property_add_uint64_ptr(OBJECT(mr), "addr",
1261                                   &mr->addr, OBJ_PROP_FLAG_READ);
1262    object_property_add(OBJECT(mr), "priority", "uint32",
1263                        memory_region_get_priority,
1264                        NULL, /* memory_region_set_priority */
1265                        NULL, NULL);
1266    object_property_add(OBJECT(mr), "size", "uint64",
1267                        memory_region_get_size,
1268                        NULL, /* memory_region_set_size, */
1269                        NULL, NULL);
1270}
1271
1272static void iommu_memory_region_initfn(Object *obj)
1273{
1274    MemoryRegion *mr = MEMORY_REGION(obj);
1275
1276    mr->is_iommu = true;
1277}
1278
1279static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1280                                    unsigned size)
1281{
1282#ifdef DEBUG_UNASSIGNED
1283    printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1284#endif
1285    return 0;
1286}
1287
1288static void unassigned_mem_write(void *opaque, hwaddr addr,
1289                                 uint64_t val, unsigned size)
1290{
1291#ifdef DEBUG_UNASSIGNED
1292    printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1293#endif
1294}
1295
1296static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1297                                   unsigned size, bool is_write,
1298                                   MemTxAttrs attrs)
1299{
1300    return false;
1301}
1302
1303const MemoryRegionOps unassigned_mem_ops = {
1304    .valid.accepts = unassigned_mem_accepts,
1305    .endianness = DEVICE_NATIVE_ENDIAN,
1306};
1307
1308static uint64_t memory_region_ram_device_read(void *opaque,
1309                                              hwaddr addr, unsigned size)
1310{
1311    MemoryRegion *mr = opaque;
1312    uint64_t data = (uint64_t)~0;
1313
1314    switch (size) {
1315    case 1:
1316        data = *(uint8_t *)(mr->ram_block->host + addr);
1317        break;
1318    case 2:
1319        data = *(uint16_t *)(mr->ram_block->host + addr);
1320        break;
1321    case 4:
1322        data = *(uint32_t *)(mr->ram_block->host + addr);
1323        break;
1324    case 8:
1325        data = *(uint64_t *)(mr->ram_block->host + addr);
1326        break;
1327    }
1328
1329    trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1330
1331    return data;
1332}
1333
1334static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1335                                           uint64_t data, unsigned size)
1336{
1337    MemoryRegion *mr = opaque;
1338
1339    trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1340
1341    switch (size) {
1342    case 1:
1343        *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1344        break;
1345    case 2:
1346        *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1347        break;
1348    case 4:
1349        *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1350        break;
1351    case 8:
1352        *(uint64_t *)(mr->ram_block->host + addr) = data;
1353        break;
1354    }
1355}
1356
1357static const MemoryRegionOps ram_device_mem_ops = {
1358    .read = memory_region_ram_device_read,
1359    .write = memory_region_ram_device_write,
1360    .endianness = DEVICE_HOST_ENDIAN,
1361    .valid = {
1362        .min_access_size = 1,
1363        .max_access_size = 8,
1364        .unaligned = true,
1365    },
1366    .impl = {
1367        .min_access_size = 1,
1368        .max_access_size = 8,
1369        .unaligned = true,
1370    },
1371};
1372
1373bool memory_region_access_valid(MemoryRegion *mr,
1374                                hwaddr addr,
1375                                unsigned size,
1376                                bool is_write,
1377                                MemTxAttrs attrs)
1378{
1379    if (mr->ops->valid.accepts
1380        && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1381        qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1382                      ", size %u, region '%s', reason: rejected\n",
1383                      is_write ? "write" : "read",
1384                      addr, size, memory_region_name(mr));
1385        return false;
1386    }
1387
1388    if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1389        qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1390                      ", size %u, region '%s', reason: unaligned\n",
1391                      is_write ? "write" : "read",
1392                      addr, size, memory_region_name(mr));
1393        return false;
1394    }
1395
1396    /* Treat zero as compatibility all valid */
1397    if (!mr->ops->valid.max_access_size) {
1398        return true;
1399    }
1400
1401    if (size > mr->ops->valid.max_access_size
1402        || size < mr->ops->valid.min_access_size) {
1403        qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1404                      ", size %u, region '%s', reason: invalid size "
1405                      "(min:%u max:%u)\n",
1406                      is_write ? "write" : "read",
1407                      addr, size, memory_region_name(mr),
1408                      mr->ops->valid.min_access_size,
1409                      mr->ops->valid.max_access_size);
1410        return false;
1411    }
1412    return true;
1413}
1414
1415static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1416                                                hwaddr addr,
1417                                                uint64_t *pval,
1418                                                unsigned size,
1419                                                MemTxAttrs attrs)
1420{
1421    *pval = 0;
1422
1423    if (mr->ops->read) {
1424        return access_with_adjusted_size(addr, pval, size,
1425                                         mr->ops->impl.min_access_size,
1426                                         mr->ops->impl.max_access_size,
1427                                         memory_region_read_accessor,
1428                                         mr, attrs);
1429    } else {
1430        return access_with_adjusted_size(addr, pval, size,
1431                                         mr->ops->impl.min_access_size,
1432                                         mr->ops->impl.max_access_size,
1433                                         memory_region_read_with_attrs_accessor,
1434                                         mr, attrs);
1435    }
1436}
1437
1438MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1439                                        hwaddr addr,
1440                                        uint64_t *pval,
1441                                        MemOp op,
1442                                        MemTxAttrs attrs)
1443{
1444    unsigned size = memop_size(op);
1445    MemTxResult r;
1446
1447    if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1448        *pval = unassigned_mem_read(mr, addr, size);
1449        return MEMTX_DECODE_ERROR;
1450    }
1451
1452    r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1453    adjust_endianness(mr, pval, op);
1454    return r;
1455}
1456
1457/* Return true if an eventfd was signalled */
1458static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1459                                                    hwaddr addr,
1460                                                    uint64_t data,
1461                                                    unsigned size,
1462                                                    MemTxAttrs attrs)
1463{
1464    MemoryRegionIoeventfd ioeventfd = {
1465        .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1466        .data = data,
1467    };
1468    unsigned i;
1469
1470    for (i = 0; i < mr->ioeventfd_nb; i++) {
1471        ioeventfd.match_data = mr->ioeventfds[i].match_data;
1472        ioeventfd.e = mr->ioeventfds[i].e;
1473
1474        if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1475            event_notifier_set(ioeventfd.e);
1476            return true;
1477        }
1478    }
1479
1480    return false;
1481}
1482
1483MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1484                                         hwaddr addr,
1485                                         uint64_t data,
1486                                         MemOp op,
1487                                         MemTxAttrs attrs)
1488{
1489    unsigned size = memop_size(op);
1490
1491    if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1492        unassigned_mem_write(mr, addr, data, size);
1493        return MEMTX_DECODE_ERROR;
1494    }
1495
1496    adjust_endianness(mr, &data, op);
1497
1498    if ((!kvm_eventfds_enabled()) &&
1499        memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1500        return MEMTX_OK;
1501    }
1502
1503    if (mr->ops->write) {
1504        return access_with_adjusted_size(addr, &data, size,
1505                                         mr->ops->impl.min_access_size,
1506                                         mr->ops->impl.max_access_size,
1507                                         memory_region_write_accessor, mr,
1508                                         attrs);
1509    } else {
1510        return
1511            access_with_adjusted_size(addr, &data, size,
1512                                      mr->ops->impl.min_access_size,
1513                                      mr->ops->impl.max_access_size,
1514                                      memory_region_write_with_attrs_accessor,
1515                                      mr, attrs);
1516    }
1517}
1518
1519void memory_region_init_io(MemoryRegion *mr,
1520                           Object *owner,
1521                           const MemoryRegionOps *ops,
1522                           void *opaque,
1523                           const char *name,
1524                           uint64_t size)
1525{
1526    memory_region_init(mr, owner, name, size);
1527    mr->ops = ops ? ops : &unassigned_mem_ops;
1528    mr->opaque = opaque;
1529    mr->terminates = true;
1530}
1531
1532void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1533                                      Object *owner,
1534                                      const char *name,
1535                                      uint64_t size,
1536                                      Error **errp)
1537{
1538    memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1539}
1540
1541void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1542                                            Object *owner,
1543                                            const char *name,
1544                                            uint64_t size,
1545                                            uint32_t ram_flags,
1546                                            Error **errp)
1547{
1548    Error *err = NULL;
1549    memory_region_init(mr, owner, name, size);
1550    mr->ram = true;
1551    mr->terminates = true;
1552    mr->destructor = memory_region_destructor_ram;
1553    mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1554    if (err) {
1555        mr->size = int128_zero();
1556        object_unparent(OBJECT(mr));
1557        error_propagate(errp, err);
1558    }
1559}
1560
1561void memory_region_init_resizeable_ram(MemoryRegion *mr,
1562                                       Object *owner,
1563                                       const char *name,
1564                                       uint64_t size,
1565                                       uint64_t max_size,
1566                                       void (*resized)(const char*,
1567                                                       uint64_t length,
1568                                                       void *host),
1569                                       Error **errp)
1570{
1571    Error *err = NULL;
1572    memory_region_init(mr, owner, name, size);
1573    mr->ram = true;
1574    mr->terminates = true;
1575    mr->destructor = memory_region_destructor_ram;
1576    mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1577                                              mr, &err);
1578    if (err) {
1579        mr->size = int128_zero();
1580        object_unparent(OBJECT(mr));
1581        error_propagate(errp, err);
1582    }
1583}
1584
1585#ifdef CONFIG_POSIX
1586void memory_region_init_ram_from_file(MemoryRegion *mr,
1587                                      Object *owner,
1588                                      const char *name,
1589                                      uint64_t size,
1590                                      uint64_t align,
1591                                      uint32_t ram_flags,
1592                                      const char *path,
1593                                      bool readonly,
1594                                      Error **errp)
1595{
1596    Error *err = NULL;
1597    memory_region_init(mr, owner, name, size);
1598    mr->ram = true;
1599    mr->readonly = readonly;
1600    mr->terminates = true;
1601    mr->destructor = memory_region_destructor_ram;
1602    mr->align = align;
1603    mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1604                                             readonly, &err);
1605    if (err) {
1606        mr->size = int128_zero();
1607        object_unparent(OBJECT(mr));
1608        error_propagate(errp, err);
1609    }
1610}
1611
1612void memory_region_init_ram_from_fd(MemoryRegion *mr,
1613                                    Object *owner,
1614                                    const char *name,
1615                                    uint64_t size,
1616                                    uint32_t ram_flags,
1617                                    int fd,
1618                                    ram_addr_t offset,
1619                                    Error **errp)
1620{
1621    Error *err = NULL;
1622    memory_region_init(mr, owner, name, size);
1623    mr->ram = true;
1624    mr->terminates = true;
1625    mr->destructor = memory_region_destructor_ram;
1626    mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1627                                           false, &err);
1628    if (err) {
1629        mr->size = int128_zero();
1630        object_unparent(OBJECT(mr));
1631        error_propagate(errp, err);
1632    }
1633}
1634#endif
1635
1636void memory_region_init_ram_ptr(MemoryRegion *mr,
1637                                Object *owner,
1638                                const char *name,
1639                                uint64_t size,
1640                                void *ptr)
1641{
1642    memory_region_init(mr, owner, name, size);
1643    mr->ram = true;
1644    mr->terminates = true;
1645    mr->destructor = memory_region_destructor_ram;
1646
1647    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1648    assert(ptr != NULL);
1649    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1650}
1651
1652void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1653                                       Object *owner,
1654                                       const char *name,
1655                                       uint64_t size,
1656                                       void *ptr)
1657{
1658    memory_region_init(mr, owner, name, size);
1659    mr->ram = true;
1660    mr->terminates = true;
1661    mr->ram_device = true;
1662    mr->ops = &ram_device_mem_ops;
1663    mr->opaque = mr;
1664    mr->destructor = memory_region_destructor_ram;
1665
1666    /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL.  */
1667    assert(ptr != NULL);
1668    mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1669}
1670
1671void memory_region_init_alias(MemoryRegion *mr,
1672                              Object *owner,
1673                              const char *name,
1674                              MemoryRegion *orig,
1675                              hwaddr offset,
1676                              uint64_t size)
1677{
1678    memory_region_init(mr, owner, name, size);
1679    mr->alias = orig;
1680    mr->alias_offset = offset;
1681}
1682
1683void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1684                                      Object *owner,
1685                                      const char *name,
1686                                      uint64_t size,
1687                                      Error **errp)
1688{
1689    memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1690    mr->readonly = true;
1691}
1692
1693void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1694                                             Object *owner,
1695                                             const MemoryRegionOps *ops,
1696                                             void *opaque,
1697                                             const char *name,
1698                                             uint64_t size,
1699                                             Error **errp)
1700{
1701    Error *err = NULL;
1702    assert(ops);
1703    memory_region_init(mr, owner, name, size);
1704    mr->ops = ops;
1705    mr->opaque = opaque;
1706    mr->terminates = true;
1707    mr->rom_device = true;
1708    mr->destructor = memory_region_destructor_ram;
1709    mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1710    if (err) {
1711        mr->size = int128_zero();
1712        object_unparent(OBJECT(mr));
1713        error_propagate(errp, err);
1714    }
1715}
1716
1717void memory_region_init_iommu(void *_iommu_mr,
1718                              size_t instance_size,
1719                              const char *mrtypename,
1720                              Object *owner,
1721                              const char *name,
1722                              uint64_t size)
1723{
1724    struct IOMMUMemoryRegion *iommu_mr;
1725    struct MemoryRegion *mr;
1726
1727    object_initialize(_iommu_mr, instance_size, mrtypename);
1728    mr = MEMORY_REGION(_iommu_mr);
1729    memory_region_do_init(mr, owner, name, size);
1730    iommu_mr = IOMMU_MEMORY_REGION(mr);
1731    mr->terminates = true;  /* then re-forwards */
1732    QLIST_INIT(&iommu_mr->iommu_notify);
1733    iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1734}
1735
1736static void memory_region_finalize(Object *obj)
1737{
1738    MemoryRegion *mr = MEMORY_REGION(obj);
1739
1740    assert(!mr->container);
1741
1742    /* We know the region is not visible in any address space (it
1743     * does not have a container and cannot be a root either because
1744     * it has no references, so we can blindly clear mr->enabled.
1745     * memory_region_set_enabled instead could trigger a transaction
1746     * and cause an infinite loop.
1747     */
1748    mr->enabled = false;
1749    memory_region_transaction_begin();
1750    while (!QTAILQ_EMPTY(&mr->subregions)) {
1751        MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1752        memory_region_del_subregion(mr, subregion);
1753    }
1754    memory_region_transaction_commit();
1755
1756    mr->destructor(mr);
1757    memory_region_clear_coalescing(mr);
1758    g_free((char *)mr->name);
1759    g_free(mr->ioeventfds);
1760}
1761
1762Object *memory_region_owner(MemoryRegion *mr)
1763{
1764    Object *obj = OBJECT(mr);
1765    return obj->parent;
1766}
1767
1768void memory_region_ref(MemoryRegion *mr)
1769{
1770    /* MMIO callbacks most likely will access data that belongs
1771     * to the owner, hence the need to ref/unref the owner whenever
1772     * the memory region is in use.
1773     *
1774     * The memory region is a child of its owner.  As long as the
1775     * owner doesn't call unparent itself on the memory region,
1776     * ref-ing the owner will also keep the memory region alive.
1777     * Memory regions without an owner are supposed to never go away;
1778     * we do not ref/unref them because it slows down DMA sensibly.
1779     */
1780    if (mr && mr->owner) {
1781        object_ref(mr->owner);
1782    }
1783}
1784
1785void memory_region_unref(MemoryRegion *mr)
1786{
1787    if (mr && mr->owner) {
1788        object_unref(mr->owner);
1789    }
1790}
1791
1792uint64_t memory_region_size(MemoryRegion *mr)
1793{
1794    if (int128_eq(mr->size, int128_2_64())) {
1795        return UINT64_MAX;
1796    }
1797    return int128_get64(mr->size);
1798}
1799
1800const char *memory_region_name(const MemoryRegion *mr)
1801{
1802    if (!mr->name) {
1803        ((MemoryRegion *)mr)->name =
1804            g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1805    }
1806    return mr->name;
1807}
1808
1809bool memory_region_is_ram_device(MemoryRegion *mr)
1810{
1811    return mr->ram_device;
1812}
1813
1814bool memory_region_is_protected(MemoryRegion *mr)
1815{
1816    return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1817}
1818
1819uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1820{
1821    uint8_t mask = mr->dirty_log_mask;
1822    RAMBlock *rb = mr->ram_block;
1823
1824    if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1825                             memory_region_is_iommu(mr))) {
1826        mask |= (1 << DIRTY_MEMORY_MIGRATION);
1827    }
1828
1829    if (tcg_enabled() && rb) {
1830        /* TCG only cares about dirty memory logging for RAM, not IOMMU.  */
1831        mask |= (1 << DIRTY_MEMORY_CODE);
1832    }
1833    return mask;
1834}
1835
1836bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1837{
1838    return memory_region_get_dirty_log_mask(mr) & (1 << client);
1839}
1840
1841static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1842                                                   Error **errp)
1843{
1844    IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1845    IOMMUNotifier *iommu_notifier;
1846    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1847    int ret = 0;
1848
1849    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1850        flags |= iommu_notifier->notifier_flags;
1851    }
1852
1853    if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1854        ret = imrc->notify_flag_changed(iommu_mr,
1855                                        iommu_mr->iommu_notify_flags,
1856                                        flags, errp);
1857    }
1858
1859    if (!ret) {
1860        iommu_mr->iommu_notify_flags = flags;
1861    }
1862    return ret;
1863}
1864
1865int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1866                                           uint64_t page_size_mask,
1867                                           Error **errp)
1868{
1869    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1870    int ret = 0;
1871
1872    if (imrc->iommu_set_page_size_mask) {
1873        ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1874    }
1875    return ret;
1876}
1877
1878int memory_region_register_iommu_notifier(MemoryRegion *mr,
1879                                          IOMMUNotifier *n, Error **errp)
1880{
1881    IOMMUMemoryRegion *iommu_mr;
1882    int ret;
1883
1884    if (mr->alias) {
1885        return memory_region_register_iommu_notifier(mr->alias, n, errp);
1886    }
1887
1888    /* We need to register for at least one bitfield */
1889    iommu_mr = IOMMU_MEMORY_REGION(mr);
1890    assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1891    assert(n->start <= n->end);
1892    assert(n->iommu_idx >= 0 &&
1893           n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1894
1895    QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1896    ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1897    if (ret) {
1898        QLIST_REMOVE(n, node);
1899    }
1900    return ret;
1901}
1902
1903uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1904{
1905    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1906
1907    if (imrc->get_min_page_size) {
1908        return imrc->get_min_page_size(iommu_mr);
1909    }
1910    return TARGET_PAGE_SIZE;
1911}
1912
1913void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1914{
1915    MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1916    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1917    hwaddr addr, granularity;
1918    IOMMUTLBEntry iotlb;
1919
1920    /* If the IOMMU has its own replay callback, override */
1921    if (imrc->replay) {
1922        imrc->replay(iommu_mr, n);
1923        return;
1924    }
1925
1926    granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1927
1928    for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1929        iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1930        if (iotlb.perm != IOMMU_NONE) {
1931            n->notify(n, &iotlb);
1932        }
1933
1934        /* if (2^64 - MR size) < granularity, it's possible to get an
1935         * infinite loop here.  This should catch such a wraparound */
1936        if ((addr + granularity) < addr) {
1937            break;
1938        }
1939    }
1940}
1941
1942void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1943                                             IOMMUNotifier *n)
1944{
1945    IOMMUMemoryRegion *iommu_mr;
1946
1947    if (mr->alias) {
1948        memory_region_unregister_iommu_notifier(mr->alias, n);
1949        return;
1950    }
1951    QLIST_REMOVE(n, node);
1952    iommu_mr = IOMMU_MEMORY_REGION(mr);
1953    memory_region_update_iommu_notify_flags(iommu_mr, NULL);
1954}
1955
1956void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
1957                                    IOMMUTLBEvent *event)
1958{
1959    IOMMUTLBEntry *entry = &event->entry;
1960    hwaddr entry_end = entry->iova + entry->addr_mask;
1961    IOMMUTLBEntry tmp = *entry;
1962
1963    if (event->type == IOMMU_NOTIFIER_UNMAP) {
1964        assert(entry->perm == IOMMU_NONE);
1965    }
1966
1967    /*
1968     * Skip the notification if the notification does not overlap
1969     * with registered range.
1970     */
1971    if (notifier->start > entry_end || notifier->end < entry->iova) {
1972        return;
1973    }
1974
1975    if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
1976        /* Crop (iova, addr_mask) to range */
1977        tmp.iova = MAX(tmp.iova, notifier->start);
1978        tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
1979    } else {
1980        assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1981    }
1982
1983    if (event->type & notifier->notifier_flags) {
1984        notifier->notify(notifier, &tmp);
1985    }
1986}
1987
1988void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
1989                                int iommu_idx,
1990                                IOMMUTLBEvent event)
1991{
1992    IOMMUNotifier *iommu_notifier;
1993
1994    assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
1995
1996    IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1997        if (iommu_notifier->iommu_idx == iommu_idx) {
1998            memory_region_notify_iommu_one(iommu_notifier, &event);
1999        }
2000    }
2001}
2002
2003int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2004                                 enum IOMMUMemoryRegionAttr attr,
2005                                 void *data)
2006{
2007    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2008
2009    if (!imrc->get_attr) {
2010        return -EINVAL;
2011    }
2012
2013    return imrc->get_attr(iommu_mr, attr, data);
2014}
2015
2016int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2017                                       MemTxAttrs attrs)
2018{
2019    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2020
2021    if (!imrc->attrs_to_index) {
2022        return 0;
2023    }
2024
2025    return imrc->attrs_to_index(iommu_mr, attrs);
2026}
2027
2028int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2029{
2030    IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2031
2032    if (!imrc->num_indexes) {
2033        return 1;
2034    }
2035
2036    return imrc->num_indexes(iommu_mr);
2037}
2038
2039RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2040{
2041    if (!memory_region_is_mapped(mr) || !memory_region_is_ram(mr)) {
2042        return NULL;
2043    }
2044    return mr->rdm;
2045}
2046
2047void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2048                                           RamDiscardManager *rdm)
2049{
2050    g_assert(memory_region_is_ram(mr) && !memory_region_is_mapped(mr));
2051    g_assert(!rdm || !mr->rdm);
2052    mr->rdm = rdm;
2053}
2054
2055uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2056                                                 const MemoryRegion *mr)
2057{
2058    RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2059
2060    g_assert(rdmc->get_min_granularity);
2061    return rdmc->get_min_granularity(rdm, mr);
2062}
2063
2064bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2065                                      const MemoryRegionSection *section)
2066{
2067    RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2068
2069    g_assert(rdmc->is_populated);
2070    return rdmc->is_populated(rdm, section);
2071}
2072
2073int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2074                                         MemoryRegionSection *section,
2075                                         ReplayRamPopulate replay_fn,
2076                                         void *opaque)
2077{
2078    RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2079
2080    g_assert(rdmc->replay_populated);
2081    return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2082}
2083
2084void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2085                                          MemoryRegionSection *section,
2086                                          ReplayRamDiscard replay_fn,
2087                                          void *opaque)
2088{
2089    RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2090
2091    g_assert(rdmc->replay_discarded);
2092    rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2093}
2094
2095void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2096                                           RamDiscardListener *rdl,
2097                                           MemoryRegionSection *section)
2098{
2099    RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2100
2101    g_assert(rdmc->register_listener);
2102    rdmc->register_listener(rdm, rdl, section);
2103}
2104
2105void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2106                                             RamDiscardListener *rdl)
2107{
2108    RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2109
2110    g_assert(rdmc->unregister_listener);
2111    rdmc->unregister_listener(rdm, rdl);
2112}
2113
2114void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2115{
2116    uint8_t mask = 1 << client;
2117    uint8_t old_logging;
2118
2119    assert(client == DIRTY_MEMORY_VGA);
2120    old_logging = mr->vga_logging_count;
2121    mr->vga_logging_count += log ? 1 : -1;
2122    if (!!old_logging == !!mr->vga_logging_count) {
2123        return;
2124    }
2125
2126    memory_region_transaction_begin();
2127    mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2128    memory_region_update_pending |= mr->enabled;
2129    memory_region_transaction_commit();
2130}
2131
2132void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2133                             hwaddr size)
2134{
2135    assert(mr->ram_block);
2136    cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2137                                        size,
2138                                        memory_region_get_dirty_log_mask(mr));
2139}
2140
2141/*
2142 * If memory region `mr' is NULL, do global sync.  Otherwise, sync
2143 * dirty bitmap for the specified memory region.
2144 */
2145static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
2146{
2147    MemoryListener *listener;
2148    AddressSpace *as;
2149    FlatView *view;
2150    FlatRange *fr;
2151
2152    /* If the same address space has multiple log_sync listeners, we
2153     * visit that address space's FlatView multiple times.  But because
2154     * log_sync listeners are rare, it's still cheaper than walking each
2155     * address space once.
2156     */
2157    QTAILQ_FOREACH(listener, &memory_listeners, link) {
2158        if (listener->log_sync) {
2159            as = listener->address_space;
2160            view = address_space_get_flatview(as);
2161            FOR_EACH_FLAT_RANGE(fr, view) {
2162                if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2163                    MemoryRegionSection mrs = section_from_flat_range(fr, view);
2164                    listener->log_sync(listener, &mrs);
2165                }
2166            }
2167            flatview_unref(view);
2168            trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2169        } else if (listener->log_sync_global) {
2170            /*
2171             * No matter whether MR is specified, what we can do here
2172             * is to do a global sync, because we are not capable to
2173             * sync in a finer granularity.
2174             */
2175            listener->log_sync_global(listener);
2176            trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2177        }
2178    }
2179}
2180
2181void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2182                                      hwaddr len)
2183{
2184    MemoryRegionSection mrs;
2185    MemoryListener *listener;
2186    AddressSpace *as;
2187    FlatView *view;
2188    FlatRange *fr;
2189    hwaddr sec_start, sec_end, sec_size;
2190
2191    QTAILQ_FOREACH(listener, &memory_listeners, link) {
2192        if (!listener->log_clear) {
2193            continue;
2194        }
2195        as = listener->address_space;
2196        view = address_space_get_flatview(as);
2197        FOR_EACH_FLAT_RANGE(fr, view) {
2198            if (!fr->dirty_log_mask || fr->mr != mr) {
2199                /*
2200                 * Clear dirty bitmap operation only applies to those
2201                 * regions whose dirty logging is at least enabled
2202                 */
2203                continue;
2204            }
2205
2206            mrs = section_from_flat_range(fr, view);
2207
2208            sec_start = MAX(mrs.offset_within_region, start);
2209            sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2210            sec_end = MIN(sec_end, start + len);
2211
2212            if (sec_start >= sec_end) {
2213                /*
2214                 * If this memory region section has no intersection
2215                 * with the requested range, skip.
2216                 */
2217                continue;
2218            }
2219
2220            /* Valid case; shrink the section if needed */
2221            mrs.offset_within_address_space +=
2222                sec_start - mrs.offset_within_region;
2223            mrs.offset_within_region = sec_start;
2224            sec_size = sec_end - sec_start;
2225            mrs.size = int128_make64(sec_size);
2226            listener->log_clear(listener, &mrs);
2227        }
2228        flatview_unref(view);
2229    }
2230}
2231
2232DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2233                                                            hwaddr addr,
2234                                                            hwaddr size,
2235                                                            unsigned client)
2236{
2237    DirtyBitmapSnapshot *snapshot;
2238    assert(mr->ram_block);
2239    memory_region_sync_dirty_bitmap(mr);
2240    snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2241    memory_global_after_dirty_log_sync();
2242    return snapshot;
2243}
2244
2245bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2246                                      hwaddr addr, hwaddr size)
2247{
2248    assert(mr->ram_block);
2249    return cpu_physical_memory_snapshot_get_dirty(snap,
2250                memory_region_get_ram_addr(mr) + addr, size);
2251}
2252
2253void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2254{
2255    if (mr->readonly != readonly) {
2256        memory_region_transaction_begin();
2257        mr->readonly = readonly;
2258        memory_region_update_pending |= mr->enabled;
2259        memory_region_transaction_commit();
2260    }
2261}
2262
2263void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2264{
2265    if (mr->nonvolatile != nonvolatile) {
2266        memory_region_transaction_begin();
2267        mr->nonvolatile = nonvolatile;
2268        memory_region_update_pending |= mr->enabled;
2269        memory_region_transaction_commit();
2270    }
2271}
2272
2273void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2274{
2275    if (mr->romd_mode != romd_mode) {
2276        memory_region_transaction_begin();
2277        mr->romd_mode = romd_mode;
2278        memory_region_update_pending |= mr->enabled;
2279        memory_region_transaction_commit();
2280    }
2281}
2282
2283void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2284                               hwaddr size, unsigned client)
2285{
2286    assert(mr->ram_block);
2287    cpu_physical_memory_test_and_clear_dirty(
2288        memory_region_get_ram_addr(mr) + addr, size, client);
2289}
2290
2291int memory_region_get_fd(MemoryRegion *mr)
2292{
2293    int fd;
2294
2295    RCU_READ_LOCK_GUARD();
2296    while (mr->alias) {
2297        mr = mr->alias;
2298    }
2299    fd = mr->ram_block->fd;
2300
2301    return fd;
2302}
2303
2304void *memory_region_get_ram_ptr(MemoryRegion *mr)
2305{
2306    void *ptr;
2307    uint64_t offset = 0;
2308
2309    RCU_READ_LOCK_GUARD();
2310    while (mr->alias) {
2311        offset += mr->alias_offset;
2312        mr = mr->alias;
2313    }
2314    assert(mr->ram_block);
2315    ptr = qemu_map_ram_ptr(mr->ram_block, offset);
2316
2317    return ptr;
2318}
2319
2320MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2321{
2322    RAMBlock *block;
2323
2324    block = qemu_ram_block_from_host(ptr, false, offset);
2325    if (!block) {
2326        return NULL;
2327    }
2328
2329    return block->mr;
2330}
2331
2332ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2333{
2334    return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2335}
2336
2337void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2338{
2339    assert(mr->ram_block);
2340
2341    qemu_ram_resize(mr->ram_block, newsize, errp);
2342}
2343
2344void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2345{
2346    if (mr->ram_block) {
2347        qemu_ram_msync(mr->ram_block, addr, size);
2348    }
2349}
2350
2351void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2352{
2353    /*
2354     * Might be extended case needed to cover
2355     * different types of memory regions
2356     */
2357    if (mr->dirty_log_mask) {
2358        memory_region_msync(mr, addr, size);
2359    }
2360}
2361
2362/*
2363 * Call proper memory listeners about the change on the newly
2364 * added/removed CoalescedMemoryRange.
2365 */
2366static void memory_region_update_coalesced_range(MemoryRegion *mr,
2367                                                 CoalescedMemoryRange *cmr,
2368                                                 bool add)
2369{
2370    AddressSpace *as;
2371    FlatView *view;
2372    FlatRange *fr;
2373
2374    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2375        view = address_space_get_flatview(as);
2376        FOR_EACH_FLAT_RANGE(fr, view) {
2377            if (fr->mr == mr) {
2378                flat_range_coalesced_io_notify(fr, as, cmr, add);
2379            }
2380        }
2381        flatview_unref(view);
2382    }
2383}
2384
2385void memory_region_set_coalescing(MemoryRegion *mr)
2386{
2387    memory_region_clear_coalescing(mr);
2388    memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2389}
2390
2391void memory_region_add_coalescing(MemoryRegion *mr,
2392                                  hwaddr offset,
2393                                  uint64_t size)
2394{
2395    CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2396
2397    cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2398    QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2399    memory_region_update_coalesced_range(mr, cmr, true);
2400    memory_region_set_flush_coalesced(mr);
2401}
2402
2403void memory_region_clear_coalescing(MemoryRegion *mr)
2404{
2405    CoalescedMemoryRange *cmr;
2406
2407    if (QTAILQ_EMPTY(&mr->coalesced)) {
2408        return;
2409    }
2410
2411    qemu_flush_coalesced_mmio_buffer();
2412    mr->flush_coalesced_mmio = false;
2413
2414    while (!QTAILQ_EMPTY(&mr->coalesced)) {
2415        cmr = QTAILQ_FIRST(&mr->coalesced);
2416        QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2417        memory_region_update_coalesced_range(mr, cmr, false);
2418        g_free(cmr);
2419    }
2420}
2421
2422void memory_region_set_flush_coalesced(MemoryRegion *mr)
2423{
2424    mr->flush_coalesced_mmio = true;
2425}
2426
2427void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2428{
2429    qemu_flush_coalesced_mmio_buffer();
2430    if (QTAILQ_EMPTY(&mr->coalesced)) {
2431        mr->flush_coalesced_mmio = false;
2432    }
2433}
2434
2435static bool userspace_eventfd_warning;
2436
2437void memory_region_add_eventfd(MemoryRegion *mr,
2438                               hwaddr addr,
2439                               unsigned size,
2440                               bool match_data,
2441                               uint64_t data,
2442                               EventNotifier *e)
2443{
2444    MemoryRegionIoeventfd mrfd = {
2445        .addr.start = int128_make64(addr),
2446        .addr.size = int128_make64(size),
2447        .match_data = match_data,
2448        .data = data,
2449        .e = e,
2450    };
2451    unsigned i;
2452
2453    if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2454                            userspace_eventfd_warning))) {
2455        userspace_eventfd_warning = true;
2456        error_report("Using eventfd without MMIO binding in KVM. "
2457                     "Suboptimal performance expected");
2458    }
2459
2460    if (size) {
2461        adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2462    }
2463    memory_region_transaction_begin();
2464    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2465        if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2466            break;
2467        }
2468    }
2469    ++mr->ioeventfd_nb;
2470    mr->ioeventfds = g_realloc(mr->ioeventfds,
2471                                  sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2472    memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2473            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2474    mr->ioeventfds[i] = mrfd;
2475    ioeventfd_update_pending |= mr->enabled;
2476    memory_region_transaction_commit();
2477}
2478
2479void memory_region_del_eventfd(MemoryRegion *mr,
2480                               hwaddr addr,
2481                               unsigned size,
2482                               bool match_data,
2483                               uint64_t data,
2484                               EventNotifier *e)
2485{
2486    MemoryRegionIoeventfd mrfd = {
2487        .addr.start = int128_make64(addr),
2488        .addr.size = int128_make64(size),
2489        .match_data = match_data,
2490        .data = data,
2491        .e = e,
2492    };
2493    unsigned i;
2494
2495    if (size) {
2496        adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2497    }
2498    memory_region_transaction_begin();
2499    for (i = 0; i < mr->ioeventfd_nb; ++i) {
2500        if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2501            break;
2502        }
2503    }
2504    assert(i != mr->ioeventfd_nb);
2505    memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2506            sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2507    --mr->ioeventfd_nb;
2508    mr->ioeventfds = g_realloc(mr->ioeventfds,
2509                                  sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2510    ioeventfd_update_pending |= mr->enabled;
2511    memory_region_transaction_commit();
2512}
2513
2514static void memory_region_update_container_subregions(MemoryRegion *subregion)
2515{
2516    MemoryRegion *mr = subregion->container;
2517    MemoryRegion *other;
2518
2519    memory_region_transaction_begin();
2520
2521    memory_region_ref(subregion);
2522    QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2523        if (subregion->priority >= other->priority) {
2524            QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2525            goto done;
2526        }
2527    }
2528    QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2529done:
2530    memory_region_update_pending |= mr->enabled && subregion->enabled;
2531    memory_region_transaction_commit();
2532}
2533
2534static void memory_region_add_subregion_common(MemoryRegion *mr,
2535                                               hwaddr offset,
2536                                               MemoryRegion *subregion)
2537{
2538    assert(!subregion->container);
2539    subregion->container = mr;
2540    subregion->addr = offset;
2541    memory_region_update_container_subregions(subregion);
2542}
2543
2544void memory_region_add_subregion(MemoryRegion *mr,
2545                                 hwaddr offset,
2546                                 MemoryRegion *subregion)
2547{
2548    subregion->priority = 0;
2549    memory_region_add_subregion_common(mr, offset, subregion);
2550}
2551
2552void memory_region_add_subregion_overlap(MemoryRegion *mr,
2553                                         hwaddr offset,
2554                                         MemoryRegion *subregion,
2555                                         int priority)
2556{
2557    subregion->priority = priority;
2558    memory_region_add_subregion_common(mr, offset, subregion);
2559}
2560
2561void memory_region_del_subregion(MemoryRegion *mr,
2562                                 MemoryRegion *subregion)
2563{
2564    memory_region_transaction_begin();
2565    assert(subregion->container == mr);
2566    subregion->container = NULL;
2567    QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2568    memory_region_unref(subregion);
2569    memory_region_update_pending |= mr->enabled && subregion->enabled;
2570    memory_region_transaction_commit();
2571}
2572
2573void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2574{
2575    if (enabled == mr->enabled) {
2576        return;
2577    }
2578    memory_region_transaction_begin();
2579    mr->enabled = enabled;
2580    memory_region_update_pending = true;
2581    memory_region_transaction_commit();
2582}
2583
2584void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2585{
2586    Int128 s = int128_make64(size);
2587
2588    if (size == UINT64_MAX) {
2589        s = int128_2_64();
2590    }
2591    if (int128_eq(s, mr->size)) {
2592        return;
2593    }
2594    memory_region_transaction_begin();
2595    mr->size = s;
2596    memory_region_update_pending = true;
2597    memory_region_transaction_commit();
2598}
2599
2600static void memory_region_readd_subregion(MemoryRegion *mr)
2601{
2602    MemoryRegion *container = mr->container;
2603
2604    if (container) {
2605        memory_region_transaction_begin();
2606        memory_region_ref(mr);
2607        memory_region_del_subregion(container, mr);
2608        mr->container = container;
2609        memory_region_update_container_subregions(mr);
2610        memory_region_unref(mr);
2611        memory_region_transaction_commit();
2612    }
2613}
2614
2615void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2616{
2617    if (addr != mr->addr) {
2618        mr->addr = addr;
2619        memory_region_readd_subregion(mr);
2620    }
2621}
2622
2623void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2624{
2625    assert(mr->alias);
2626
2627    if (offset == mr->alias_offset) {
2628        return;
2629    }
2630
2631    memory_region_transaction_begin();
2632    mr->alias_offset = offset;
2633    memory_region_update_pending |= mr->enabled;
2634    memory_region_transaction_commit();
2635}
2636
2637uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2638{
2639    return mr->align;
2640}
2641
2642static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2643{
2644    const AddrRange *addr = addr_;
2645    const FlatRange *fr = fr_;
2646
2647    if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2648        return -1;
2649    } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2650        return 1;
2651    }
2652    return 0;
2653}
2654
2655static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2656{
2657    return bsearch(&addr, view->ranges, view->nr,
2658                   sizeof(FlatRange), cmp_flatrange_addr);
2659}
2660
2661bool memory_region_is_mapped(MemoryRegion *mr)
2662{
2663    return mr->container ? true : false;
2664}
2665
2666/* Same as memory_region_find, but it does not add a reference to the
2667 * returned region.  It must be called from an RCU critical section.
2668 */
2669static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2670                                                  hwaddr addr, uint64_t size)
2671{
2672    MemoryRegionSection ret = { .mr = NULL };
2673    MemoryRegion *root;
2674    AddressSpace *as;
2675    AddrRange range;
2676    FlatView *view;
2677    FlatRange *fr;
2678
2679    addr += mr->addr;
2680    for (root = mr; root->container; ) {
2681        root = root->container;
2682        addr += root->addr;
2683    }
2684
2685    as = memory_region_to_address_space(root);
2686    if (!as) {
2687        return ret;
2688    }
2689    range = addrrange_make(int128_make64(addr), int128_make64(size));
2690
2691    view = address_space_to_flatview(as);
2692    fr = flatview_lookup(view, range);
2693    if (!fr) {
2694        return ret;
2695    }
2696
2697    while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2698        --fr;
2699    }
2700
2701    ret.mr = fr->mr;
2702    ret.fv = view;
2703    range = addrrange_intersection(range, fr->addr);
2704    ret.offset_within_region = fr->offset_in_region;
2705    ret.offset_within_region += int128_get64(int128_sub(range.start,
2706                                                        fr->addr.start));
2707    ret.size = range.size;
2708    ret.offset_within_address_space = int128_get64(range.start);
2709    ret.readonly = fr->readonly;
2710    ret.nonvolatile = fr->nonvolatile;
2711    return ret;
2712}
2713
2714MemoryRegionSection memory_region_find(MemoryRegion *mr,
2715                                       hwaddr addr, uint64_t size)
2716{
2717    MemoryRegionSection ret;
2718    RCU_READ_LOCK_GUARD();
2719    ret = memory_region_find_rcu(mr, addr, size);
2720    if (ret.mr) {
2721        memory_region_ref(ret.mr);
2722    }
2723    return ret;
2724}
2725
2726MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2727{
2728    MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2729
2730    *tmp = *s;
2731    if (tmp->mr) {
2732        memory_region_ref(tmp->mr);
2733    }
2734    if (tmp->fv) {
2735        bool ret  = flatview_ref(tmp->fv);
2736
2737        g_assert(ret);
2738    }
2739    return tmp;
2740}
2741
2742void memory_region_section_free_copy(MemoryRegionSection *s)
2743{
2744    if (s->fv) {
2745        flatview_unref(s->fv);
2746    }
2747    if (s->mr) {
2748        memory_region_unref(s->mr);
2749    }
2750    g_free(s);
2751}
2752
2753bool memory_region_present(MemoryRegion *container, hwaddr addr)
2754{
2755    MemoryRegion *mr;
2756
2757    RCU_READ_LOCK_GUARD();
2758    mr = memory_region_find_rcu(container, addr, 1).mr;
2759    return mr && mr != container;
2760}
2761
2762void memory_global_dirty_log_sync(void)
2763{
2764    memory_region_sync_dirty_bitmap(NULL);
2765}
2766
2767void memory_global_after_dirty_log_sync(void)
2768{
2769    MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2770}
2771
2772static VMChangeStateEntry *vmstate_change;
2773
2774void memory_global_dirty_log_start(unsigned int flags)
2775{
2776    if (vmstate_change) {
2777        qemu_del_vm_change_state_handler(vmstate_change);
2778        vmstate_change = NULL;
2779    }
2780
2781    assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2782    assert(!(global_dirty_tracking & flags));
2783    global_dirty_tracking |= flags;
2784
2785    trace_global_dirty_changed(global_dirty_tracking);
2786
2787    MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2788
2789    /* Refresh DIRTY_MEMORY_MIGRATION bit.  */
2790    memory_region_transaction_begin();
2791    memory_region_update_pending = true;
2792    memory_region_transaction_commit();
2793}
2794
2795static void memory_global_dirty_log_do_stop(unsigned int flags)
2796{
2797    assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2798    assert((global_dirty_tracking & flags) == flags);
2799    global_dirty_tracking &= ~flags;
2800
2801    trace_global_dirty_changed(global_dirty_tracking);
2802
2803    /* Refresh DIRTY_MEMORY_MIGRATION bit.  */
2804    memory_region_transaction_begin();
2805    memory_region_update_pending = true;
2806    memory_region_transaction_commit();
2807
2808    MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2809}
2810
2811static void memory_vm_change_state_handler(void *opaque, bool running,
2812                                           RunState state)
2813{
2814    unsigned int flags = (unsigned int)(uintptr_t)opaque;
2815    if (running) {
2816        memory_global_dirty_log_do_stop(flags);
2817
2818        if (vmstate_change) {
2819            qemu_del_vm_change_state_handler(vmstate_change);
2820            vmstate_change = NULL;
2821        }
2822    }
2823}
2824
2825void memory_global_dirty_log_stop(unsigned int flags)
2826{
2827    if (!runstate_is_running()) {
2828        if (vmstate_change) {
2829            return;
2830        }
2831        vmstate_change = qemu_add_vm_change_state_handler(
2832                                memory_vm_change_state_handler,
2833                                (void *)(uintptr_t)flags);
2834        return;
2835    }
2836
2837    memory_global_dirty_log_do_stop(flags);
2838}
2839
2840static void listener_add_address_space(MemoryListener *listener,
2841                                       AddressSpace *as)
2842{
2843    FlatView *view;
2844    FlatRange *fr;
2845
2846    if (listener->begin) {
2847        listener->begin(listener);
2848    }
2849    if (global_dirty_tracking) {
2850        if (listener->log_global_start) {
2851            listener->log_global_start(listener);
2852        }
2853    }
2854
2855    view = address_space_get_flatview(as);
2856    FOR_EACH_FLAT_RANGE(fr, view) {
2857        MemoryRegionSection section = section_from_flat_range(fr, view);
2858
2859        if (listener->region_add) {
2860            listener->region_add(listener, &section);
2861        }
2862        if (fr->dirty_log_mask && listener->log_start) {
2863            listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2864        }
2865    }
2866    if (listener->commit) {
2867        listener->commit(listener);
2868    }
2869    flatview_unref(view);
2870}
2871
2872static void listener_del_address_space(MemoryListener *listener,
2873                                       AddressSpace *as)
2874{
2875    FlatView *view;
2876    FlatRange *fr;
2877
2878    if (listener->begin) {
2879        listener->begin(listener);
2880    }
2881    view = address_space_get_flatview(as);
2882    FOR_EACH_FLAT_RANGE(fr, view) {
2883        MemoryRegionSection section = section_from_flat_range(fr, view);
2884
2885        if (fr->dirty_log_mask && listener->log_stop) {
2886            listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
2887        }
2888        if (listener->region_del) {
2889            listener->region_del(listener, &section);
2890        }
2891    }
2892    if (listener->commit) {
2893        listener->commit(listener);
2894    }
2895    flatview_unref(view);
2896}
2897
2898void memory_listener_register(MemoryListener *listener, AddressSpace *as)
2899{
2900    MemoryListener *other = NULL;
2901
2902    /* Only one of them can be defined for a listener */
2903    assert(!(listener->log_sync && listener->log_sync_global));
2904
2905    listener->address_space = as;
2906    if (QTAILQ_EMPTY(&memory_listeners)
2907        || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
2908        QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2909    } else {
2910        QTAILQ_FOREACH(other, &memory_listeners, link) {
2911            if (listener->priority < other->priority) {
2912                break;
2913            }
2914        }
2915        QTAILQ_INSERT_BEFORE(other, listener, link);
2916    }
2917
2918    if (QTAILQ_EMPTY(&as->listeners)
2919        || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
2920        QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
2921    } else {
2922        QTAILQ_FOREACH(other, &as->listeners, link_as) {
2923            if (listener->priority < other->priority) {
2924                break;
2925            }
2926        }
2927        QTAILQ_INSERT_BEFORE(other, listener, link_as);
2928    }
2929
2930    listener_add_address_space(listener, as);
2931}
2932
2933void memory_listener_unregister(MemoryListener *listener)
2934{
2935    if (!listener->address_space) {
2936        return;
2937    }
2938
2939    listener_del_address_space(listener, listener->address_space);
2940    QTAILQ_REMOVE(&memory_listeners, listener, link);
2941    QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
2942    listener->address_space = NULL;
2943}
2944
2945void address_space_remove_listeners(AddressSpace *as)
2946{
2947    while (!QTAILQ_EMPTY(&as->listeners)) {
2948        memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
2949    }
2950}
2951
2952void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2953{
2954    memory_region_ref(root);
2955    as->root = root;
2956    as->current_map = NULL;
2957    as->ioeventfd_nb = 0;
2958    as->ioeventfds = NULL;
2959    QTAILQ_INIT(&as->listeners);
2960    QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2961    as->name = g_strdup(name ? name : "anonymous");
2962    address_space_update_topology(as);
2963    address_space_update_ioeventfds(as);
2964}
2965
2966static void do_address_space_destroy(AddressSpace *as)
2967{
2968    assert(QTAILQ_EMPTY(&as->listeners));
2969
2970    flatview_unref(as->current_map);
2971    g_free(as->name);
2972    g_free(as->ioeventfds);
2973    memory_region_unref(as->root);
2974}
2975
2976void address_space_destroy(AddressSpace *as)
2977{
2978    MemoryRegion *root = as->root;
2979
2980    /* Flush out anything from MemoryListeners listening in on this */
2981    memory_region_transaction_begin();
2982    as->root = NULL;
2983    memory_region_transaction_commit();
2984    QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2985
2986    /* At this point, as->dispatch and as->current_map are dummy
2987     * entries that the guest should never use.  Wait for the old
2988     * values to expire before freeing the data.
2989     */
2990    as->root = root;
2991    call_rcu(as, do_address_space_destroy, rcu);
2992}
2993
2994static const char *memory_region_type(MemoryRegion *mr)
2995{
2996    if (mr->alias) {
2997        return memory_region_type(mr->alias);
2998    }
2999    if (memory_region_is_ram_device(mr)) {
3000        return "ramd";
3001    } else if (memory_region_is_romd(mr)) {
3002        return "romd";
3003    } else if (memory_region_is_rom(mr)) {
3004        return "rom";
3005    } else if (memory_region_is_ram(mr)) {
3006        return "ram";
3007    } else {
3008        return "i/o";
3009    }
3010}
3011
3012typedef struct MemoryRegionList MemoryRegionList;
3013
3014struct MemoryRegionList {
3015    const MemoryRegion *mr;
3016    QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3017};
3018
3019typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3020
3021#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3022                           int128_sub((size), int128_one())) : 0)
3023#define MTREE_INDENT "  "
3024
3025static void mtree_expand_owner(const char *label, Object *obj)
3026{
3027    DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3028
3029    qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3030    if (dev && dev->id) {
3031        qemu_printf(" id=%s", dev->id);
3032    } else {
3033        char *canonical_path = object_get_canonical_path(obj);
3034        if (canonical_path) {
3035            qemu_printf(" path=%s", canonical_path);
3036            g_free(canonical_path);
3037        } else {
3038            qemu_printf(" type=%s", object_get_typename(obj));
3039        }
3040    }
3041    qemu_printf("}");
3042}
3043
3044static void mtree_print_mr_owner(const MemoryRegion *mr)
3045{
3046    Object *owner = mr->owner;
3047    Object *parent = memory_region_owner((MemoryRegion *)mr);
3048
3049    if (!owner && !parent) {
3050        qemu_printf(" orphan");
3051        return;
3052    }
3053    if (owner) {
3054        mtree_expand_owner("owner", owner);
3055    }
3056    if (parent && parent != owner) {
3057        mtree_expand_owner("parent", parent);
3058    }
3059}
3060
3061static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3062                           hwaddr base,
3063                           MemoryRegionListHead *alias_print_queue,
3064                           bool owner, bool display_disabled)
3065{
3066    MemoryRegionList *new_ml, *ml, *next_ml;
3067    MemoryRegionListHead submr_print_queue;
3068    const MemoryRegion *submr;
3069    unsigned int i;
3070    hwaddr cur_start, cur_end;
3071
3072    if (!mr) {
3073        return;
3074    }
3075
3076    cur_start = base + mr->addr;
3077    cur_end = cur_start + MR_SIZE(mr->size);
3078
3079    /*
3080     * Try to detect overflow of memory region. This should never
3081     * happen normally. When it happens, we dump something to warn the
3082     * user who is observing this.
3083     */
3084    if (cur_start < base || cur_end < cur_start) {
3085        qemu_printf("[DETECTED OVERFLOW!] ");
3086    }
3087
3088    if (mr->alias) {
3089        MemoryRegionList *ml;
3090        bool found = false;
3091
3092        /* check if the alias is already in the queue */
3093        QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3094            if (ml->mr == mr->alias) {
3095                found = true;
3096            }
3097        }
3098
3099        if (!found) {
3100            ml = g_new(MemoryRegionList, 1);
3101            ml->mr = mr->alias;
3102            QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3103        }
3104        if (mr->enabled || display_disabled) {
3105            for (i = 0; i < level; i++) {
3106                qemu_printf(MTREE_INDENT);
3107            }
3108            qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3109                        " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
3110                        "-" TARGET_FMT_plx "%s",
3111                        cur_start, cur_end,
3112                        mr->priority,
3113                        mr->nonvolatile ? "nv-" : "",
3114                        memory_region_type((MemoryRegion *)mr),
3115                        memory_region_name(mr),
3116                        memory_region_name(mr->alias),
3117                        mr->alias_offset,
3118                        mr->alias_offset + MR_SIZE(mr->size),
3119                        mr->enabled ? "" : " [disabled]");
3120            if (owner) {
3121                mtree_print_mr_owner(mr);
3122            }
3123            qemu_printf("\n");
3124        }
3125    } else {
3126        if (mr->enabled || display_disabled) {
3127            for (i = 0; i < level; i++) {
3128                qemu_printf(MTREE_INDENT);
3129            }
3130            qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
3131                        " (prio %d, %s%s): %s%s",
3132                        cur_start, cur_end,
3133                        mr->priority,
3134                        mr->nonvolatile ? "nv-" : "",
3135                        memory_region_type((MemoryRegion *)mr),
3136                        memory_region_name(mr),
3137                        mr->enabled ? "" : " [disabled]");
3138            if (owner) {
3139                mtree_print_mr_owner(mr);
3140            }
3141            qemu_printf("\n");
3142        }
3143    }
3144
3145    QTAILQ_INIT(&submr_print_queue);
3146
3147    QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3148        new_ml = g_new(MemoryRegionList, 1);
3149        new_ml->mr = submr;
3150        QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3151            if (new_ml->mr->addr < ml->mr->addr ||
3152                (new_ml->mr->addr == ml->mr->addr &&
3153                 new_ml->mr->priority > ml->mr->priority)) {
3154                QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3155                new_ml = NULL;
3156                break;
3157            }
3158        }
3159        if (new_ml) {
3160            QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3161        }
3162    }
3163
3164    QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3165        mtree_print_mr(ml->mr, level + 1, cur_start,
3166                       alias_print_queue, owner, display_disabled);
3167    }
3168
3169    QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3170        g_free(ml);
3171    }
3172}
3173
3174struct FlatViewInfo {
3175    int counter;
3176    bool dispatch_tree;
3177    bool owner;
3178    AccelClass *ac;
3179};
3180
3181static void mtree_print_flatview(gpointer key, gpointer value,
3182                                 gpointer user_data)
3183{
3184    FlatView *view = key;
3185    GArray *fv_address_spaces = value;
3186    struct FlatViewInfo *fvi = user_data;
3187    FlatRange *range = &view->ranges[0];
3188    MemoryRegion *mr;
3189    int n = view->nr;
3190    int i;
3191    AddressSpace *as;
3192
3193    qemu_printf("FlatView #%d\n", fvi->counter);
3194    ++fvi->counter;
3195
3196    for (i = 0; i < fv_address_spaces->len; ++i) {
3197        as = g_array_index(fv_address_spaces, AddressSpace*, i);
3198        qemu_printf(" AS \"%s\", root: %s",
3199                    as->name, memory_region_name(as->root));
3200        if (as->root->alias) {
3201            qemu_printf(", alias %s", memory_region_name(as->root->alias));
3202        }
3203        qemu_printf("\n");
3204    }
3205
3206    qemu_printf(" Root memory region: %s\n",
3207      view->root ? memory_region_name(view->root) : "(none)");
3208
3209    if (n <= 0) {
3210        qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3211        return;
3212    }
3213
3214    while (n--) {
3215        mr = range->mr;
3216        if (range->offset_in_region) {
3217            qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3218                        " (prio %d, %s%s): %s @" TARGET_FMT_plx,
3219                        int128_get64(range->addr.start),
3220                        int128_get64(range->addr.start)
3221                        + MR_SIZE(range->addr.size),
3222                        mr->priority,
3223                        range->nonvolatile ? "nv-" : "",
3224                        range->readonly ? "rom" : memory_region_type(mr),
3225                        memory_region_name(mr),
3226                        range->offset_in_region);
3227        } else {
3228            qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
3229                        " (prio %d, %s%s): %s",
3230                        int128_get64(range->addr.start),
3231                        int128_get64(range->addr.start)
3232                        + MR_SIZE(range->addr.size),
3233                        mr->priority,
3234                        range->nonvolatile ? "nv-" : "",
3235                        range->readonly ? "rom" : memory_region_type(mr),
3236                        memory_region_name(mr));
3237        }
3238        if (fvi->owner) {
3239            mtree_print_mr_owner(mr);
3240        }
3241
3242        if (fvi->ac) {
3243            for (i = 0; i < fv_address_spaces->len; ++i) {
3244                as = g_array_index(fv_address_spaces, AddressSpace*, i);
3245                if (fvi->ac->has_memory(current_machine, as,
3246                                        int128_get64(range->addr.start),
3247                                        MR_SIZE(range->addr.size) + 1)) {
3248                    qemu_printf(" %s", fvi->ac->name);
3249                }
3250            }
3251        }
3252        qemu_printf("\n");
3253        range++;
3254    }
3255
3256#if !defined(CONFIG_USER_ONLY)
3257    if (fvi->dispatch_tree && view->root) {
3258        mtree_print_dispatch(view->dispatch, view->root);
3259    }
3260#endif
3261
3262    qemu_printf("\n");
3263}
3264
3265static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3266                                      gpointer user_data)
3267{
3268    FlatView *view = key;
3269    GArray *fv_address_spaces = value;
3270
3271    g_array_unref(fv_address_spaces);
3272    flatview_unref(view);
3273
3274    return true;
3275}
3276
3277void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3278{
3279    MemoryRegionListHead ml_head;
3280    MemoryRegionList *ml, *ml2;
3281    AddressSpace *as;
3282
3283    if (flatview) {
3284        FlatView *view;
3285        struct FlatViewInfo fvi = {
3286            .counter = 0,
3287            .dispatch_tree = dispatch_tree,
3288            .owner = owner,
3289        };
3290        GArray *fv_address_spaces;
3291        GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3292        AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3293
3294        if (ac->has_memory) {
3295            fvi.ac = ac;
3296        }
3297
3298        /* Gather all FVs in one table */
3299        QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3300            view = address_space_get_flatview(as);
3301
3302            fv_address_spaces = g_hash_table_lookup(views, view);
3303            if (!fv_address_spaces) {
3304                fv_address_spaces = g_array_new(false, false, sizeof(as));
3305                g_hash_table_insert(views, view, fv_address_spaces);
3306            }
3307
3308            g_array_append_val(fv_address_spaces, as);
3309        }
3310
3311        /* Print */
3312        g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3313
3314        /* Free */
3315        g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3316        g_hash_table_unref(views);
3317
3318        return;
3319    }
3320
3321    QTAILQ_INIT(&ml_head);
3322
3323    QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3324        qemu_printf("address-space: %s\n", as->name);
3325        mtree_print_mr(as->root, 1, 0, &ml_head, owner, disabled);
3326        qemu_printf("\n");
3327    }
3328
3329    /* print aliased regions */
3330    QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3331        qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3332        mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3333        qemu_printf("\n");
3334    }
3335
3336    QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3337        g_free(ml);
3338    }
3339}
3340
3341void memory_region_init_ram(MemoryRegion *mr,
3342                            Object *owner,
3343                            const char *name,
3344                            uint64_t size,
3345                            Error **errp)
3346{
3347    DeviceState *owner_dev;
3348    Error *err = NULL;
3349
3350    memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3351    if (err) {
3352        error_propagate(errp, err);
3353        return;
3354    }
3355    /* This will assert if owner is neither NULL nor a DeviceState.
3356     * We only want the owner here for the purposes of defining a
3357     * unique name for migration. TODO: Ideally we should implement
3358     * a naming scheme for Objects which are not DeviceStates, in
3359     * which case we can relax this restriction.
3360     */
3361    owner_dev = DEVICE(owner);
3362    vmstate_register_ram(mr, owner_dev);
3363}
3364
3365void memory_region_init_rom(MemoryRegion *mr,
3366                            Object *owner,
3367                            const char *name,
3368                            uint64_t size,
3369                            Error **errp)
3370{
3371    DeviceState *owner_dev;
3372    Error *err = NULL;
3373
3374    memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3375    if (err) {
3376        error_propagate(errp, err);
3377        return;
3378    }
3379    /* This will assert if owner is neither NULL nor a DeviceState.
3380     * We only want the owner here for the purposes of defining a
3381     * unique name for migration. TODO: Ideally we should implement
3382     * a naming scheme for Objects which are not DeviceStates, in
3383     * which case we can relax this restriction.
3384     */
3385    owner_dev = DEVICE(owner);
3386    vmstate_register_ram(mr, owner_dev);
3387}
3388
3389void memory_region_init_rom_device(MemoryRegion *mr,
3390                                   Object *owner,
3391                                   const MemoryRegionOps *ops,
3392                                   void *opaque,
3393                                   const char *name,
3394                                   uint64_t size,
3395                                   Error **errp)
3396{
3397    DeviceState *owner_dev;
3398    Error *err = NULL;
3399
3400    memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3401                                            name, size, &err);
3402    if (err) {
3403        error_propagate(errp, err);
3404        return;
3405    }
3406    /* This will assert if owner is neither NULL nor a DeviceState.
3407     * We only want the owner here for the purposes of defining a
3408     * unique name for migration. TODO: Ideally we should implement
3409     * a naming scheme for Objects which are not DeviceStates, in
3410     * which case we can relax this restriction.
3411     */
3412    owner_dev = DEVICE(owner);
3413    vmstate_register_ram(mr, owner_dev);
3414}
3415
3416/*
3417 * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for
3418 * the fuzz_dma_read_cb callback
3419 */
3420#ifdef CONFIG_FUZZ
3421void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3422                      size_t len,
3423                      MemoryRegion *mr)
3424{
3425}
3426#endif
3427
3428static const TypeInfo memory_region_info = {
3429    .parent             = TYPE_OBJECT,
3430    .name               = TYPE_MEMORY_REGION,
3431    .class_size         = sizeof(MemoryRegionClass),
3432    .instance_size      = sizeof(MemoryRegion),
3433    .instance_init      = memory_region_initfn,
3434    .instance_finalize  = memory_region_finalize,
3435};
3436
3437static const TypeInfo iommu_memory_region_info = {
3438    .parent             = TYPE_MEMORY_REGION,
3439    .name               = TYPE_IOMMU_MEMORY_REGION,
3440    .class_size         = sizeof(IOMMUMemoryRegionClass),
3441    .instance_size      = sizeof(IOMMUMemoryRegion),
3442    .instance_init      = iommu_memory_region_initfn,
3443    .abstract           = true,
3444};
3445
3446static const TypeInfo ram_discard_manager_info = {
3447    .parent             = TYPE_INTERFACE,
3448    .name               = TYPE_RAM_DISCARD_MANAGER,
3449    .class_size         = sizeof(RamDiscardManagerClass),
3450};
3451
3452static void memory_register_types(void)
3453{
3454    type_register_static(&memory_region_info);
3455    type_register_static(&iommu_memory_region_info);
3456    type_register_static(&ram_discard_manager_info);
3457}
3458
3459type_init(memory_register_types)
3460