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20#include "qemu/osdep.h"
21#include "qemu-common.h"
22#include "qapi/error.h"
23
24#include "exec/target_page.h"
25#include "hw/qdev-core.h"
26#include "hw/qdev-properties.h"
27#include "qemu/error-report.h"
28#include "migration/vmstate.h"
29#ifdef CONFIG_USER_ONLY
30#include "qemu.h"
31#else
32#include "hw/core/sysemu-cpu-ops.h"
33#include "exec/address-spaces.h"
34#endif
35#include "sysemu/tcg.h"
36#include "sysemu/kvm.h"
37#include "sysemu/replay.h"
38#include "exec/cpu-common.h"
39#include "exec/exec-all.h"
40#include "exec/translate-all.h"
41#include "exec/log.h"
42#include "hw/core/accel-cpu.h"
43#include "trace/trace-root.h"
44#include "qemu/accel.h"
45
46uintptr_t qemu_host_page_size;
47intptr_t qemu_host_page_mask;
48
49#ifndef CONFIG_USER_ONLY
50static int cpu_common_post_load(void *opaque, int version_id)
51{
52 CPUState *cpu = opaque;
53
54
55
56 cpu->interrupt_request &= ~0x01;
57 tlb_flush(cpu);
58
59
60
61
62
63
64 tb_flush(cpu);
65
66 return 0;
67}
68
69static int cpu_common_pre_load(void *opaque)
70{
71 CPUState *cpu = opaque;
72
73 cpu->exception_index = -1;
74
75 return 0;
76}
77
78static bool cpu_common_exception_index_needed(void *opaque)
79{
80 CPUState *cpu = opaque;
81
82 return tcg_enabled() && cpu->exception_index != -1;
83}
84
85static const VMStateDescription vmstate_cpu_common_exception_index = {
86 .name = "cpu_common/exception_index",
87 .version_id = 1,
88 .minimum_version_id = 1,
89 .needed = cpu_common_exception_index_needed,
90 .fields = (VMStateField[]) {
91 VMSTATE_INT32(exception_index, CPUState),
92 VMSTATE_END_OF_LIST()
93 }
94};
95
96static bool cpu_common_crash_occurred_needed(void *opaque)
97{
98 CPUState *cpu = opaque;
99
100 return cpu->crash_occurred;
101}
102
103static const VMStateDescription vmstate_cpu_common_crash_occurred = {
104 .name = "cpu_common/crash_occurred",
105 .version_id = 1,
106 .minimum_version_id = 1,
107 .needed = cpu_common_crash_occurred_needed,
108 .fields = (VMStateField[]) {
109 VMSTATE_BOOL(crash_occurred, CPUState),
110 VMSTATE_END_OF_LIST()
111 }
112};
113
114const VMStateDescription vmstate_cpu_common = {
115 .name = "cpu_common",
116 .version_id = 1,
117 .minimum_version_id = 1,
118 .pre_load = cpu_common_pre_load,
119 .post_load = cpu_common_post_load,
120 .fields = (VMStateField[]) {
121 VMSTATE_UINT32(halted, CPUState),
122 VMSTATE_UINT32(interrupt_request, CPUState),
123 VMSTATE_END_OF_LIST()
124 },
125 .subsections = (const VMStateDescription*[]) {
126 &vmstate_cpu_common_exception_index,
127 &vmstate_cpu_common_crash_occurred,
128 NULL
129 }
130};
131#endif
132
133void cpu_exec_realizefn(CPUState *cpu, Error **errp)
134{
135#ifndef CONFIG_USER_ONLY
136 CPUClass *cc = CPU_GET_CLASS(cpu);
137#endif
138
139 cpu_list_add(cpu);
140 if (!accel_cpu_realizefn(cpu, errp)) {
141 return;
142 }
143
144 if (tcg_enabled()) {
145 tcg_exec_realizefn(cpu, errp);
146 }
147
148#ifdef CONFIG_USER_ONLY
149 assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
150 qdev_get_vmsd(DEVICE(cpu))->unmigratable);
151#else
152 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
153 vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
154 }
155 if (cc->sysemu_ops->legacy_vmsd != NULL) {
156 vmstate_register(NULL, cpu->cpu_index, cc->sysemu_ops->legacy_vmsd, cpu);
157 }
158#endif
159}
160
161void cpu_exec_unrealizefn(CPUState *cpu)
162{
163#ifndef CONFIG_USER_ONLY
164 CPUClass *cc = CPU_GET_CLASS(cpu);
165
166 if (cc->sysemu_ops->legacy_vmsd != NULL) {
167 vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
168 }
169 if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
170 vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
171 }
172#endif
173 if (tcg_enabled()) {
174 tcg_exec_unrealizefn(cpu);
175 }
176
177 cpu_list_remove(cpu);
178}
179
180
181
182
183
184static Property cpu_common_props[] = {
185#ifdef CONFIG_USER_ONLY
186
187
188
189
190
191 DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
192 prctl_unalign_sigbus, false),
193#else
194
195
196
197
198
199 DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
200 MemoryRegion *),
201#endif
202 DEFINE_PROP_END_OF_LIST(),
203};
204
205static bool cpu_get_start_powered_off(Object *obj, Error **errp)
206{
207 CPUState *cpu = CPU(obj);
208 return cpu->start_powered_off;
209}
210
211static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
212{
213 CPUState *cpu = CPU(obj);
214 cpu->start_powered_off = value;
215}
216
217void cpu_class_init_props(DeviceClass *dc)
218{
219 ObjectClass *oc = OBJECT_CLASS(dc);
220
221 device_class_set_props(dc, cpu_common_props);
222
223
224
225
226 object_class_property_add_bool(oc, "start-powered-off",
227 cpu_get_start_powered_off,
228 cpu_set_start_powered_off);
229}
230
231void cpu_exec_initfn(CPUState *cpu)
232{
233 cpu->as = NULL;
234 cpu->num_ases = 0;
235
236#ifndef CONFIG_USER_ONLY
237 cpu->thread_id = qemu_get_thread_id();
238 cpu->memory = get_system_memory();
239 object_ref(OBJECT(cpu->memory));
240#endif
241}
242
243const char *parse_cpu_option(const char *cpu_option)
244{
245 ObjectClass *oc;
246 CPUClass *cc;
247 gchar **model_pieces;
248 const char *cpu_type;
249
250 model_pieces = g_strsplit(cpu_option, ",", 2);
251 if (!model_pieces[0]) {
252 error_report("-cpu option cannot be empty");
253 exit(1);
254 }
255
256 oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
257 if (oc == NULL) {
258 error_report("unable to find CPU model '%s'", model_pieces[0]);
259 g_strfreev(model_pieces);
260 exit(EXIT_FAILURE);
261 }
262
263 cpu_type = object_class_get_name(oc);
264 cc = CPU_CLASS(oc);
265 cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
266 g_strfreev(model_pieces);
267 return cpu_type;
268}
269
270void list_cpus(const char *optarg)
271{
272
273#if defined(cpu_list)
274 cpu_list();
275#endif
276}
277
278#if defined(CONFIG_USER_ONLY)
279void tb_invalidate_phys_addr(target_ulong addr)
280{
281 mmap_lock();
282 tb_invalidate_phys_page_range(addr, addr + 1);
283 mmap_unlock();
284}
285#else
286void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr, MemTxAttrs attrs)
287{
288 ram_addr_t ram_addr;
289 MemoryRegion *mr;
290 hwaddr l = 1;
291
292 if (!tcg_enabled()) {
293 return;
294 }
295
296 RCU_READ_LOCK_GUARD();
297 mr = address_space_translate(as, addr, &addr, &l, false, attrs);
298 if (!(memory_region_is_ram(mr)
299 || memory_region_is_romd(mr))) {
300 return;
301 }
302 ram_addr = memory_region_get_ram_addr(mr) + addr;
303 tb_invalidate_phys_page_range(ram_addr, ram_addr + 1);
304}
305#endif
306
307
308int cpu_breakpoint_insert(CPUState *cpu, vaddr pc, int flags,
309 CPUBreakpoint **breakpoint)
310{
311 CPUClass *cc = CPU_GET_CLASS(cpu);
312 CPUBreakpoint *bp;
313
314 if (cc->gdb_adjust_breakpoint) {
315 pc = cc->gdb_adjust_breakpoint(cpu, pc);
316 }
317
318 bp = g_malloc(sizeof(*bp));
319
320 bp->pc = pc;
321 bp->flags = flags;
322
323
324 if (flags & BP_GDB) {
325 QTAILQ_INSERT_HEAD(&cpu->breakpoints, bp, entry);
326 } else {
327 QTAILQ_INSERT_TAIL(&cpu->breakpoints, bp, entry);
328 }
329
330 if (breakpoint) {
331 *breakpoint = bp;
332 }
333
334 trace_breakpoint_insert(cpu->cpu_index, pc, flags);
335 return 0;
336}
337
338
339int cpu_breakpoint_remove(CPUState *cpu, vaddr pc, int flags)
340{
341 CPUClass *cc = CPU_GET_CLASS(cpu);
342 CPUBreakpoint *bp;
343
344 if (cc->gdb_adjust_breakpoint) {
345 pc = cc->gdb_adjust_breakpoint(cpu, pc);
346 }
347
348 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) {
349 if (bp->pc == pc && bp->flags == flags) {
350 cpu_breakpoint_remove_by_ref(cpu, bp);
351 return 0;
352 }
353 }
354 return -ENOENT;
355}
356
357
358void cpu_breakpoint_remove_by_ref(CPUState *cpu, CPUBreakpoint *bp)
359{
360 QTAILQ_REMOVE(&cpu->breakpoints, bp, entry);
361
362 trace_breakpoint_remove(cpu->cpu_index, bp->pc, bp->flags);
363 g_free(bp);
364}
365
366
367void cpu_breakpoint_remove_all(CPUState *cpu, int mask)
368{
369 CPUBreakpoint *bp, *next;
370
371 QTAILQ_FOREACH_SAFE(bp, &cpu->breakpoints, entry, next) {
372 if (bp->flags & mask) {
373 cpu_breakpoint_remove_by_ref(cpu, bp);
374 }
375 }
376}
377
378
379
380void cpu_single_step(CPUState *cpu, int enabled)
381{
382 if (cpu->singlestep_enabled != enabled) {
383 cpu->singlestep_enabled = enabled;
384 if (kvm_enabled()) {
385 kvm_update_guest_debug(cpu, 0);
386 }
387 trace_breakpoint_singlestep(cpu->cpu_index, enabled);
388 }
389}
390
391void cpu_abort(CPUState *cpu, const char *fmt, ...)
392{
393 va_list ap;
394 va_list ap2;
395
396 va_start(ap, fmt);
397 va_copy(ap2, ap);
398 fprintf(stderr, "qemu: fatal: ");
399 vfprintf(stderr, fmt, ap);
400 fprintf(stderr, "\n");
401 cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
402 if (qemu_log_separate()) {
403 FILE *logfile = qemu_log_lock();
404 qemu_log("qemu: fatal: ");
405 qemu_log_vprintf(fmt, ap2);
406 qemu_log("\n");
407 log_cpu_state(cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP);
408 qemu_log_flush();
409 qemu_log_unlock(logfile);
410 qemu_log_close();
411 }
412 va_end(ap2);
413 va_end(ap);
414 replay_finish();
415#if defined(CONFIG_USER_ONLY)
416 {
417 struct sigaction act;
418 sigfillset(&act.sa_mask);
419 act.sa_handler = SIG_DFL;
420 act.sa_flags = 0;
421 sigaction(SIGABRT, &act, NULL);
422 }
423#endif
424 abort();
425}
426
427
428#if defined(CONFIG_USER_ONLY)
429int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
430 void *ptr, size_t len, bool is_write)
431{
432 int flags;
433 vaddr l, page;
434 void * p;
435 uint8_t *buf = ptr;
436
437 while (len > 0) {
438 page = addr & TARGET_PAGE_MASK;
439 l = (page + TARGET_PAGE_SIZE) - addr;
440 if (l > len)
441 l = len;
442 flags = page_get_flags(page);
443 if (!(flags & PAGE_VALID))
444 return -1;
445 if (is_write) {
446 if (!(flags & PAGE_WRITE))
447 return -1;
448
449 if (!(p = lock_user(VERIFY_WRITE, addr, l, 0)))
450 return -1;
451 memcpy(p, buf, l);
452 unlock_user(p, addr, l);
453 } else {
454 if (!(flags & PAGE_READ))
455 return -1;
456
457 if (!(p = lock_user(VERIFY_READ, addr, l, 1)))
458 return -1;
459 memcpy(buf, p, l);
460 unlock_user(p, addr, 0);
461 }
462 len -= l;
463 buf += l;
464 addr += l;
465 }
466 return 0;
467}
468#endif
469
470bool target_words_bigendian(void)
471{
472#if defined(TARGET_WORDS_BIGENDIAN)
473 return true;
474#else
475 return false;
476#endif
477}
478
479void page_size_init(void)
480{
481
482
483 if (qemu_host_page_size == 0) {
484 qemu_host_page_size = qemu_real_host_page_size;
485 }
486 if (qemu_host_page_size < TARGET_PAGE_SIZE) {
487 qemu_host_page_size = TARGET_PAGE_SIZE;
488 }
489 qemu_host_page_mask = -(intptr_t)qemu_host_page_size;
490}
491