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23#include "qemu/osdep.h"
24#include "qemu/cutils.h"
25#include "qapi/error.h"
26
27#include "exec/memory.h"
28#include "hw/acpi/acpi.h"
29#include "hw/acpi/aml-build.h"
30#include "hw/acpi/bios-linker-loader.h"
31#include "hw/acpi/generic_event_device.h"
32#include "hw/acpi/utils.h"
33#include "hw/acpi/erst.h"
34#include "hw/i386/fw_cfg.h"
35#include "hw/i386/microvm.h"
36#include "hw/pci/pci.h"
37#include "hw/pci/pcie_host.h"
38#include "hw/usb/xhci.h"
39#include "hw/virtio/virtio-mmio.h"
40#include "hw/input/i8042.h"
41
42#include "acpi-common.h"
43#include "acpi-microvm.h"
44
45#include CONFIG_DEVICES
46
47static void acpi_dsdt_add_virtio(Aml *scope,
48 MicrovmMachineState *mms)
49{
50 gchar *separator;
51 long int index;
52 BusState *bus;
53 BusChild *kid;
54
55 bus = sysbus_get_default();
56 QTAILQ_FOREACH(kid, &bus->children, sibling) {
57 DeviceState *dev = kid->child;
58 Object *obj = object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MMIO);
59
60 if (obj) {
61 VirtIOMMIOProxy *mmio = VIRTIO_MMIO(obj);
62 VirtioBusState *mmio_virtio_bus = &mmio->bus;
63 BusState *mmio_bus = &mmio_virtio_bus->parent_obj;
64
65 if (QTAILQ_EMPTY(&mmio_bus->children)) {
66 continue;
67 }
68 separator = g_strrstr(mmio_bus->name, ".");
69 if (!separator) {
70 continue;
71 }
72 if (qemu_strtol(separator + 1, NULL, 10, &index) != 0) {
73 continue;
74 }
75
76 uint32_t irq = mms->virtio_irq_base + index;
77 hwaddr base = VIRTIO_MMIO_BASE + index * 512;
78 hwaddr size = 512;
79
80 Aml *dev = aml_device("VR%02u", (unsigned)index);
81 aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005")));
82 aml_append(dev, aml_name_decl("_UID", aml_int(index)));
83 aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
84
85 Aml *crs = aml_resource_template();
86 aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE));
87 aml_append(crs,
88 aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
89 AML_EXCLUSIVE, &irq, 1));
90 aml_append(dev, aml_name_decl("_CRS", crs));
91 aml_append(scope, dev);
92 }
93 }
94}
95
96static void acpi_dsdt_add_xhci(Aml *scope, MicrovmMachineState *mms)
97{
98 if (machine_usb(MACHINE(mms))) {
99 xhci_sysbus_build_aml(scope, MICROVM_XHCI_BASE, MICROVM_XHCI_IRQ);
100 }
101}
102
103static void acpi_dsdt_add_pci(Aml *scope, MicrovmMachineState *mms)
104{
105 if (mms->pcie != ON_OFF_AUTO_ON) {
106 return;
107 }
108
109 acpi_dsdt_add_gpex(scope, &mms->gpex);
110}
111
112static void
113build_dsdt_microvm(GArray *table_data, BIOSLinker *linker,
114 MicrovmMachineState *mms)
115{
116 X86MachineState *x86ms = X86_MACHINE(mms);
117 Aml *dsdt, *sb_scope, *scope, *pkg;
118 bool ambiguous;
119 Object *isabus;
120 AcpiTable table = { .sig = "DSDT", .rev = 2, .oem_id = x86ms->oem_id,
121 .oem_table_id = x86ms->oem_table_id };
122
123 isabus = object_resolve_path_type("", TYPE_ISA_BUS, &ambiguous);
124 assert(isabus);
125 assert(!ambiguous);
126
127 acpi_table_begin(&table, table_data);
128 dsdt = init_aml_allocator();
129
130 sb_scope = aml_scope("_SB");
131 fw_cfg_add_acpi_dsdt(sb_scope, x86ms->fw_cfg);
132 isa_build_aml(ISA_BUS(isabus), sb_scope);
133 build_ged_aml(sb_scope, GED_DEVICE, x86ms->acpi_dev,
134 GED_MMIO_IRQ, AML_SYSTEM_MEMORY, GED_MMIO_BASE);
135 acpi_dsdt_add_power_button(sb_scope);
136 acpi_dsdt_add_virtio(sb_scope, mms);
137 acpi_dsdt_add_xhci(sb_scope, mms);
138 acpi_dsdt_add_pci(sb_scope, mms);
139 aml_append(dsdt, sb_scope);
140
141
142 scope = aml_scope("\\");
143 pkg = aml_package(4);
144 aml_append(pkg, aml_int(ACPI_GED_SLP_TYP_S5));
145 aml_append(pkg, aml_int(0));
146 aml_append(pkg, aml_int(0));
147 aml_append(pkg, aml_int(0));
148 aml_append(scope, aml_name_decl("_S5", pkg));
149 aml_append(dsdt, scope);
150
151
152 g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
153
154 acpi_table_end(linker, &table);
155 free_aml_allocator();
156}
157
158static void acpi_build_microvm(AcpiBuildTables *tables,
159 MicrovmMachineState *mms)
160{
161 MachineState *machine = MACHINE(mms);
162 X86MachineState *x86ms = X86_MACHINE(mms);
163 GArray *table_offsets;
164 GArray *tables_blob = tables->table_data;
165 unsigned dsdt, xsdt;
166 AcpiFadtData pmfadt = {
167
168 .rev = 5,
169 .flags = ((1 << ACPI_FADT_F_HW_REDUCED_ACPI) |
170 (1 << ACPI_FADT_F_RESET_REG_SUP)),
171
172
173 .sleep_ctl = {
174 .space_id = AML_AS_SYSTEM_MEMORY,
175 .bit_width = 8,
176 .address = GED_MMIO_BASE_REGS + ACPI_GED_REG_SLEEP_CTL,
177 },
178 .sleep_sts = {
179 .space_id = AML_AS_SYSTEM_MEMORY,
180 .bit_width = 8,
181 .address = GED_MMIO_BASE_REGS + ACPI_GED_REG_SLEEP_STS,
182 },
183
184
185 .reset_reg = {
186 .space_id = AML_AS_SYSTEM_MEMORY,
187 .bit_width = 8,
188 .address = GED_MMIO_BASE_REGS + ACPI_GED_REG_RESET,
189 },
190 .reset_val = ACPI_GED_RESET_VALUE,
191
192
193
194
195 .iapc_boot_arch = iapc_boot_arch_8042(),
196 };
197
198 table_offsets = g_array_new(false, true ,
199 sizeof(uint32_t));
200 bios_linker_loader_alloc(tables->linker,
201 ACPI_BUILD_TABLE_FILE, tables_blob,
202 64 ,
203 false );
204
205 dsdt = tables_blob->len;
206 build_dsdt_microvm(tables_blob, tables->linker, mms);
207
208 pmfadt.dsdt_tbl_offset = &dsdt;
209 pmfadt.xdsdt_tbl_offset = &dsdt;
210 acpi_add_table(table_offsets, tables_blob);
211 build_fadt(tables_blob, tables->linker, &pmfadt, x86ms->oem_id,
212 x86ms->oem_table_id);
213
214 acpi_add_table(table_offsets, tables_blob);
215 acpi_build_madt(tables_blob, tables->linker, X86_MACHINE(machine),
216 ACPI_DEVICE_IF(x86ms->acpi_dev), x86ms->oem_id,
217 x86ms->oem_table_id);
218
219#ifdef CONFIG_ACPI_ERST
220 {
221 Object *erst_dev;
222 erst_dev = find_erst_dev();
223 if (erst_dev) {
224 acpi_add_table(table_offsets, tables_blob);
225 build_erst(tables_blob, tables->linker, erst_dev,
226 x86ms->oem_id, x86ms->oem_table_id);
227 }
228 }
229#endif
230
231 xsdt = tables_blob->len;
232 build_xsdt(tables_blob, tables->linker, table_offsets, x86ms->oem_id,
233 x86ms->oem_table_id);
234
235
236 {
237 AcpiRsdpData rsdp_data = {
238
239 .revision = 2,
240 .oem_id = x86ms->oem_id,
241 .xsdt_tbl_offset = &xsdt,
242 .rsdt_tbl_offset = NULL,
243 };
244 build_rsdp(tables->rsdp, tables->linker, &rsdp_data);
245 }
246
247
248 g_array_free(table_offsets, true);
249}
250
251static void acpi_build_no_update(void *build_opaque)
252{
253
254}
255
256void acpi_setup_microvm(MicrovmMachineState *mms)
257{
258 X86MachineState *x86ms = X86_MACHINE(mms);
259 AcpiBuildTables tables;
260
261 assert(x86ms->fw_cfg);
262
263 if (!x86_machine_is_acpi_enabled(x86ms)) {
264 return;
265 }
266
267 acpi_build_tables_init(&tables);
268 acpi_build_microvm(&tables, mms);
269
270
271 acpi_add_rom_blob(acpi_build_no_update, NULL, tables.table_data,
272 ACPI_BUILD_TABLE_FILE);
273 acpi_add_rom_blob(acpi_build_no_update, NULL, tables.linker->cmd_blob,
274 ACPI_BUILD_LOADER_FILE);
275 acpi_add_rom_blob(acpi_build_no_update, NULL, tables.rsdp,
276 ACPI_BUILD_RSDP_FILE);
277
278 acpi_build_tables_cleanup(&tables, false);
279}
280
