1#ifndef QEMU_HW_ACPI_H
2#define QEMU_HW_ACPI_H
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23#include "qemu/notify.h"
24#include "exec/memory.h"
25#include "hw/acpi/acpi_dev_interface.h"
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29
30#define ACPI_MAX_RAM_SLOTS 256
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34
35#define ACPI_GPE_REGISTER_WIDTH 8
36#define ACPI_PM1_REGISTER_WIDTH 16
37#define ACPI_PM2_REGISTER_WIDTH 8
38#define ACPI_PM_TIMER_WIDTH 32
39
40
41#define ACPI_PM_PROP_S3_DISABLED "disable_s3"
42#define ACPI_PM_PROP_S4_DISABLED "disable_s4"
43#define ACPI_PM_PROP_S4_VAL "s4_val"
44#define ACPI_PM_PROP_SCI_INT "sci_int"
45#define ACPI_PM_PROP_ACPI_ENABLE_CMD "acpi_enable_cmd"
46#define ACPI_PM_PROP_ACPI_DISABLE_CMD "acpi_disable_cmd"
47#define ACPI_PM_PROP_PM_IO_BASE "pm_io_base"
48#define ACPI_PM_PROP_GPE0_BLK "gpe0_blk"
49#define ACPI_PM_PROP_GPE0_BLK_LEN "gpe0_blk_len"
50#define ACPI_PM_PROP_ACPI_PCIHP_BRIDGE "acpi-pci-hotplug-with-bridge-support"
51#define ACPI_PM_PROP_ACPI_PCI_ROOTHP "acpi-root-pci-hotplug"
52
53
54#define PM_TIMER_FREQUENCY 3579545
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62
63#define ACPI_BITMASK_TIMER_STATUS 0x0001
64#define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
65#define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
66#define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
67#define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
68#define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
69#define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000
70#define ACPI_BITMASK_WAKE_STATUS 0x8000
71
72#define ACPI_BITMASK_ALL_FIXED_STATUS (\
73 ACPI_BITMASK_TIMER_STATUS | \
74 ACPI_BITMASK_BUS_MASTER_STATUS | \
75 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
76 ACPI_BITMASK_POWER_BUTTON_STATUS | \
77 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
78 ACPI_BITMASK_RT_CLOCK_STATUS | \
79 ACPI_BITMASK_WAKE_STATUS)
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81
82#define ACPI_BITMASK_TIMER_ENABLE 0x0001
83#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
84#define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
85#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
86#define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
87#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000
88
89#define ACPI_BITMASK_PM1_COMMON_ENABLED ( \
90 ACPI_BITMASK_RT_CLOCK_ENABLE | \
91 ACPI_BITMASK_POWER_BUTTON_ENABLE | \
92 ACPI_BITMASK_GLOBAL_LOCK_ENABLE | \
93 ACPI_BITMASK_TIMER_ENABLE)
94
95
96#define ACPI_BITMASK_SCI_ENABLE 0x0001
97#define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
98#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
99#define ACPI_BITMASK_SLEEP_TYPE 0x1C00
100#define ACPI_BITMASK_SLEEP_ENABLE 0x2000
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102
103#define ACPI_BITMASK_ARB_DISABLE 0x0001
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105
106typedef struct ACPIPMTimer ACPIPMTimer;
107typedef struct ACPIPM1EVT ACPIPM1EVT;
108typedef struct ACPIPM1CNT ACPIPM1CNT;
109typedef struct ACPIGPE ACPIGPE;
110typedef struct ACPIREGS ACPIREGS;
111
112typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
113
114struct ACPIPMTimer {
115 QEMUTimer *timer;
116 MemoryRegion io;
117 int64_t overflow_time;
118
119 acpi_update_sci_fn update_sci;
120};
121
122struct ACPIPM1EVT {
123 MemoryRegion io;
124 uint16_t sts;
125 uint16_t en;
126 acpi_update_sci_fn update_sci;
127};
128
129struct ACPIPM1CNT {
130 MemoryRegion io;
131 uint16_t cnt;
132 uint8_t s4_val;
133 bool acpi_only;
134};
135
136struct ACPIGPE {
137 uint8_t len;
138
139 uint8_t *sts;
140 uint8_t *en;
141};
142
143struct ACPIREGS {
144 ACPIPMTimer tmr;
145 ACPIGPE gpe;
146 struct {
147 ACPIPM1EVT evt;
148 ACPIPM1CNT cnt;
149 } pm1;
150 Notifier wakeup;
151};
152
153
154void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
155void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
156void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
157 MemoryRegion *parent);
158void acpi_pm_tmr_reset(ACPIREGS *ar);
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161uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
162void acpi_pm1_evt_power_down(ACPIREGS *ar);
163void acpi_pm1_evt_reset(ACPIREGS *ar);
164void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
165 MemoryRegion *parent);
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167
168void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
169 bool disable_s3, bool disable_s4, uint8_t s4_val,
170 bool acpi_only);
171void acpi_pm1_cnt_update(ACPIREGS *ar,
172 bool sci_enable, bool sci_disable);
173void acpi_pm1_cnt_reset(ACPIREGS *ar);
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175
176void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
177void acpi_gpe_reset(ACPIREGS *ar);
178
179void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
180uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
181
182void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
183 AcpiEventStatusBits status);
184
185void acpi_update_sci(ACPIREGS *acpi_regs, qemu_irq irq);
186
187
188extern char unsigned *acpi_tables;
189extern size_t acpi_tables_len;
190
191uint8_t *acpi_table_first(void);
192uint8_t *acpi_table_next(uint8_t *current);
193unsigned acpi_table_len(void *current);
194void acpi_table_add(const QemuOpts *opts, Error **errp);
195
196typedef struct AcpiSlicOem AcpiSlicOem;
197struct AcpiSlicOem {
198 char *id;
199 char *table_id;
200};
201int acpi_get_slic_oem(AcpiSlicOem *oem);
202
203#endif
204