LXR qemu/tests/qtest/cmsdk-apb-watchdog-test.c

   1/*
   2 * QTest testcase for the CMSDK APB watchdog device
   3 *
   4 * Copyright (c) 2021 Linaro Limited
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms of the GNU General Public License as published by the
   8 * Free Software Foundation; either version 2 of the License, or
   9 * (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful, but WITHOUT
  12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  14 * for more details.
  15 */
  16
  17#include "qemu/osdep.h"
  18#include "qemu/bitops.h"
  19#include "libqtest-single.h"
  20
  21/*
  22 * lm3s811evb watchdog; at board startup this runs at 200MHz / 16 == 12.5MHz,
  23 * which is 80ns per tick.
  24 */
  25#define WDOG_BASE 0x40000000
  26
  27#define WDOGLOAD 0
  28#define WDOGVALUE 4
  29#define WDOGCONTROL 8
  30#define WDOGINTCLR 0xc
  31#define WDOGRIS 0x10
  32#define WDOGMIS 0x14
  33#define WDOGLOCK 0xc00
  34
  35#define SSYS_BASE 0x400fe000
  36#define RCC 0x60
  37#define SYSDIV_SHIFT 23
  38#define SYSDIV_LENGTH 4
  39
  40static void test_watchdog(void)
  41{
  42    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
  43
  44    writel(WDOG_BASE + WDOGCONTROL, 1);
  45    writel(WDOG_BASE + WDOGLOAD, 1000);
  46
  47    /* Step to just past the 500th tick */
  48    clock_step(500 * 80 + 1);
  49    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
  50    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 500);
  51
  52    /* Just past the 1000th tick: timer should have fired */
  53    clock_step(500 * 80);
  54    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 1);
  55    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 0);
  56
  57    /* VALUE reloads at following tick */
  58    clock_step(80);
  59    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 1000);
  60
  61    /* Writing any value to WDOGINTCLR clears the interrupt and reloads */
  62    clock_step(500 * 80);
  63    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 500);
  64    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 1);
  65    writel(WDOG_BASE + WDOGINTCLR, 0);
  66    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 1000);
  67    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
  68}
  69
  70static void test_clock_change(void)
  71{
  72    uint32_t rcc;
  73
  74    /*
  75     * Test that writing to the stellaris board's RCC register to
  76     * change the system clock frequency causes the watchdog
  77     * to change the speed it counts at.
  78     */
  79    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
  80
  81    writel(WDOG_BASE + WDOGCONTROL, 1);
  82    writel(WDOG_BASE + WDOGLOAD, 1000);
  83
  84    /* Step to just past the 500th tick */
  85    clock_step(80 * 500 + 1);
  86    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
  87    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 500);
  88
  89    /* Rewrite RCC.SYSDIV from 16 to 8, so the clock is now 40ns per tick */
  90    rcc = readl(SSYS_BASE + RCC);
  91    g_assert_cmpuint(extract32(rcc, SYSDIV_SHIFT, SYSDIV_LENGTH), ==, 0xf);
  92    rcc = deposit32(rcc, SYSDIV_SHIFT, SYSDIV_LENGTH, 7);
  93    writel(SSYS_BASE + RCC, rcc);
  94
  95    /* Just past the 1000th tick: timer should have fired */
  96    clock_step(40 * 500);
  97    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 1);
  98
  99    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 0);
 100
 101    /* VALUE reloads at following tick */
 102    clock_step(41);
 103    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 1000);
 104
 105    /* Writing any value to WDOGINTCLR clears the interrupt and reloads */
 106    clock_step(40 * 500);
 107    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 500);
 108    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 1);
 109    writel(WDOG_BASE + WDOGINTCLR, 0);
 110    g_assert_cmpuint(readl(WDOG_BASE + WDOGVALUE), ==, 1000);
 111    g_assert_cmpuint(readl(WDOG_BASE + WDOGRIS), ==, 0);
 112}
 113
 114int main(int argc, char **argv)
 115{
 116    int r;
 117
 118    g_test_init(&argc, &argv, NULL);
 119
 120    qtest_start("-machine lm3s811evb");
 121
 122    qtest_add_func("/cmsdk-apb-watchdog/watchdog", test_watchdog);
 123    qtest_add_func("/cmsdk-apb-watchdog/watchdog_clock_change",
 124                   test_clock_change);
 125
 126    r = g_test_run();
 127
 128    qtest_end();
 129
 130    return r;
 131}
 132