qemu/tests/tcg/hexagon/usr.c
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   1/*
   2 *  Copyright(c) 2022 Qualcomm Innovation Center, Inc. All Rights Reserved.
   3 *
   4 *  This program is free software; you can redistribute it and/or modify
   5 *  it under the terms of the GNU General Public License as published by
   6 *  the Free Software Foundation; either version 2 of the License, or
   7 *  (at your option) any later version.
   8 *
   9 *  This program is distributed in the hope that it will be useful,
  10 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 *  GNU General Public License for more details.
  13 *
  14 *  You should have received a copy of the GNU General Public License
  15 *  along with this program; if not, see <http://www.gnu.org/licenses/>.
  16 */
  17
  18/*
  19 * Test instructions that might set bits in user status register (USR)
  20 */
  21
  22#include <stdio.h>
  23#include <stdint.h>
  24
  25int err;
  26
  27static void __check(int line, uint32_t val, uint32_t expect)
  28{
  29    if (val != expect) {
  30        printf("ERROR at line %d: %d != %d\n", line, val, expect);
  31        err++;
  32    }
  33}
  34
  35#define check(RES, EXP) __check(__LINE__, RES, EXP)
  36
  37static void __check32(int line, uint32_t val, uint32_t expect)
  38{
  39    if (val != expect) {
  40        printf("ERROR at line %d: 0x%08x != 0x%08x\n", line, val, expect);
  41        err++;
  42    }
  43}
  44
  45#define check32(RES, EXP) __check32(__LINE__, RES, EXP)
  46
  47static void __check64(int line, uint64_t val, uint64_t expect)
  48{
  49    if (val != expect) {
  50        printf("ERROR at line %d: 0x%016llx != 0x%016llx\n", line, val, expect);
  51        err++;
  52    }
  53}
  54
  55#define check64(RES, EXP) __check64(__LINE__, RES, EXP)
  56
  57/*
  58 * Some of the instructions tested are only available on certain versions
  59 * of the Hexagon core
  60 */
  61#define CORE_HAS_AUDIO    (__HEXAGON_ARCH__ >= 67 && defined(__HEXAGON_AUDIO__))
  62#define CORE_IS_V67       (__HEXAGON_ARCH__ >= 67)
  63
  64/* Define the bits in Hexagon USR register */
  65#define USR_OVF_BIT          0        /* Sticky saturation overflow */
  66#define USR_FPINVF_BIT       1        /* IEEE FP invalid sticky flag */
  67#define USR_FPDBZF_BIT       2        /* IEEE FP divide-by-zero sticky flag */
  68#define USR_FPOVFF_BIT       3        /* IEEE FP overflow sticky flag */
  69#define USR_FPUNFF_BIT       4        /* IEEE FP underflow sticky flag */
  70#define USR_FPINPF_BIT       5        /* IEEE FP inexact sticky flag */
  71
  72/* Corresponding values in USR */
  73#define USR_CLEAR            0
  74#define USR_OVF              (1 << USR_OVF_BIT)
  75#define USR_FPINVF           (1 << USR_FPINVF_BIT)
  76#define USR_FPDBZF           (1 << USR_FPDBZF_BIT)
  77#define USR_FPOVFF           (1 << USR_FPOVFF_BIT)
  78#define USR_FPUNFF           (1 << USR_FPUNFF_BIT)
  79#define USR_FPINPF           (1 << USR_FPINPF_BIT)
  80
  81/* Some useful floating point values */
  82const uint32_t SF_INF =              0x7f800000;
  83const uint32_t SF_QNaN =             0x7fc00000;
  84const uint32_t SF_SNaN =             0x7fb00000;
  85const uint32_t SF_QNaN_neg =         0xffc00000;
  86const uint32_t SF_SNaN_neg =         0xffb00000;
  87const uint32_t SF_HEX_NaN =          0xffffffff;
  88const uint32_t SF_zero =             0x00000000;
  89const uint32_t SF_one =              0x3f800000;
  90const uint32_t SF_one_recip =        0x3f7f0001;         /* 0.9960...  */
  91const uint32_t SF_one_invsqrta =     0x3f7f0000;         /* 0.99609375 */
  92const uint32_t SF_two =              0x40000000;
  93const uint32_t SF_four =             0x40800000;
  94const uint32_t SF_small_neg =        0xab98fba8;
  95const uint32_t SF_large_pos =        0x5afa572e;
  96
  97const uint64_t DF_QNaN =             0x7ff8000000000000ULL;
  98const uint64_t DF_SNaN =             0x7ff7000000000000ULL;
  99const uint64_t DF_QNaN_neg =         0xfff8000000000000ULL;
 100const uint64_t DF_SNaN_neg =         0xfff7000000000000ULL;
 101const uint64_t DF_HEX_NaN =          0xffffffffffffffffULL;
 102const uint64_t DF_zero =             0x0000000000000000ULL;
 103const uint64_t DF_any =              0x3f80000000000000ULL;
 104const uint64_t DF_one =              0x3ff0000000000000ULL;
 105const uint64_t DF_one_hh =           0x3ff001ff80000000ULL;     /* 1.00048... */
 106const uint64_t DF_small_neg =        0xbd731f7500000000ULL;
 107const uint64_t DF_large_pos =        0x7f80000000000001ULL;
 108
 109/*
 110 * Templates for functions to execute an instruction
 111 *
 112 * The templates vary by the number of arguments and the types of the args
 113 * and result.  We use one letter in the macro name for the result and each
 114 * argument:
 115 *     x             unknown (specified in a subsequent template) or don't care
 116 *     R             register (32 bits)
 117 *     P             pair (64 bits)
 118 *     p             predicate
 119 *     I             immediate
 120 *     Xx            read/write
 121 */
 122
 123/* Clear bits 0-5 in USR */
 124#define CLEAR_USRBITS \
 125    "r2 = usr\n\t" \
 126    "r2 = and(r2, #0xffffffc0)\n\t" \
 127    "usr = r2\n\t"
 128
 129/* Template for instructions with one register operand */
 130#define FUNC_x_OP_x(RESTYPE, SRCTYPE, NAME, INSN) \
 131static RESTYPE NAME(SRCTYPE src, uint32_t *usr_result) \
 132{ \
 133    RESTYPE result; \
 134    uint32_t usr; \
 135    asm(CLEAR_USRBITS \
 136        INSN  "\n\t" \
 137        "%1 = usr\n\t" \
 138        : "=r"(result), "=r"(usr) \
 139        : "r"(src) \
 140        : "r2", "usr"); \
 141      *usr_result = usr & 0x3f; \
 142      return result; \
 143}
 144
 145#define FUNC_R_OP_R(NAME, INSN) \
 146FUNC_x_OP_x(uint32_t, uint32_t, NAME, INSN)
 147
 148#define FUNC_R_OP_P(NAME, INSN) \
 149FUNC_x_OP_x(uint32_t, uint64_t, NAME, INSN)
 150
 151#define FUNC_P_OP_P(NAME, INSN) \
 152FUNC_x_OP_x(uint64_t, uint64_t, NAME, INSN)
 153
 154#define FUNC_P_OP_R(NAME, INSN) \
 155FUNC_x_OP_x(uint64_t, uint32_t, NAME, INSN)
 156
 157/*
 158 * Template for instructions with a register and predicate result
 159 * and one register operand
 160 */
 161#define FUNC_xp_OP_x(RESTYPE, SRCTYPE, NAME, INSN) \
 162static RESTYPE NAME(SRCTYPE src, uint8_t *pred_result, uint32_t *usr_result) \
 163{ \
 164    RESTYPE result; \
 165    uint8_t pred; \
 166    uint32_t usr; \
 167    asm(CLEAR_USRBITS \
 168        INSN  "\n\t" \
 169        "%1 = p2\n\t" \
 170        "%2 = usr\n\t" \
 171        : "=r"(result), "=r"(pred), "=r"(usr) \
 172        : "r"(src) \
 173        : "r2", "p2", "usr"); \
 174    *pred_result = pred; \
 175    *usr_result = usr & 0x3f; \
 176    return result; \
 177}
 178
 179#define FUNC_Rp_OP_R(NAME, INSN) \
 180FUNC_xp_OP_x(uint32_t, uint32_t, NAME, INSN)
 181
 182/* Template for instructions with two register operands */
 183#define FUNC_x_OP_xx(RESTYPE, SRC1TYPE, SRC2TYPE, NAME, INSN) \
 184static RESTYPE NAME(SRC1TYPE src1, SRC2TYPE src2, uint32_t *usr_result) \
 185{ \
 186    RESTYPE result; \
 187    uint32_t usr; \
 188    asm(CLEAR_USRBITS \
 189        INSN "\n\t" \
 190        "%1 = usr\n\t" \
 191        : "=r"(result), "=r"(usr) \
 192        : "r"(src1), "r"(src2) \
 193        : "r2", "usr"); \
 194    *usr_result = usr & 0x3f; \
 195    return result; \
 196}
 197
 198#define FUNC_P_OP_PP(NAME, INSN) \
 199FUNC_x_OP_xx(uint64_t, uint64_t, uint64_t, NAME, INSN)
 200
 201#define FUNC_R_OP_PP(NAME, INSN) \
 202FUNC_x_OP_xx(uint32_t, uint64_t, uint64_t, NAME, INSN)
 203
 204#define FUNC_P_OP_RR(NAME, INSN) \
 205FUNC_x_OP_xx(uint64_t, uint32_t, uint32_t, NAME, INSN)
 206
 207#define FUNC_R_OP_RR(NAME, INSN) \
 208FUNC_x_OP_xx(uint32_t, uint32_t, uint32_t, NAME, INSN)
 209
 210#define FUNC_R_OP_PR(NAME, INSN) \
 211FUNC_x_OP_xx(uint32_t, uint64_t, uint32_t, NAME, INSN)
 212
 213#define FUNC_P_OP_PR(NAME, INSN) \
 214FUNC_x_OP_xx(uint64_t, uint64_t, uint32_t, NAME, INSN)
 215
 216/*
 217 * Template for instructions with a register and predicate result
 218 * and two register operands
 219 */
 220#define FUNC_xp_OP_xx(RESTYPE, SRC1TYPE, SRC2TYPE, NAME, INSN) \
 221static RESTYPE NAME(SRC1TYPE src1, SRC2TYPE src2, \
 222                    uint8_t *pred_result, uint32_t *usr_result) \
 223{ \
 224    RESTYPE result; \
 225    uint8_t pred; \
 226    uint32_t usr; \
 227    asm(CLEAR_USRBITS \
 228        INSN  "\n\t" \
 229        "%1 = p2\n\t" \
 230        "%2 = usr\n\t" \
 231        : "=r"(result), "=r"(pred), "=r"(usr) \
 232        : "r"(src1), "r"(src2) \
 233        : "r2", "p2", "usr"); \
 234    *pred_result = pred; \
 235    *usr_result = usr & 0x3f; \
 236    return result; \
 237}
 238
 239#define FUNC_Rp_OP_RR(NAME, INSN) \
 240FUNC_xp_OP_xx(uint32_t, uint32_t, uint32_t, NAME, INSN)
 241
 242/* Template for instructions with one register and one immediate */
 243#define FUNC_x_OP_xI(RESTYPE, SRC1TYPE, NAME, INSN) \
 244static RESTYPE NAME(SRC1TYPE src1, int32_t src2, uint32_t *usr_result) \
 245{ \
 246    RESTYPE result; \
 247    uint32_t usr; \
 248    asm(CLEAR_USRBITS \
 249        INSN "\n\t" \
 250        "%1 = usr\n\t" \
 251        : "=r"(result), "=r"(usr) \
 252        : "r"(src1), "i"(src2) \
 253        : "r2", "usr"); \
 254    *usr_result = usr & 0x3f; \
 255    return result; \
 256}
 257
 258#define FUNC_R_OP_RI(NAME, INSN) \
 259FUNC_x_OP_xI(uint32_t, uint32_t, NAME, INSN)
 260
 261#define FUNC_R_OP_PI(NAME, INSN) \
 262FUNC_x_OP_xI(uint32_t, uint64_t, NAME, INSN)
 263
 264/*
 265 * Template for instructions with a read/write result
 266 * and two register operands
 267 */
 268#define FUNC_Xx_OP_xx(RESTYPE, SRC1TYPE, SRC2TYPE, NAME, INSN) \
 269static RESTYPE NAME(RESTYPE result, SRC1TYPE src1, SRC2TYPE src2, \
 270                    uint32_t *usr_result) \
 271{ \
 272    uint32_t usr; \
 273    asm(CLEAR_USRBITS \
 274        INSN "\n\t" \
 275        "%1 = usr\n\t" \
 276        : "+r"(result), "=r"(usr) \
 277        : "r"(src1), "r"(src2) \
 278        : "r2", "usr"); \
 279    *usr_result = usr & 0x3f; \
 280    return result; \
 281}
 282
 283#define FUNC_XR_OP_RR(NAME, INSN) \
 284FUNC_Xx_OP_xx(uint32_t, uint32_t, uint32_t, NAME, INSN)
 285
 286#define FUNC_XP_OP_PP(NAME, INSN) \
 287FUNC_Xx_OP_xx(uint64_t, uint64_t, uint64_t, NAME, INSN)
 288
 289#define FUNC_XP_OP_RR(NAME, INSN) \
 290FUNC_Xx_OP_xx(uint64_t, uint32_t, uint32_t, NAME, INSN)
 291
 292/*
 293 * Template for instructions with a read/write result
 294 * and two register operands
 295 */
 296#define FUNC_Xxp_OP_xx(RESTYPE, SRC1TYPE, SRC2TYPE, NAME, INSN) \
 297static RESTYPE NAME(RESTYPE result, SRC1TYPE src1, SRC2TYPE src2, \
 298                    uint8_t *pred_result, uint32_t *usr_result) \
 299{ \
 300    uint32_t usr; \
 301    uint8_t pred; \
 302    asm(CLEAR_USRBITS \
 303        INSN "\n\t" \
 304        "%1 = p2\n\t" \
 305        "%2 = usr\n\t" \
 306        : "+r"(result), "=r"(pred), "=r"(usr) \
 307        : "r"(src1), "r"(src2) \
 308        : "r2", "usr"); \
 309    *pred_result = pred; \
 310    *usr_result = usr & 0x3f; \
 311    return result; \
 312}
 313
 314#define FUNC_XPp_OP_PP(NAME, INSN) \
 315FUNC_Xxp_OP_xx(uint64_t, uint64_t, uint64_t, NAME, INSN)
 316
 317/*
 318 * Template for instructions with a read/write result and
 319 * two register and one predicate operands
 320 */
 321#define FUNC_Xx_OP_xxp(RESTYPE, SRC1TYPE, SRC2TYPE, NAME, INSN) \
 322static RESTYPE NAME(RESTYPE result, SRC1TYPE src1, SRC2TYPE src2, uint8_t pred,\
 323                    uint32_t *usr_result) \
 324{ \
 325    uint32_t usr; \
 326    asm(CLEAR_USRBITS \
 327        "p2 = %4\n\t" \
 328        INSN "\n\t" \
 329        "%1 = usr\n\t" \
 330        : "+r"(result), "=r"(usr) \
 331        : "r"(src1), "r"(src2), "r"(pred) \
 332        : "r2", "p2", "usr"); \
 333    *usr_result = usr & 0x3f; \
 334    return result; \
 335}
 336
 337#define FUNC_XR_OP_RRp(NAME, INSN) \
 338FUNC_Xx_OP_xxp(uint32_t, uint32_t, uint32_t, NAME, INSN)
 339
 340/* Template for compare instructions with two register operands */
 341#define FUNC_CMP_xx(SRC1TYPE, SRC2TYPE, NAME, INSN) \
 342static uint32_t NAME(SRC1TYPE src1, SRC2TYPE src2, uint32_t *usr_result) \
 343{ \
 344    uint32_t result; \
 345    uint32_t usr; \
 346    asm(CLEAR_USRBITS \
 347        INSN "\n\t" \
 348        "%0 = p1\n\t" \
 349        "%1 = usr\n\t" \
 350        : "=r"(result), "=r"(usr) \
 351        : "r"(src1), "r"(src2) \
 352        : "p1", "r2", "usr"); \
 353    *usr_result = usr & 0x3f; \
 354    return result; \
 355}
 356
 357#define FUNC_CMP_RR(NAME, INSN) \
 358FUNC_CMP_xx(uint32_t, uint32_t, NAME, INSN)
 359
 360#define FUNC_CMP_PP(NAME, INSN) \
 361FUNC_CMP_xx(uint64_t, uint64_t, NAME, INSN)
 362
 363/*
 364 * Function declarations using the templates
 365 */
 366FUNC_R_OP_R(satub,              "%0 = satub(%2)")
 367FUNC_P_OP_PP(vaddubs,           "%0 = vaddub(%2, %3):sat")
 368FUNC_P_OP_PP(vadduhs,           "%0 = vadduh(%2, %3):sat")
 369FUNC_P_OP_PP(vsububs,           "%0 = vsubub(%2, %3):sat")
 370FUNC_P_OP_PP(vsubuhs,           "%0 = vsubuh(%2, %3):sat")
 371
 372/* Add vector of half integers with saturation and pack to unsigned bytes */
 373FUNC_R_OP_PP(vaddhubs,          "%0 = vaddhub(%2, %3):sat")
 374
 375/* Vector saturate half to unsigned byte */
 376FUNC_R_OP_P(vsathub,            "%0 = vsathub(%2)")
 377
 378/* Similar to above but takes a 32-bit argument */
 379FUNC_R_OP_R(svsathub,           "%0 = vsathub(%2)")
 380
 381/* Vector saturate word to unsigned half */
 382FUNC_P_OP_P(vsatwuh_nopack,     "%0 = vsatwuh(%2)")
 383
 384/* Similar to above but returns a 32-bit result */
 385FUNC_R_OP_P(vsatwuh,            "%0 = vsatwuh(%2)")
 386
 387/* Vector arithmetic shift halfwords with saturate and pack */
 388FUNC_R_OP_PI(asrhub_sat,        "%0 = vasrhub(%2, #%3):sat")
 389
 390/* Vector arithmetic shift halfwords with round, saturate and pack */
 391FUNC_R_OP_PI(asrhub_rnd_sat,    "%0 = vasrhub(%2, #%3):raw")
 392
 393FUNC_R_OP_RR(addsat,            "%0 = add(%2, %3):sat")
 394/* Similar to above but with register pairs */
 395FUNC_P_OP_PP(addpsat,           "%0 = add(%2, %3):sat")
 396
 397FUNC_XR_OP_RR(mpy_acc_sat_hh_s0, "%0 += mpy(%2.H, %3.H):sat")
 398FUNC_R_OP_RR(mpy_sat_hh_s1,     "%0 = mpy(%2.H, %3.H):<<1:sat")
 399FUNC_R_OP_RR(mpy_sat_rnd_hh_s1, "%0 = mpy(%2.H, %3.H):<<1:rnd:sat")
 400FUNC_R_OP_RR(mpy_up_s1_sat,     "%0 = mpy(%2, %3):<<1:sat")
 401FUNC_P_OP_RR(vmpy2s_s1,         "%0 = vmpyh(%2, %3):<<1:sat")
 402FUNC_P_OP_RR(vmpy2su_s1,        "%0 = vmpyhsu(%2, %3):<<1:sat")
 403FUNC_R_OP_RR(vmpy2s_s1pack,     "%0 = vmpyh(%2, %3):<<1:rnd:sat")
 404FUNC_P_OP_PP(vmpy2es_s1,        "%0 = vmpyeh(%2, %3):<<1:sat")
 405FUNC_R_OP_PP(vdmpyrs_s1,        "%0 = vdmpy(%2, %3):<<1:rnd:sat")
 406FUNC_XP_OP_PP(vdmacs_s0,        "%0 += vdmpy(%2, %3):sat")
 407FUNC_R_OP_RR(cmpyrs_s0,         "%0 = cmpy(%2, %3):rnd:sat")
 408FUNC_XP_OP_RR(cmacs_s0,         "%0 += cmpy(%2, %3):sat")
 409FUNC_XP_OP_RR(cnacs_s0,         "%0 -= cmpy(%2, %3):sat")
 410FUNC_P_OP_PP(vrcmpys_s1_h,      "%0 = vrcmpys(%2, %3):<<1:sat:raw:hi")
 411FUNC_XP_OP_PP(mmacls_s0,        "%0 += vmpyweh(%2, %3):sat")
 412FUNC_R_OP_RR(hmmpyl_rs1,        "%0 = mpy(%2, %3.L):<<1:rnd:sat")
 413FUNC_XP_OP_PP(mmaculs_s0,       "%0 += vmpyweuh(%2, %3):sat")
 414FUNC_R_OP_PR(cmpyi_wh,          "%0 = cmpyiwh(%2, %3):<<1:rnd:sat")
 415FUNC_P_OP_PP(vcmpy_s0_sat_i,    "%0 = vcmpyi(%2, %3):sat")
 416FUNC_P_OP_PR(vcrotate,          "%0 = vcrotate(%2, %3)")
 417FUNC_P_OP_PR(vcnegh,            "%0 = vcnegh(%2, %3)")
 418
 419#if CORE_HAS_AUDIO
 420FUNC_R_OP_PP(wcmpyrw,           "%0 = cmpyrw(%2, %3):<<1:sat")
 421#endif
 422
 423FUNC_R_OP_RR(addh_l16_sat_ll,   "%0 = add(%2.L, %3.L):sat")
 424FUNC_P_OP_P(vconj,              "%0 = vconj(%2):sat")
 425FUNC_P_OP_PP(vxaddsubw,         "%0 = vxaddsubw(%2, %3):sat")
 426FUNC_P_OP_P(vabshsat,           "%0 = vabsh(%2):sat")
 427FUNC_P_OP_PP(vnavgwr,           "%0 = vnavgw(%2, %3):rnd:sat")
 428FUNC_R_OP_RI(round_ri_sat,      "%0 = round(%2, #%3):sat")
 429FUNC_R_OP_RR(asr_r_r_sat,       "%0 = asr(%2, %3):sat")
 430
 431FUNC_XPp_OP_PP(ACS,             "%0, p2 = vacsh(%3, %4)")
 432
 433/* Floating point */
 434FUNC_R_OP_RR(sfmin,             "%0 = sfmin(%2, %3)")
 435FUNC_R_OP_RR(sfmax,             "%0 = sfmax(%2, %3)")
 436FUNC_R_OP_RR(sfadd,             "%0 = sfadd(%2, %3)")
 437FUNC_R_OP_RR(sfsub,             "%0 = sfsub(%2, %3)")
 438FUNC_R_OP_RR(sfmpy,             "%0 = sfmpy(%2, %3)")
 439FUNC_XR_OP_RR(sffma,            "%0 += sfmpy(%2, %3)")
 440FUNC_XR_OP_RR(sffms,            "%0 -= sfmpy(%2, %3)")
 441FUNC_CMP_RR(sfcmpuo,            "p1 = sfcmp.uo(%2, %3)")
 442FUNC_CMP_RR(sfcmpeq,            "p1 = sfcmp.eq(%2, %3)")
 443FUNC_CMP_RR(sfcmpgt,            "p1 = sfcmp.gt(%2, %3)")
 444FUNC_CMP_RR(sfcmpge,            "p1 = sfcmp.ge(%2, %3)")
 445
 446FUNC_P_OP_PP(dfadd,             "%0 = dfadd(%2, %3)")
 447FUNC_P_OP_PP(dfsub,             "%0 = dfsub(%2, %3)")
 448
 449#if CORE_IS_V67
 450FUNC_P_OP_PP(dfmin,             "%0 = dfmin(%2, %3)")
 451FUNC_P_OP_PP(dfmax,             "%0 = dfmax(%2, %3)")
 452FUNC_XP_OP_PP(dfmpyhh,          "%0 += dfmpyhh(%2, %3)")
 453#endif
 454
 455FUNC_CMP_PP(dfcmpuo,            "p1 = dfcmp.uo(%2, %3)")
 456FUNC_CMP_PP(dfcmpeq,            "p1 = dfcmp.eq(%2, %3)")
 457FUNC_CMP_PP(dfcmpgt,            "p1 = dfcmp.gt(%2, %3)")
 458FUNC_CMP_PP(dfcmpge,            "p1 = dfcmp.ge(%2, %3)")
 459
 460/* Conversions from sf */
 461FUNC_P_OP_R(conv_sf2df,         "%0 = convert_sf2df(%2)")
 462FUNC_R_OP_R(conv_sf2uw,         "%0 = convert_sf2uw(%2)")
 463FUNC_R_OP_R(conv_sf2w,          "%0 = convert_sf2w(%2)")
 464FUNC_P_OP_R(conv_sf2ud,         "%0 = convert_sf2ud(%2)")
 465FUNC_P_OP_R(conv_sf2d,          "%0 = convert_sf2d(%2)")
 466FUNC_R_OP_R(conv_sf2uw_chop,    "%0 = convert_sf2uw(%2):chop")
 467FUNC_R_OP_R(conv_sf2w_chop,     "%0 = convert_sf2w(%2):chop")
 468FUNC_P_OP_R(conv_sf2ud_chop,    "%0 = convert_sf2ud(%2):chop")
 469FUNC_P_OP_R(conv_sf2d_chop,     "%0 = convert_sf2d(%2):chop")
 470
 471/* Conversions from df */
 472FUNC_R_OP_P(conv_df2sf,         "%0 = convert_df2sf(%2)")
 473FUNC_R_OP_P(conv_df2uw,         "%0 = convert_df2uw(%2)")
 474FUNC_R_OP_P(conv_df2w,          "%0 = convert_df2w(%2)")
 475FUNC_P_OP_P(conv_df2ud,         "%0 = convert_df2ud(%2)")
 476FUNC_P_OP_P(conv_df2d,          "%0 = convert_df2d(%2)")
 477FUNC_R_OP_P(conv_df2uw_chop,    "%0 = convert_df2uw(%2):chop")
 478FUNC_R_OP_P(conv_df2w_chop,     "%0 = convert_df2w(%2):chop")
 479FUNC_P_OP_P(conv_df2ud_chop,    "%0 = convert_df2ud(%2):chop")
 480FUNC_P_OP_P(conv_df2d_chop,     "%0 = convert_df2d(%2):chop")
 481
 482/* Integer to float conversions */
 483FUNC_R_OP_R(conv_uw2sf,         "%0 = convert_uw2sf(%2)")
 484FUNC_R_OP_R(conv_w2sf,          "%0 = convert_w2sf(%2)")
 485FUNC_R_OP_P(conv_ud2sf,         "%0 = convert_ud2sf(%2)")
 486FUNC_R_OP_P(conv_d2sf,          "%0 = convert_d2sf(%2)")
 487
 488/* Special purpose floating point instructions */
 489FUNC_XR_OP_RRp(sffma_sc,        "%0 += sfmpy(%2, %3, p2):scale")
 490FUNC_Rp_OP_RR(sfrecipa,         "%0, p2 = sfrecipa(%3, %4)")
 491FUNC_R_OP_RR(sffixupn,          "%0 = sffixupn(%2, %3)")
 492FUNC_R_OP_RR(sffixupd,          "%0 = sffixupd(%2, %3)")
 493FUNC_R_OP_R(sffixupr,           "%0 = sffixupr(%2)")
 494FUNC_Rp_OP_R(sfinvsqrta,        "%0, p2 = sfinvsqrta(%3)")
 495
 496/*
 497 * Templates for test cases
 498 *
 499 * Same naming convention as the function templates
 500 */
 501#define TEST_x_OP_x(RESTYPE, CHECKFN, SRCTYPE, FUNC, SRC, RES, USR_RES) \
 502    do { \
 503        RESTYPE result; \
 504        SRCTYPE src = SRC; \
 505        uint32_t usr_result; \
 506        result = FUNC(src, &usr_result); \
 507        CHECKFN(result, RES); \
 508        check(usr_result, USR_RES); \
 509    } while (0)
 510
 511#define TEST_R_OP_R(FUNC, SRC, RES, USR_RES) \
 512TEST_x_OP_x(uint32_t, check32, uint32_t, FUNC, SRC, RES, USR_RES)
 513
 514#define TEST_R_OP_P(FUNC, SRC, RES, USR_RES) \
 515TEST_x_OP_x(uint32_t, check32, uint64_t, FUNC, SRC, RES, USR_RES)
 516
 517#define TEST_P_OP_P(FUNC, SRC, RES, USR_RES) \
 518TEST_x_OP_x(uint64_t, check64, uint64_t, FUNC, SRC, RES, USR_RES)
 519
 520#define TEST_P_OP_R(FUNC, SRC, RES, USR_RES) \
 521TEST_x_OP_x(uint64_t, check64, uint32_t, FUNC, SRC, RES, USR_RES)
 522
 523#define TEST_xp_OP_x(RESTYPE, CHECKFN, SRCTYPE, FUNC, SRC, \
 524                     RES, PRED_RES, USR_RES) \
 525    do { \
 526        RESTYPE result; \
 527        SRCTYPE src = SRC; \
 528        uint8_t pred_result; \
 529        uint32_t usr_result; \
 530        result = FUNC(src, &pred_result, &usr_result); \
 531        CHECKFN(result, RES); \
 532        check(pred_result, PRED_RES); \
 533        check(usr_result, USR_RES); \
 534    } while (0)
 535
 536#define TEST_Rp_OP_R(FUNC, SRC, RES, PRED_RES, USR_RES) \
 537TEST_xp_OP_x(uint32_t, check32, uint32_t, FUNC, SRC, RES, PRED_RES, USR_RES)
 538
 539#define TEST_x_OP_xx(RESTYPE, CHECKFN, SRC1TYPE, SRC2TYPE, \
 540                     FUNC, SRC1, SRC2, RES, USR_RES) \
 541    do { \
 542        RESTYPE result; \
 543        SRC1TYPE src1 = SRC1; \
 544        SRC2TYPE src2 = SRC2; \
 545        uint32_t usr_result; \
 546        result = FUNC(src1, src2, &usr_result); \
 547        CHECKFN(result, RES); \
 548        check(usr_result, USR_RES); \
 549    } while (0)
 550
 551#define TEST_P_OP_PP(FUNC, SRC1, SRC2, RES, USR_RES) \
 552TEST_x_OP_xx(uint64_t, check64, uint64_t, uint64_t, \
 553             FUNC, SRC1, SRC2, RES, USR_RES)
 554
 555#define TEST_R_OP_PP(FUNC, SRC1, SRC2, RES, USR_RES) \
 556TEST_x_OP_xx(uint32_t, check32, uint64_t, uint64_t, \
 557             FUNC, SRC1, SRC2, RES, USR_RES)
 558
 559#define TEST_P_OP_RR(FUNC, SRC1, SRC2, RES, USR_RES) \
 560TEST_x_OP_xx(uint64_t, check64, uint32_t, uint32_t, \
 561             FUNC, SRC1, SRC2, RES, USR_RES)
 562
 563#define TEST_R_OP_RR(FUNC, SRC1, SRC2, RES, USR_RES) \
 564TEST_x_OP_xx(uint32_t, check32, uint32_t, uint32_t, \
 565             FUNC, SRC1, SRC2, RES, USR_RES)
 566
 567#define TEST_R_OP_PR(FUNC, SRC1, SRC2, RES, USR_RES) \
 568TEST_x_OP_xx(uint32_t, check32, uint64_t, uint32_t, \
 569             FUNC, SRC1, SRC2, RES, USR_RES)
 570
 571#define TEST_P_OP_PR(FUNC, SRC1, SRC2, RES, USR_RES) \
 572TEST_x_OP_xx(uint64_t, check64, uint64_t, uint32_t, \
 573             FUNC, SRC1, SRC2, RES, USR_RES)
 574
 575#define TEST_xp_OP_xx(RESTYPE, CHECKFN, SRC1TYPE, SRC2TYPE, FUNC, SRC1, SRC2, \
 576                      RES, PRED_RES, USR_RES) \
 577    do { \
 578        RESTYPE result; \
 579        SRC1TYPE src1 = SRC1; \
 580        SRC2TYPE src2 = SRC2; \
 581        uint8_t pred_result; \
 582        uint32_t usr_result; \
 583        result = FUNC(src1, src2, &pred_result, &usr_result); \
 584        CHECKFN(result, RES); \
 585        check(pred_result, PRED_RES); \
 586        check(usr_result, USR_RES); \
 587    } while (0)
 588
 589#define TEST_Rp_OP_RR(FUNC, SRC1, SRC2, RES, PRED_RES, USR_RES) \
 590TEST_xp_OP_xx(uint32_t, check32, uint32_t, uint32_t, FUNC, SRC1, SRC2, \
 591              RES, PRED_RES, USR_RES)
 592
 593#define TEST_x_OP_xI(RESTYPE, CHECKFN, SRC1TYPE, \
 594                     FUNC, SRC1, SRC2, RES, USR_RES) \
 595    do { \
 596        RESTYPE result; \
 597        SRC1TYPE src1 = SRC1; \
 598        uint32_t src2 = SRC2; \
 599        uint32_t usr_result; \
 600        result = FUNC(src1, src2, &usr_result); \
 601        CHECKFN(result, RES); \
 602        check(usr_result, USR_RES); \
 603    } while (0)
 604
 605#define TEST_R_OP_RI(FUNC, SRC1, SRC2, RES, USR_RES) \
 606TEST_x_OP_xI(uint32_t, check32, uint32_t, \
 607             FUNC, SRC1, SRC2, RES, USR_RES)
 608
 609#define TEST_R_OP_PI(FUNC, SRC1, SRC2, RES, USR_RES) \
 610TEST_x_OP_xI(uint32_t, check64, uint64_t, \
 611             FUNC, SRC1, SRC2, RES, USR_RES)
 612
 613#define TEST_Xx_OP_xx(RESTYPE, CHECKFN, SRC1TYPE, SRC2TYPE, \
 614                      FUNC, RESIN, SRC1, SRC2, RES, USR_RES) \
 615    do { \
 616        RESTYPE result = RESIN; \
 617        SRC1TYPE src1 = SRC1; \
 618        SRC2TYPE src2 = SRC2; \
 619        uint32_t usr_result; \
 620        result = FUNC(result, src1, src2, &usr_result); \
 621        CHECKFN(result, RES); \
 622        check(usr_result, USR_RES); \
 623    } while (0)
 624
 625#define TEST_XR_OP_RR(FUNC, RESIN, SRC1, SRC2, RES, USR_RES) \
 626TEST_Xx_OP_xx(uint32_t, check32, uint32_t, uint32_t, \
 627              FUNC, RESIN, SRC1, SRC2, RES, USR_RES)
 628
 629#define TEST_XP_OP_PP(FUNC, RESIN, SRC1, SRC2, RES, USR_RES) \
 630TEST_Xx_OP_xx(uint64_t, check64, uint64_t, uint64_t, \
 631              FUNC, RESIN, SRC1, SRC2, RES, USR_RES)
 632
 633#define TEST_XP_OP_RR(FUNC, RESIN, SRC1, SRC2, RES, USR_RES) \
 634TEST_Xx_OP_xx(uint64_t, check64, uint32_t, uint32_t, \
 635              FUNC, RESIN, SRC1, SRC2, RES, USR_RES)
 636
 637#define TEST_Xxp_OP_xx(RESTYPE, CHECKFN, SRC1TYPE, SRC2TYPE, \
 638                       FUNC, RESIN, SRC1, SRC2, RES, PRED_RES, USR_RES) \
 639    do { \
 640        RESTYPE result = RESIN; \
 641        SRC1TYPE src1 = SRC1; \
 642        SRC2TYPE src2 = SRC2; \
 643        uint8_t pred_res; \
 644        uint32_t usr_result; \
 645        result = FUNC(result, src1, src2, &pred_res, &usr_result); \
 646        CHECKFN(result, RES); \
 647        check(usr_result, USR_RES); \
 648    } while (0)
 649
 650#define TEST_XPp_OP_PP(FUNC, RESIN, SRC1, SRC2, RES, PRED_RES, USR_RES) \
 651TEST_Xxp_OP_xx(uint64_t, check64, uint64_t, uint64_t, FUNC, RESIN, SRC1, SRC2, \
 652               RES, PRED_RES, USR_RES)
 653
 654#define TEST_Xx_OP_xxp(RESTYPE, CHECKFN, SRC1TYPE, SRC2TYPE, \
 655                      FUNC, RESIN, SRC1, SRC2, PRED, RES, USR_RES) \
 656    do { \
 657        RESTYPE result = RESIN; \
 658        SRC1TYPE src1 = SRC1; \
 659        SRC2TYPE src2 = SRC2; \
 660        uint8_t pred = PRED; \
 661        uint32_t usr_result; \
 662        result = FUNC(result, src1, src2, pred, &usr_result); \
 663        CHECKFN(result, RES); \
 664        check(usr_result, USR_RES); \
 665    } while (0)
 666
 667#define TEST_XR_OP_RRp(FUNC, RESIN, SRC1, SRC2, PRED, RES, USR_RES) \
 668TEST_Xx_OP_xxp(uint32_t, check32, uint32_t, uint32_t, \
 669              FUNC, RESIN, SRC1, SRC2, PRED, RES, USR_RES)
 670
 671#define TEST_CMP_xx(SRC1TYPE, SRC2TYPE, \
 672                    FUNC, SRC1, SRC2, RES, USR_RES) \
 673    do { \
 674        uint32_t result; \
 675        SRC1TYPE src1 = SRC1; \
 676        SRC2TYPE src2 = SRC2; \
 677        uint32_t usr_result; \
 678        result = FUNC(src1, src2, &usr_result); \
 679        check(result, RES); \
 680        check(usr_result, USR_RES); \
 681    } while (0)
 682
 683#define TEST_CMP_RR(FUNC, SRC1, SRC2, RES, USR_RES) \
 684TEST_CMP_xx(uint32_t, uint32_t, FUNC, SRC1, SRC2, RES, USR_RES)
 685
 686#define TEST_CMP_PP(FUNC, SRC1, SRC2, RES, USR_RES) \
 687TEST_CMP_xx(uint64_t, uint64_t, FUNC, SRC1, SRC2, RES, USR_RES)
 688
 689int main()
 690{
 691    TEST_R_OP_R(satub,       0,         0,         USR_CLEAR);
 692    TEST_R_OP_R(satub,       0xff,      0xff,      USR_CLEAR);
 693    TEST_R_OP_R(satub,       0xfff,     0xff,      USR_OVF);
 694    TEST_R_OP_R(satub,       -1,        0,         USR_OVF);
 695
 696    TEST_P_OP_PP(vaddubs,    0xfeLL,    0x01LL,    0xffLL,    USR_CLEAR);
 697    TEST_P_OP_PP(vaddubs,    0xffLL,    0xffLL,    0xffLL,    USR_OVF);
 698
 699    TEST_P_OP_PP(vadduhs,    0xfffeLL,  0x1LL,     0xffffLL,  USR_CLEAR);
 700    TEST_P_OP_PP(vadduhs,    0xffffLL,  0x1LL,     0xffffLL,  USR_OVF);
 701
 702    TEST_P_OP_PP(vsububs, 0x0807060504030201LL, 0x0101010101010101LL,
 703                 0x0706050403020100LL, USR_CLEAR);
 704    TEST_P_OP_PP(vsububs, 0x0807060504030201LL, 0x0202020202020202LL,
 705                 0x0605040302010000LL, USR_OVF);
 706
 707    TEST_P_OP_PP(vsubuhs, 0x0004000300020001LL, 0x0001000100010001LL,
 708                 0x0003000200010000LL, USR_CLEAR);
 709    TEST_P_OP_PP(vsubuhs, 0x0004000300020001LL, 0x0002000200020002LL,
 710                 0x0002000100000000LL, USR_OVF);
 711
 712    TEST_R_OP_PP(vaddhubs, 0x0004000300020001LL, 0x0001000100010001LL,
 713                 0x05040302, USR_CLEAR);
 714    TEST_R_OP_PP(vaddhubs, 0x7fff000300020001LL, 0x0002000200020002LL,
 715                 0xff050403, USR_OVF);
 716
 717    TEST_R_OP_P(vsathub,         0x0001000300020001LL, 0x01030201, USR_CLEAR);
 718    TEST_R_OP_P(vsathub,         0x010000700080ffffLL, 0xff708000, USR_OVF);
 719
 720    TEST_R_OP_P(vsatwuh,         0x0000ffff00000001LL, 0xffff0001, USR_CLEAR);
 721    TEST_R_OP_P(vsatwuh,         0x800000000000ffffLL, 0x0000ffff, USR_OVF);
 722
 723    TEST_P_OP_P(vsatwuh_nopack,  0x0000ffff00000001LL, 0x0000ffff00000001LL,
 724                USR_CLEAR);
 725    TEST_P_OP_P(vsatwuh_nopack,  0x800000000000ffffLL, 0x000000000000ffffLL,
 726                USR_OVF);
 727
 728    TEST_R_OP_R(svsathub,        0x00020001,           0x0201,     USR_CLEAR);
 729    TEST_R_OP_R(svsathub,        0x0080ffff,           0x8000,     USR_OVF);
 730
 731    TEST_R_OP_PI(asrhub_sat,     0x004f003f002f001fLL, 3,    0x09070503,
 732                 USR_CLEAR);
 733    TEST_R_OP_PI(asrhub_sat,     0x004fffff8fff001fLL, 3,    0x09000003,
 734                 USR_OVF);
 735
 736    TEST_R_OP_PI(asrhub_rnd_sat, 0x004f003f002f001fLL, 2,    0x0a080604,
 737                 USR_CLEAR);
 738    TEST_R_OP_PI(asrhub_rnd_sat, 0x004fffff8fff001fLL, 2,    0x0a000004,
 739                 USR_OVF);
 740
 741    TEST_R_OP_RR(addsat,        1,              2,              3,
 742                 USR_CLEAR);
 743    TEST_R_OP_RR(addsat,        0x7fffffff,     0x00000010,     0x7fffffff,
 744                 USR_OVF);
 745    TEST_R_OP_RR(addsat,        0x80000000,     0x80000006,     0x80000000,
 746                 USR_OVF);
 747
 748    TEST_P_OP_PP(addpsat, 1LL, 2LL, 3LL, USR_CLEAR);
 749    /* overflow to max positive */
 750    TEST_P_OP_PP(addpsat, 0x7ffffffffffffff0LL, 0x0000000000000010LL,
 751                 0x7fffffffffffffffLL, USR_OVF);
 752    /* overflow to min negative */
 753    TEST_P_OP_PP(addpsat, 0x8000000000000003LL, 0x8000000000000006LL,
 754                 0x8000000000000000LL, USR_OVF);
 755
 756    TEST_XR_OP_RR(mpy_acc_sat_hh_s0, 0x7fffffff, 0xffff0000, 0x11110000,
 757                  0x7fffeeee, USR_CLEAR);
 758    TEST_XR_OP_RR(mpy_acc_sat_hh_s0, 0x7fffffff, 0x7fff0000, 0x7fff0000,
 759                  0x7fffffff, USR_OVF);
 760
 761    TEST_R_OP_RR(mpy_sat_hh_s1,        0xffff0000, 0x11110000, 0xffffddde,
 762                 USR_CLEAR);
 763    TEST_R_OP_RR(mpy_sat_hh_s1,        0x7fff0000, 0x7fff0000, 0x7ffe0002,
 764                 USR_CLEAR);
 765    TEST_R_OP_RR(mpy_sat_hh_s1,        0x80000000, 0x80000000, 0x7fffffff,
 766                 USR_OVF);
 767
 768    TEST_R_OP_RR(mpy_sat_rnd_hh_s1,    0xffff0000, 0x11110000, 0x00005dde,
 769                 USR_CLEAR);
 770    TEST_R_OP_RR(mpy_sat_rnd_hh_s1,    0x7fff0000, 0x7fff0000, 0x7ffe8002,
 771                 USR_CLEAR);
 772    TEST_R_OP_RR(mpy_sat_rnd_hh_s1,    0x80000000, 0x80000000, 0x7fffffff,
 773                 USR_OVF);
 774
 775    TEST_R_OP_RR(mpy_up_s1_sat,        0xffff0000, 0x11110000, 0xffffddde,
 776                 USR_CLEAR);
 777    TEST_R_OP_RR(mpy_up_s1_sat,        0x7fff0000, 0x7fff0000, 0x7ffe0002,
 778                 USR_CLEAR);
 779    TEST_R_OP_RR(mpy_up_s1_sat,        0x80000000, 0x80000000, 0x7fffffff,
 780                 USR_OVF);
 781
 782    TEST_P_OP_RR(vmpy2s_s1,  0x7fff0000, 0x7fff0000, 0x7ffe000200000000LL,
 783                 USR_CLEAR);
 784    TEST_P_OP_RR(vmpy2s_s1,  0x80000000, 0x80000000, 0x7fffffff00000000LL,
 785                 USR_OVF);
 786
 787    TEST_P_OP_RR(vmpy2su_s1, 0x7fff0000, 0x7fff0000, 0x7ffe000200000000LL,
 788                 USR_CLEAR);
 789    TEST_P_OP_RR(vmpy2su_s1, 0xffffbd97, 0xffffffff, 0xfffe000280000000LL,
 790                 USR_OVF);
 791
 792    TEST_R_OP_RR(vmpy2s_s1pack,        0x7fff0000, 0x7fff0000, 0x7ffe0000,
 793                 USR_CLEAR);
 794    TEST_R_OP_RR(vmpy2s_s1pack,        0x80008000, 0x80008000, 0x7fff7fff,
 795                 USR_OVF);
 796
 797    TEST_P_OP_PP(vmpy2es_s1, 0x7fff7fff7fff7fffLL, 0x1fff1fff1fff1fffLL,
 798                 0x1ffec0021ffec002LL, USR_CLEAR);
 799    TEST_P_OP_PP(vmpy2es_s1, 0x8000800080008000LL, 0x8000800080008000LL,
 800                 0x7fffffff7fffffffLL, USR_OVF);
 801
 802    TEST_R_OP_PP(vdmpyrs_s1, 0x7fff7fff7fff7fffLL, 0x1fff1fff1fff1fffLL,
 803                 0x3ffe3ffe, USR_CLEAR);
 804    TEST_R_OP_PP(vdmpyrs_s1, 0x8000800080008000LL, 0x8000800080008000LL,
 805                 0x7fff7fffLL, USR_OVF);
 806
 807    TEST_XP_OP_PP(vdmacs_s0, 0x0fffffffULL, 0x00ff00ff00ff00ffLL,
 808                  0x00ff00ff00ff00ffLL, 0x0001fc021001fc01LL, USR_CLEAR);
 809    TEST_XP_OP_PP(vdmacs_s0, 0x01111111ULL, 0x8000800080001000LL,
 810                  0x8000800080008000LL, 0x7fffffff39111111LL, USR_OVF);
 811
 812    TEST_R_OP_RR(cmpyrs_s0,            0x7fff0000, 0x7fff0000, 0x0000c001,
 813                 USR_CLEAR);
 814    TEST_R_OP_RR(cmpyrs_s0,            0x80008000, 0x80008000, 0x7fff0000,
 815                 USR_OVF);
 816
 817    TEST_XP_OP_RR(cmacs_s0, 0x0fffffff, 0x7fff0000, 0x7fff0000,
 818                  0x00000000d000fffeLL, USR_CLEAR);
 819    TEST_XP_OP_RR(cmacs_s0, 0x0fff1111, 0x80008000, 0x80008000,
 820                  0x7fffffff0fff1111LL, USR_OVF);
 821
 822    TEST_XP_OP_RR(cnacs_s0, 0x000000108fffffffULL, 0x7fff0000, 0x7fff0000,
 823                  0x00000010cfff0000ULL, USR_CLEAR);
 824    TEST_XP_OP_RR(cnacs_s0, 0x000000108ff1111fULL, 0x00002001, 0x00007ffd,
 825                  0x0000001080000000ULL, USR_OVF);
 826
 827    TEST_P_OP_PP(vrcmpys_s1_h, 0x00ff00ff00ff00ffLL, 0x00ff00ff00ff00ffLL,
 828                 0x0003f8040003f804LL, USR_CLEAR);
 829    TEST_P_OP_PP(vrcmpys_s1_h, 0x8000800080008000LL, 0x8000800080008000LL,
 830                 0x7fffffff7fffffffLL, USR_OVF);
 831
 832    TEST_XP_OP_PP(mmacls_s0, 0x6fffffff, 0x00ff00ff00ff00ffLL,
 833                  0x00ff00ff00ff00ffLL, 0x0000fe017000fe00LL, USR_CLEAR);
 834    TEST_XP_OP_PP(mmacls_s0, 0x6f1111ff, 0x8000800080008000LL,
 835                  0x1000100080008000LL, 0xf80008007fffffffLL, USR_OVF);
 836
 837    TEST_R_OP_RR(hmmpyl_rs1,           0x7fff0000, 0x7fff0001, 0x0000fffe,
 838                 USR_CLEAR);
 839    TEST_R_OP_RR(hmmpyl_rs1,           0x80000000, 0x80008000, 0x7fffffff,
 840                 USR_OVF);
 841
 842    TEST_XP_OP_PP(mmaculs_s0, 0x000000007fffffffULL, 0xffff800080008000LL,
 843                  0xffff800080008000LL, 0xffffc00040003fffLL, USR_CLEAR);
 844    TEST_XP_OP_PP(mmaculs_s0, 0x000011107fffffffULL, 0x00ff00ff00ff00ffLL,
 845                  0x00ff00ff001100ffLL, 0x00010f117fffffffLL, USR_OVF);
 846
 847    TEST_R_OP_PR(cmpyi_wh, 0x7fff000000000000LL, 0x7fff0001, 0x0000fffe,
 848                 USR_CLEAR);
 849    TEST_R_OP_PR(cmpyi_wh, 0x8000000000000000LL, 0x80008000, 0x7fffffff,
 850                 USR_OVF);
 851
 852    TEST_P_OP_PP(vcmpy_s0_sat_i, 0x00ff00ff00ff00ffLL, 0x00ff00ff00ff00ffLL,
 853                 0x0001fc020001fc02LL, USR_CLEAR);
 854    TEST_P_OP_PP(vcmpy_s0_sat_i, 0x8000800080008000LL, 0x8000800080008000LL,
 855                 0x7fffffff7fffffffLL, USR_OVF);
 856
 857    TEST_P_OP_PR(vcrotate, 0x8000000000000000LL, 0x00000002,
 858                 0x8000000000000000LL, USR_CLEAR);
 859    TEST_P_OP_PR(vcrotate, 0x7fff80007fff8000LL, 0x00000001,
 860                 0x7fff80007fff7fffLL, USR_OVF);
 861
 862    TEST_P_OP_PR(vcnegh, 0x8000000000000000LL, 0x00000002,
 863                 0x8000000000000000LL, USR_CLEAR);
 864    TEST_P_OP_PR(vcnegh, 0x7fff80007fff8000LL, 0x00000001,
 865                 0x7fff80007fff7fffLL, USR_OVF);
 866
 867#if CORE_HAS_AUDIO
 868    TEST_R_OP_PP(wcmpyrw, 0x8765432101234567LL, 0x00000002ffffffffLL,
 869                 0x00000001, USR_CLEAR);
 870    TEST_R_OP_PP(wcmpyrw, 0x800000007fffffffLL, 0x000000ff7fffffffLL,
 871                 0x7fffffff, USR_OVF);
 872    TEST_R_OP_PP(wcmpyrw, 0x7fffffff80000000LL, 0x7fffffff000000ffLL,
 873                 0x80000000, USR_OVF);
 874#else
 875    printf("Audio instructions skipped\n");
 876#endif
 877
 878    TEST_R_OP_RR(addh_l16_sat_ll,      0x0000ffff, 0x00000002, 0x00000001,
 879                 USR_CLEAR);
 880    TEST_R_OP_RR(addh_l16_sat_ll,      0x00007fff, 0x00000005, 0x00007fff,
 881                 USR_OVF);
 882    TEST_R_OP_RR(addh_l16_sat_ll,      0x00008000, 0x00008000, 0xffff8000,
 883                 USR_OVF);
 884
 885    TEST_P_OP_P(vconj, 0x0000ffff00000001LL, 0x0000ffff00000001LL, USR_CLEAR);
 886    TEST_P_OP_P(vconj, 0x800000000000ffffLL, 0x7fff00000000ffffLL, USR_OVF);
 887
 888    TEST_P_OP_PP(vxaddsubw, 0x8765432101234567LL, 0x00000002ffffffffLL,
 889                 0x8765432201234569LL, USR_CLEAR);
 890    TEST_P_OP_PP(vxaddsubw, 0x7fffffff7fffffffLL, 0xffffffffffffffffLL,
 891                 0x7fffffff7ffffffeLL, USR_OVF);
 892    TEST_P_OP_PP(vxaddsubw, 0x800000000fffffffLL, 0x0000000a00000008LL,
 893                 0x8000000010000009LL, USR_OVF);
 894
 895    TEST_P_OP_P(vabshsat, 0x0001000afffff800LL, 0x0001000a00010800LL,
 896                USR_CLEAR);
 897    TEST_P_OP_P(vabshsat, 0x8000000b000c000aLL, 0x7fff000b000c000aLL,
 898             USR_OVF);
 899
 900    TEST_P_OP_PP(vnavgwr, 0x8765432101234567LL, 0x00000002ffffffffLL,
 901                 0xc3b2a1900091a2b4LL, USR_CLEAR);
 902    TEST_P_OP_PP(vnavgwr, 0x7fffffff8000000aLL, 0x80000000ffffffffLL,
 903                 0x7fffffffc0000006LL, USR_OVF);
 904
 905    TEST_R_OP_RI(round_ri_sat,         0x0000ffff, 2, 0x00004000, USR_CLEAR);
 906    TEST_R_OP_RI(round_ri_sat,         0x7fffffff, 2, 0x1fffffff, USR_OVF);
 907
 908    TEST_R_OP_RR(asr_r_r_sat,          0x0000ffff, 0x00000002, 0x00003fff,
 909                 USR_CLEAR);
 910    TEST_R_OP_RR(asr_r_r_sat,          0x00ffffff, 0xfffffff5, 0x7fffffff,
 911                 USR_OVF);
 912    TEST_R_OP_RR(asr_r_r_sat,          0x80000000, 0xfffffff5, 0x80000000,
 913                 USR_OVF);
 914
 915    TEST_XPp_OP_PP(ACS, 0x0004000300020001ULL, 0x0001000200030004ULL,
 916                   0x0000000000000000ULL, 0x0004000300030004ULL, 0xf0,
 917                   USR_CLEAR);
 918    TEST_XPp_OP_PP(ACS, 0x0004000300020001ULL, 0x0001000200030004ULL,
 919                   0x000affff000d0000ULL, 0x000e0003000f0004ULL, 0xcc,
 920                   USR_CLEAR);
 921    TEST_XPp_OP_PP(ACS, 0x00047fff00020001ULL, 0x00017fff00030004ULL,
 922                  0x000a0fff000d0000ULL, 0x000e7fff000f0004ULL, 0xfc,
 923                  USR_OVF);
 924    TEST_XPp_OP_PP(ACS, 0x00047fff00020001ULL, 0x00017fff00030004ULL,
 925                   0x000a0fff000d0000ULL, 0x000e7fff000f0004ULL, 0xf0,
 926                   USR_OVF);
 927
 928    /* Floating point */
 929    TEST_R_OP_RR(sfmin,  SF_one,      SF_small_neg,   SF_small_neg, USR_CLEAR);
 930    TEST_R_OP_RR(sfmin,  SF_one,      SF_SNaN,        SF_one,       USR_FPINVF);
 931    TEST_R_OP_RR(sfmin,  SF_SNaN,     SF_one,         SF_one,       USR_FPINVF);
 932    TEST_R_OP_RR(sfmin,  SF_one,      SF_QNaN,        SF_one,       USR_CLEAR);
 933    TEST_R_OP_RR(sfmin,  SF_QNaN,     SF_one,         SF_one,       USR_CLEAR);
 934    TEST_R_OP_RR(sfmin,  SF_SNaN,     SF_QNaN,        SF_HEX_NaN,   USR_FPINVF);
 935    TEST_R_OP_RR(sfmin,  SF_QNaN,     SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 936
 937    TEST_R_OP_RR(sfmax,  SF_one,      SF_small_neg,   SF_one,       USR_CLEAR);
 938    TEST_R_OP_RR(sfmax,  SF_one,      SF_SNaN,        SF_one,       USR_FPINVF);
 939    TEST_R_OP_RR(sfmax,  SF_SNaN,     SF_one,         SF_one,       USR_FPINVF);
 940    TEST_R_OP_RR(sfmax,  SF_one,      SF_QNaN,        SF_one,       USR_CLEAR);
 941    TEST_R_OP_RR(sfmax,  SF_QNaN,     SF_one,         SF_one,       USR_CLEAR);
 942    TEST_R_OP_RR(sfmax,  SF_SNaN,     SF_QNaN,        SF_HEX_NaN,   USR_FPINVF);
 943    TEST_R_OP_RR(sfmax,  SF_QNaN,     SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 944
 945    TEST_R_OP_RR(sfadd,  SF_one,      SF_QNaN,        SF_HEX_NaN,   USR_CLEAR);
 946    TEST_R_OP_RR(sfadd,  SF_one,      SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 947    TEST_R_OP_RR(sfadd,  SF_QNaN,     SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 948    TEST_R_OP_RR(sfadd,  SF_SNaN,     SF_QNaN,        SF_HEX_NaN,   USR_FPINVF);
 949
 950    TEST_R_OP_RR(sfsub,  SF_one,      SF_QNaN,        SF_HEX_NaN,   USR_CLEAR);
 951    TEST_R_OP_RR(sfsub,  SF_one,      SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 952    TEST_R_OP_RR(sfsub,  SF_QNaN,     SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 953    TEST_R_OP_RR(sfsub,  SF_SNaN,     SF_QNaN,        SF_HEX_NaN,   USR_FPINVF);
 954
 955    TEST_R_OP_RR(sfmpy,  SF_one,      SF_QNaN,        SF_HEX_NaN,   USR_CLEAR);
 956    TEST_R_OP_RR(sfmpy,  SF_one,      SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 957    TEST_R_OP_RR(sfmpy,  SF_QNaN,     SF_SNaN,        SF_HEX_NaN,   USR_FPINVF);
 958    TEST_R_OP_RR(sfmpy,  SF_SNaN,     SF_QNaN,        SF_HEX_NaN,   USR_FPINVF);
 959
 960    TEST_XR_OP_RR(sffma, SF_one,   SF_one,    SF_one,   SF_two,     USR_CLEAR);
 961    TEST_XR_OP_RR(sffma, SF_zero,  SF_one,    SF_QNaN,  SF_HEX_NaN, USR_CLEAR);
 962    TEST_XR_OP_RR(sffma, SF_zero,  SF_one,    SF_SNaN,  SF_HEX_NaN, USR_FPINVF);
 963    TEST_XR_OP_RR(sffma, SF_zero,  SF_QNaN,   SF_SNaN,  SF_HEX_NaN, USR_FPINVF);
 964    TEST_XR_OP_RR(sffma, SF_zero,  SF_SNaN,   SF_QNaN,  SF_HEX_NaN, USR_FPINVF);
 965
 966    TEST_XR_OP_RR(sffms, SF_one,   SF_one,    SF_one,   SF_zero,    USR_CLEAR);
 967    TEST_XR_OP_RR(sffms, SF_zero,  SF_one,    SF_QNaN,  SF_HEX_NaN, USR_CLEAR);
 968    TEST_XR_OP_RR(sffms, SF_zero,  SF_one,    SF_SNaN,  SF_HEX_NaN, USR_FPINVF);
 969    TEST_XR_OP_RR(sffms, SF_zero,  SF_QNaN,   SF_SNaN,  SF_HEX_NaN, USR_FPINVF);
 970    TEST_XR_OP_RR(sffms, SF_zero,  SF_SNaN,   SF_QNaN,  SF_HEX_NaN, USR_FPINVF);
 971
 972    TEST_CMP_RR(sfcmpuo, SF_one,      SF_large_pos,    0x00,    USR_CLEAR);
 973    TEST_CMP_RR(sfcmpuo, SF_INF,      SF_large_pos,    0x00,    USR_CLEAR);
 974    TEST_CMP_RR(sfcmpuo, SF_QNaN,     SF_large_pos,    0xff,    USR_CLEAR);
 975    TEST_CMP_RR(sfcmpuo, SF_QNaN_neg, SF_large_pos,    0xff,    USR_CLEAR);
 976    TEST_CMP_RR(sfcmpuo, SF_SNaN,     SF_large_pos,    0xff,    USR_FPINVF);
 977    TEST_CMP_RR(sfcmpuo, SF_SNaN_neg, SF_large_pos,    0xff,    USR_FPINVF);
 978    TEST_CMP_RR(sfcmpuo, SF_QNaN,     SF_QNaN,         0xff,    USR_CLEAR);
 979    TEST_CMP_RR(sfcmpuo, SF_QNaN,     SF_SNaN,         0xff,    USR_FPINVF);
 980
 981    TEST_CMP_RR(sfcmpeq, SF_one,      SF_QNaN,         0x00,    USR_CLEAR);
 982    TEST_CMP_RR(sfcmpeq, SF_one,      SF_SNaN,         0x00,    USR_FPINVF);
 983    TEST_CMP_RR(sfcmpgt, SF_one,      SF_QNaN,         0x00,    USR_CLEAR);
 984    TEST_CMP_RR(sfcmpgt, SF_one,      SF_SNaN,         0x00,    USR_FPINVF);
 985    TEST_CMP_RR(sfcmpge, SF_one,      SF_QNaN,         0x00,    USR_CLEAR);
 986    TEST_CMP_RR(sfcmpge, SF_one,      SF_SNaN,         0x00,    USR_FPINVF);
 987
 988    TEST_P_OP_PP(dfadd,  DF_any,    DF_QNaN,         DF_HEX_NaN,    USR_CLEAR);
 989    TEST_P_OP_PP(dfadd,  DF_any,    DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
 990    TEST_P_OP_PP(dfadd,  DF_QNaN,   DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
 991    TEST_P_OP_PP(dfadd,  DF_SNaN,   DF_QNaN,         DF_HEX_NaN,    USR_FPINVF);
 992
 993    TEST_P_OP_PP(dfsub,  DF_any,    DF_QNaN,         DF_HEX_NaN,    USR_CLEAR);
 994    TEST_P_OP_PP(dfsub,  DF_any,    DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
 995    TEST_P_OP_PP(dfsub,  DF_QNaN,   DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
 996    TEST_P_OP_PP(dfsub,  DF_SNaN,   DF_QNaN,         DF_HEX_NaN,    USR_FPINVF);
 997
 998#if CORE_IS_V67
 999    TEST_P_OP_PP(dfmin,  DF_any,    DF_small_neg,    DF_small_neg,  USR_CLEAR);
1000    TEST_P_OP_PP(dfmin,  DF_any,    DF_SNaN,         DF_any,        USR_FPINVF);
1001    TEST_P_OP_PP(dfmin,  DF_SNaN,   DF_any,          DF_any,        USR_FPINVF);
1002    TEST_P_OP_PP(dfmin,  DF_any,    DF_QNaN,         DF_any,        USR_CLEAR);
1003    TEST_P_OP_PP(dfmin,  DF_QNaN,   DF_any,          DF_any,        USR_CLEAR);
1004    TEST_P_OP_PP(dfmin,  DF_SNaN,   DF_QNaN,         DF_HEX_NaN,    USR_FPINVF);
1005    TEST_P_OP_PP(dfmin,  DF_QNaN,   DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
1006
1007    TEST_P_OP_PP(dfmax,  DF_any,    DF_small_neg,    DF_any,        USR_CLEAR);
1008    TEST_P_OP_PP(dfmax,  DF_any,    DF_SNaN,         DF_any,        USR_FPINVF);
1009    TEST_P_OP_PP(dfmax,  DF_SNaN,   DF_any,          DF_any,        USR_FPINVF);
1010    TEST_P_OP_PP(dfmax,  DF_any,    DF_QNaN,         DF_any,        USR_CLEAR);
1011    TEST_P_OP_PP(dfmax,  DF_QNaN,   DF_any,          DF_any,        USR_CLEAR);
1012    TEST_P_OP_PP(dfmax,  DF_SNaN,   DF_QNaN,         DF_HEX_NaN,    USR_FPINVF);
1013    TEST_P_OP_PP(dfmax,  DF_QNaN,   DF_SNaN,         DF_HEX_NaN,    USR_FPINVF);
1014
1015    TEST_XP_OP_PP(dfmpyhh, DF_one,   DF_one,  DF_one,   DF_one_hh,  USR_CLEAR);
1016    TEST_XP_OP_PP(dfmpyhh, DF_zero,  DF_any,  DF_QNaN,  DF_HEX_NaN, USR_CLEAR);
1017    TEST_XP_OP_PP(dfmpyhh, DF_zero,  DF_any,  DF_SNaN,  DF_HEX_NaN, USR_FPINVF);
1018    TEST_XP_OP_PP(dfmpyhh, DF_zero,  DF_QNaN, DF_SNaN,  DF_HEX_NaN, USR_FPINVF);
1019    TEST_XP_OP_PP(dfmpyhh, DF_zero,  DF_SNaN, DF_QNaN,  DF_HEX_NaN, USR_FPINVF);
1020#else
1021    printf("v67 instructions skipped\n");
1022#endif
1023
1024    TEST_CMP_PP(dfcmpuo, DF_small_neg, DF_any,          0x00,    USR_CLEAR);
1025    TEST_CMP_PP(dfcmpuo, DF_large_pos, DF_any,          0x00,    USR_CLEAR);
1026    TEST_CMP_PP(dfcmpuo, DF_QNaN,      DF_any,          0xff,    USR_CLEAR);
1027    TEST_CMP_PP(dfcmpuo, DF_QNaN_neg,  DF_any,          0xff,    USR_CLEAR);
1028    TEST_CMP_PP(dfcmpuo, DF_SNaN,      DF_any,          0xff,    USR_FPINVF);
1029    TEST_CMP_PP(dfcmpuo, DF_SNaN_neg,  DF_any,          0xff,    USR_FPINVF);
1030    TEST_CMP_PP(dfcmpuo, DF_QNaN,      DF_QNaN,         0xff,    USR_CLEAR);
1031    TEST_CMP_PP(dfcmpuo, DF_QNaN,      DF_SNaN,         0xff,    USR_FPINVF);
1032
1033    TEST_CMP_PP(dfcmpeq, DF_any,       DF_QNaN,         0x00,    USR_CLEAR);
1034    TEST_CMP_PP(dfcmpeq, DF_any,       DF_SNaN,         0x00,    USR_FPINVF);
1035    TEST_CMP_PP(dfcmpgt, DF_any,       DF_QNaN,         0x00,    USR_CLEAR);
1036    TEST_CMP_PP(dfcmpgt, DF_any,       DF_SNaN,         0x00,    USR_FPINVF);
1037    TEST_CMP_PP(dfcmpge, DF_any,       DF_QNaN,         0x00,    USR_CLEAR);
1038    TEST_CMP_PP(dfcmpge, DF_any,       DF_SNaN,         0x00,    USR_FPINVF);
1039
1040    TEST_P_OP_R(conv_sf2df,       SF_QNaN,  DF_HEX_NaN,             USR_CLEAR);
1041    TEST_P_OP_R(conv_sf2df,       SF_SNaN,  DF_HEX_NaN,             USR_FPINVF);
1042    TEST_R_OP_R(conv_sf2uw,       SF_QNaN,  0xffffffff,             USR_FPINVF);
1043    TEST_R_OP_R(conv_sf2uw,       SF_SNaN,  0xffffffff,             USR_FPINVF);
1044    TEST_R_OP_R(conv_sf2w,        SF_QNaN,  0xffffffff,             USR_FPINVF);
1045    TEST_R_OP_R(conv_sf2w,        SF_SNaN,  0xffffffff,             USR_FPINVF);
1046    TEST_P_OP_R(conv_sf2ud,       SF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1047    TEST_P_OP_R(conv_sf2ud,       SF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1048    TEST_P_OP_R(conv_sf2d,        SF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1049    TEST_P_OP_R(conv_sf2d,        SF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1050    TEST_R_OP_R(conv_sf2uw_chop,  SF_QNaN,  0xffffffff,             USR_FPINVF);
1051    TEST_R_OP_R(conv_sf2uw_chop,  SF_SNaN,  0xffffffff,             USR_FPINVF);
1052    TEST_R_OP_R(conv_sf2w_chop,   SF_QNaN,  0xffffffff,             USR_FPINVF);
1053    TEST_R_OP_R(conv_sf2w_chop,   SF_SNaN,  0xffffffff,             USR_FPINVF);
1054    TEST_P_OP_R(conv_sf2ud_chop,  SF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1055    TEST_P_OP_R(conv_sf2ud_chop,  SF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1056    TEST_P_OP_R(conv_sf2d_chop,   SF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1057    TEST_P_OP_R(conv_sf2d_chop,   SF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1058
1059    TEST_R_OP_P(conv_df2sf,       DF_QNaN,  SF_HEX_NaN,             USR_CLEAR);
1060    TEST_R_OP_P(conv_df2sf,       DF_SNaN,  SF_HEX_NaN,             USR_FPINVF);
1061    TEST_R_OP_P(conv_df2uw,       DF_QNaN,  0xffffffff,             USR_FPINVF);
1062    TEST_R_OP_P(conv_df2uw,       DF_SNaN,  0xffffffff,             USR_FPINVF);
1063    TEST_R_OP_P(conv_df2w,        DF_QNaN,  0xffffffff,             USR_FPINVF);
1064    TEST_R_OP_P(conv_df2w,        DF_SNaN,  0xffffffff,             USR_FPINVF);
1065    TEST_P_OP_P(conv_df2ud,       DF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1066    TEST_P_OP_P(conv_df2ud,       DF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1067    TEST_P_OP_P(conv_df2d,        DF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1068    TEST_P_OP_P(conv_df2d,        DF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1069    TEST_R_OP_P(conv_df2uw_chop,  DF_QNaN,  0xffffffff,             USR_FPINVF);
1070    TEST_R_OP_P(conv_df2uw_chop,  DF_SNaN,  0xffffffff,             USR_FPINVF);
1071
1072    /* Test for typo in HELPER(conv_df2uw_chop) */
1073    TEST_R_OP_P(conv_df2uw_chop, 0xffffff7f00000001ULL, 0xffffffff, USR_FPINVF);
1074
1075    TEST_R_OP_P(conv_df2w_chop,   DF_QNaN,  0xffffffff,             USR_FPINVF);
1076    TEST_R_OP_P(conv_df2w_chop,   DF_SNaN,  0xffffffff,             USR_FPINVF);
1077    TEST_P_OP_P(conv_df2ud_chop,  DF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1078    TEST_P_OP_P(conv_df2ud_chop,  DF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1079    TEST_P_OP_P(conv_df2d_chop,   DF_QNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1080    TEST_P_OP_P(conv_df2d_chop,   DF_SNaN,  0xffffffffffffffffULL,  USR_FPINVF);
1081
1082    TEST_R_OP_R(conv_uw2sf,    0x00000001,             SF_one,      USR_CLEAR);
1083    TEST_R_OP_R(conv_uw2sf,    0x010020a5,             0x4b801052,  USR_FPINPF);
1084    TEST_R_OP_R(conv_w2sf,     0x00000001,             SF_one,      USR_CLEAR);
1085    TEST_R_OP_R(conv_w2sf,     0x010020a5,             0x4b801052,  USR_FPINPF);
1086    TEST_R_OP_P(conv_ud2sf,    0x0000000000000001ULL,  SF_one,      USR_CLEAR);
1087    TEST_R_OP_P(conv_ud2sf,    0x00000000010020a5ULL,  0x4b801052,  USR_FPINPF);
1088    TEST_R_OP_P(conv_d2sf,     0x0000000000000001ULL,  SF_one,      USR_CLEAR);
1089    TEST_R_OP_P(conv_d2sf,     0x00000000010020a5ULL,  0x4b801052,  USR_FPINPF);
1090
1091    TEST_XR_OP_RRp(sffma_sc, SF_one,   SF_one,    SF_one,   1, SF_four,
1092                   USR_CLEAR);
1093    TEST_XR_OP_RRp(sffma_sc, SF_QNaN,  SF_one,    SF_one,   1, SF_HEX_NaN,
1094                   USR_CLEAR);
1095    TEST_XR_OP_RRp(sffma_sc, SF_one,   SF_QNaN,   SF_one,   1, SF_HEX_NaN,
1096                   USR_CLEAR);
1097    TEST_XR_OP_RRp(sffma_sc, SF_one,   SF_one,    SF_QNaN,  1, SF_HEX_NaN,
1098                   USR_CLEAR);
1099    TEST_XR_OP_RRp(sffma_sc, SF_SNaN,  SF_one,    SF_one,   1, SF_HEX_NaN,
1100                   USR_FPINVF);
1101    TEST_XR_OP_RRp(sffma_sc, SF_one,   SF_SNaN,   SF_one,   1, SF_HEX_NaN,
1102                   USR_FPINVF);
1103    TEST_XR_OP_RRp(sffma_sc, SF_one,   SF_one,    SF_SNaN,  1, SF_HEX_NaN,
1104                   USR_FPINVF);
1105
1106    TEST_Rp_OP_RR(sfrecipa, SF_one,    SF_one,    SF_one_recip,   0x00,
1107                  USR_CLEAR);
1108    TEST_Rp_OP_RR(sfrecipa, SF_QNaN,   SF_one,    SF_HEX_NaN,     0x00,
1109                  USR_CLEAR);
1110    TEST_Rp_OP_RR(sfrecipa, SF_one,    SF_QNaN,   SF_HEX_NaN,     0x00,
1111                  USR_CLEAR);
1112    TEST_Rp_OP_RR(sfrecipa, SF_one,    SF_SNaN,   SF_HEX_NaN,     0x00,
1113                  USR_FPINVF);
1114    TEST_Rp_OP_RR(sfrecipa, SF_SNaN,   SF_one,    SF_HEX_NaN,     0x00,
1115                  USR_FPINVF);
1116
1117    TEST_R_OP_RR(sffixupn, SF_one,     SF_one,    SF_one,       USR_CLEAR);
1118    TEST_R_OP_RR(sffixupn, SF_QNaN,    SF_one,    SF_HEX_NaN,   USR_CLEAR);
1119    TEST_R_OP_RR(sffixupn, SF_one,     SF_QNaN,   SF_HEX_NaN,   USR_CLEAR);
1120    TEST_R_OP_RR(sffixupn, SF_SNaN,    SF_one,    SF_HEX_NaN,   USR_FPINVF);
1121    TEST_R_OP_RR(sffixupn, SF_one,     SF_SNaN,   SF_HEX_NaN,   USR_FPINVF);
1122
1123    TEST_R_OP_RR(sffixupd, SF_one,     SF_one,    SF_one,       USR_CLEAR);
1124    TEST_R_OP_RR(sffixupd, SF_QNaN,    SF_one,    SF_HEX_NaN,   USR_CLEAR);
1125    TEST_R_OP_RR(sffixupd, SF_one,     SF_QNaN,   SF_HEX_NaN,   USR_CLEAR);
1126    TEST_R_OP_RR(sffixupd, SF_SNaN,    SF_one,    SF_HEX_NaN,   USR_FPINVF);
1127    TEST_R_OP_RR(sffixupd, SF_one,     SF_SNaN,   SF_HEX_NaN,   USR_FPINVF);
1128
1129    TEST_R_OP_R(sffixupr, SF_one,             SF_one,           USR_CLEAR);
1130    TEST_R_OP_R(sffixupr, SF_QNaN,            SF_HEX_NaN,       USR_CLEAR);
1131    TEST_R_OP_R(sffixupr, SF_SNaN,            SF_HEX_NaN,       USR_FPINVF);
1132
1133    TEST_Rp_OP_R(sfinvsqrta, SF_one,        SF_one_invsqrta,  0x00, USR_CLEAR);
1134    TEST_Rp_OP_R(sfinvsqrta, SF_zero,       SF_one,           0x00, USR_CLEAR);
1135    TEST_Rp_OP_R(sfinvsqrta, SF_QNaN,       SF_HEX_NaN,       0x00, USR_CLEAR);
1136    TEST_Rp_OP_R(sfinvsqrta, SF_small_neg,  SF_HEX_NaN,       0x00, USR_FPINVF);
1137    TEST_Rp_OP_R(sfinvsqrta, SF_SNaN,       SF_HEX_NaN,       0x00, USR_FPINVF);
1138
1139    puts(err ? "FAIL" : "PASS");
1140    return err;
1141}
1142